Solid state relay
Technical field
The invention belongs to the electric appliance and electronic technical field, be specifically related to a kind of design of solid state relay.
Background technology
Solid-state relay (Solid State Relays; SSR) be a kind of contactless electronic beam switch, it utilizes the switching characteristic of electronic component (like semiconductor device such as switch triode, bidirectional triode thyristors), can reach the purpose of contactless no-spark ground make-and-break contact; Add direct current or pulse signal at its input; Output just can be transformed into conducting state (being blocking state during no signal) from off state, promptly when applying voltage between the control pin, and the solid state relay conducting; The voltage that applies of working as between the control pin is cancelled then solid state relay disconnection, thereby control is than heavy load.
The arriving of grid source capacitor discharge speed that the solid state relay that U.S. Patent number 4804866 is introduced switches off control circuit when FET is turn-offed promotes.Its basic principle for " control device is connected between the grid of photovoltaic diode array and output metal-oxide-semiconductor field effect t; thus make control device when photovoltaic export, be in high-impedance state; be in low resistive state in photovoltaic when disappearance output, so that the charging current of photovoltaic diode array generation flows to the grid of output end metal oxide field-effect pipe ".The control device of mentioning in the patent quickens leadage circuit exactly, has adopted N raceway groove JFET (normally closed device), diode and NPN triode, diode, resistance to combine.
U.S. Patent number 5151602 in the metal-oxide-semiconductor field effect t grid leadage circuit that normally closed property device is formed, has increased the impedance original paper.Compare with the relay of the patent No. 48404866; Having increased the impedance original paper can make the signal output waveform rise and fall edge of relay become mild; Effectively raise the ability of the anti-electro instrument noise of relay, but make that to turn on and off the time longer owing to do not do further processing.
U.S. Patent number 5278422 is the acceleration leadage circuit that the closed type device is formed equally, and this leadage circuit has also increased the impedance original paper.But because the position of this impedance is not on charge circuit; So than U.S. Patent number 5151602, this leadage circuit can not prolong the grid charging interval, and make the trailing edge of output signal be tending towards relaxing simultaneously; Improved antimierophonic ability, but total turn-off time still is bigger than normal.
Publication number CN1728553A discloses a kind of solid state relay; The acceleration charge-discharge circuit of forming by the open type device; This quickens to connect circuit is made up of electric capacity, NPN triode and diode, and its accelerated charging to the metal-oxide-semiconductor field effect t grid needs an electric capacity to realize by means of the energy that out-put supply provides.This scheme has effectively reduced turn-on time, but because the introducing of electric capacity and need inevitably increase the difficulty of chip area and wiring by out-put supply, also slightly inadequate to the control of the trailing edge gradient in addition, antijamming capability is relatively poor.
Summary of the invention
The objective of the invention is to have proposed a kind of solid state relay in order to solve the problems referred to above that existing solid state relay exists.
Technical scheme of the present invention is: a kind of solid state relay, comprise,
A light-emitting component that is connected between the relay input terminal;
During a coupling light-emitting component light signal, produce the photovoltaic diode array of photovoltaic output;
One or two is connected on the open type MOS memory between relay output end;
It is characterized in that, also comprise,
An accelerated charging circuit of forming by phototriode, wherein, the emitter of phototriode connects the grid of open type MOS memory, and collector electrode is connected on first end of photovoltaic diode array;
One by two PNP triodes, a NPN triode and the acceleration leadage circuit that phototriode is formed; Wherein, Two PNP triodes are specially a PNP triode and the 2nd PNP triode; The emitter of two PNP triodes is connected in the grid of open type MOS memory jointly; The base stage of the collector electrode of two PNP triodes and NPN triode links together, and the base stage of a PNP triode is connected in first end of photovoltaic diode array, and the base stage of the 2nd PNP triode is connected in the collector electrode of NPN triode; The emitter of phototriode is connected in the source electrode of open type MOS memory, and the collector electrode of phototriode is connected in the base stage of NPN pipe.
As a preferred version of such scheme, said relay also comprises a resistance, and said resistance is connected between the collector electrode of collector electrode and the 2nd PNP triode of a said PNP triode.
As another preferred version of such scheme, said relay also comprises a resistance, and said resistance is connected between the emitter of phototriode of emitter and described acceleration leadage circuit of said NPN triode.
Further, the open type MOS memory that is connected between relay output end is two, and wherein, the source electrode of two open type MOS memories links to each other, as the 3rd lead-out terminal of said relay; Two drain electrodes are respectively as first, second lead-out terminal of said relay.
Further, the open type MOS memory is the N channel enhancement.
The present invention compares with existing solid state relay, has following advantage or good effect:
1, the present invention realizes through output MOS memory gate capacitance is carried out charging and discharging; When carrying out the grid charging, the acceleration leadage circuit of mainly being made up of the 2nd PNP triode and NPN triode is in high-impedance state (being that device is in instead partially); And when carrying out the grid charge discharging resisting, after the current trigger of a PNP triode, produce the positive feedback mechanism of similar latch-up in the circuit, make leadage circuit be in low resistive state.This circuit structure has reached the quick conducting of relay and the purpose of shutoff, and these two kinds of circuit are realized that the control of conversion is to realize through the change that said photovoltaic diode array is exported.
2, the present invention has introduced phototriode; To the charging of output MOS memory grid the time, circuit is under the illumination state, and the phototriode of accelerated charging circuit is in low resistive state; So the resistance of charging circuit approximates the resistance after the phototriode conducting; It is opened and postpones to become very little, and the conducting of the phototriode of acceleration leadage circuit is under an embargo latch-up the emitter junction short circuit that NPN manages, thereby the path of releasing is in high-impedance state.
3, control circuit of the present invention is comparatively simple; Wherein the introducing of resistance can be controlled the trigger current size of a PNP triode in the preferred version; That can avoid also in addition that fluctuation by output end signal causes misleads; Antijamming capability is stronger, and does not have electric capacity in the entire circuit, can not increase area of chip.。
Description of drawings
Fig. 1 is the circuit theory diagrams of solid state relay embodiment one of the present invention.
Fig. 2 is the circuit theory diagrams of solid state relay embodiment two of the present invention.
Fig. 3 is the circuit theory diagrams of solid state relay embodiment three of the present invention.
Fig. 4 is the circuit theory diagrams of solid state relay embodiment four of the present invention.
Embodiment
Below in conjunction with accompanying drawing and concrete execution mode the present invention is done further elaboration.
The basic circuit structure of solid state relay of the present invention comprises: a light-emitting component, send light signal when receiving input current; A photovoltaic diode array, when receiving the light signal that said light-emitting component sends because photovoltaic effect produces electric current; What relay output end connected is an open type burning field-effect transistor.Also comprise a control circuit between light-emitting component and output field effect transistor in addition, this circuit is used to control discharging and recharging output field effect transistor grid.After said light-emitting component was connected, the illumination of photovoltaic diode array received had electric current output through photovoltaic effect, and charging circuit is started working, and leadage circuit is in high-impedance state, and photogenerated current charges to output field effect transistor grid through phototriode; Close at said light-emitting component and to have no progeny, light signal is cancelled, and the output of photovoltaic diode photovoltaic is cancelled, and quickens leadage circuit this moment and is switched on and is in low resistive state, and the electric charge on the output field effect transistor grid is released through leadage circuit.
Embodiment one:
According to a kind of embodiment of solid state relay of the present invention shown in the embodiment one of Fig. 1.Specifically comprise a light-emitting component 112 of following between relay input terminal 111 and the 111a;
During a coupling light-emitting component light signal, produce the photovoltaic diode array 113 of photovoltaic output;
An open type MOS memory 120 that is connected between relay output end;
Also comprise,
An accelerated charging circuit of forming by phototriode 114, wherein, the emitter of phototriode 114 connects the grid of output open type MOS memory 120, and collector electrode is connected on first end of photovoltaic diode array 113;
One by two PNP triodes, a NPN triode 119 and the acceleration leadage circuit that phototriode 118 is formed; Wherein, Two PNP triodes are specially a PNP triode 116 and the 2nd PNP triode 117; The emitter of two PNP triodes is connected in the grid of open type MOS memory 120 jointly; The base stage of the collector electrode of two PNP triodes and NPN triode 119 links together, and the base stage of a PNP triode 116 is connected in first end of photovoltaic diode array 113, and the base stage of the 2nd PNP triode 117 is connected in the collector electrode of NPN triode 119; The emitter of phototriode 118 is connected in the source electrode of open type MOS memory 120, and the collector electrode of phototriode 118 is connected in the base stage of NPN pipe 119.
Here, the base stage of phototriode 114,118 is unsettled, after illumination, produces electron hole pair at collector junction and makes transistor turns.The base stage of the 2nd PNP triode 117 links to each other with the collector electrode of NPN triode 19; The collector electrode of the 2nd PNP triode 117 links to each other with the base stage of NPN triode 119; This connected mode is utilized the principle of latch-up; The positive feedback of electric current can be formed, when the grid electric charge of open type MOS memory is released, leakage path fast will be formed.
The concrete course of work is following: add a forward voltage drop at input 111 with 111a; Light-emitting diode 112 is in running order; After receiving illumination, photovoltaic diode array 113 is in the photovoltaic output state; Phototriode 114 is in conducting state after illumination, this moment, PNP triode 116 emitter junctions were in short-circuit condition, and PNP triode 116 ends.The photogenerated current that photovoltaic diode array 113 produces flows out from the photovoltaic diode anode-array, charges on output field effect transistor 120 gate capacitance through phototriode 114, flows back to photovoltaic diode array 113 negative electrodes afterwards.Because phototriode 118 is in conducting state at this moment; So the emitter junction of NPN triode 119 is by short circuit; NPN triode 119 ends, thereby latch-up can not take place the circuit structure of being made up of PNP triode 117 and NPN triode 119, so photogenerated current will all be used for charging to exporting open type MOS memory gate capacitance; This moment, the impedance of whole charging circuit was determined by the conducting resistance of phototriode fully, thereby its unlatching postpones very little.
When input terminal voltage is cancelled, light-emitting diode 112 is no longer in running order, and the output of photovoltaic diode array 113 photovoltaics is cancelled, and effect is equivalent to the series connection form of general-purpose diode.Phototriode 114 ends, and is in high-impedance state.This moment, the function of circuit mainly was that the gate charge of output open type MOS memory 120 is released.The starting stage of releasing by output MOS memory 120 grids, PNP triode 116 emitter junctions, photovoltaic diode array, will be switched on to the loop of exporting open type MOS memory 120 source electrode 121a, the conducting of emitter junction makes PNP triode 116 be in conducting state.In case PNP triode 116 conductings; Then the emitter junction by output MOS memory 120 grids, PNP triode 116, NPN triode 119 will also be switched on to the loop of exporting open type MOS memory source electrode 121a; To have the base stage that electric current is injected into NPN triode 119 this moment; The collector current that its base current produces after amplifying will make 117 conductings of PNP triode again as the base current of PNP triode 117; In like manner; The collector current of PNP triode 117 is injected into as the base current of NPN triode 119 again, like this, has formed the positive current feedback that is similar to latch-up between PNP triode 117 and the NPN triode 119.Along with the bleed off of output open type MOS memory 120 grid electric charges, gate source voltage no longer can be kept the conducting in loop, and PNP triode 116 ends at this moment, and the trigger current of its generation is cancelled.But the positive feedback in the circuit does not rely on trigger current can keep after forming yet; And because the resistance of conducting is very low; The gate source voltage of the required open type metal-oxide-semiconductor field effect t 120 of keeping its positive feedback is also very low; Only need to guarantee that minimum sustaining voltage (about 1.5V) is lower than the threshold voltage of output open type metal-oxide-semiconductor field effect t 120, output MOS memory 120 grid electric charges will be released at a terrific speed finish.
Embodiment two:
As shown in Figure 2, as the optimal way of embodiment one, here, relay also comprises a resistance 215, and wherein, resistance 215 is connected between the collector electrode of collector electrode and the 2nd PNP triode 217 of a PNP triode 216.Here, the introducing of resistance 215 can reduce the probability that misleads from the trigger current that output end voltage fluctuation is caused, and the size of the size of resistance 215 electric current that determined to be triggered by a PNP triode 216.But concrete course of work reference implementation example one.
Embodiment three:
As shown in Figure 3, as another optimal way of embodiment one, here, relay also comprises a resistance 315, and resistance 315 is connected between the emitter of emitter and phototriode 318 of NPN triode 319.This change can be so that when reducing to mislead, thereby the impedance of passage becomes the gradient that makes trailing edge greatly and slows down and improved antimierophonic ability when releasing.But the concrete course of work is reference implementation example one also.
Embodiment four:
Circuit application scheme when Fig. 4 is two for output open type MOS memory.The source electrode of two open type MOS memories 420,420a links to each other, as the 3rd lead-out terminal of relay; Two drain electrodes are respectively as first, second lead-out terminal of relay.The sort circuit structure can be used in the communication environment, and per half current cycle has only one of them MOS memory work, but also reference implementation example one of the concrete course of work no longer describes.
Those of ordinary skill in the art will appreciate that embodiment described here is in order to help reader understanding's principle of the present invention, should to be understood that protection scope of the present invention is not limited to such special statement and embodiment.Those of ordinary skill in the art can make various other various concrete distortion and combinations that do not break away from essence of the present invention according to these teachings disclosed by the invention, and these distortion and combination are still in protection scope of the present invention.