CN102354536B - Test interface structure, test circuit and test method - Google Patents

Test interface structure, test circuit and test method Download PDF

Info

Publication number
CN102354536B
CN102354536B CN201110187397.6A CN201110187397A CN102354536B CN 102354536 B CN102354536 B CN 102354536B CN 201110187397 A CN201110187397 A CN 201110187397A CN 102354536 B CN102354536 B CN 102354536B
Authority
CN
China
Prior art keywords
module
digital signal
control signal
weld pad
small current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201110187397.6A
Other languages
Chinese (zh)
Other versions
CN102354536A (en
Inventor
钱亮
索鑫
何军
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Huahong Grace Semiconductor Manufacturing Corp
Original Assignee
Shanghai Huahong Grace Semiconductor Manufacturing Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Huahong Grace Semiconductor Manufacturing Corp filed Critical Shanghai Huahong Grace Semiconductor Manufacturing Corp
Priority to CN201110187397.6A priority Critical patent/CN102354536B/en
Publication of CN102354536A publication Critical patent/CN102354536A/en
Application granted granted Critical
Publication of CN102354536B publication Critical patent/CN102354536B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Abstract

The invention provides a test interface structure, a test circuit and a test method. The test interface structure for testing a flash memory body module comprises a test pad, a control signal module, a digital signal module, a high voltage module and an undercurrent signal module, and an arbitrary switch among the digital signal module, the high voltage module and the undercurrent signal module can be realized under the control of a control signal output by the control signal module to realize the multiplex function.

Description

Test interface structure, test circuit and method of testing
Technical field
The present invention relates to flash memory design field, it is more particularly related to a kind of be used for flash memory body module Test interface structure, the test circuit using this test interface structure and the corresponding method of testing tested.
Background technology
In the design and manufacture process of flash memories, need using test interface, flash memory body module to be carried out Test, to guarantee the reliability of flash memories.Specifically, flash memory body module specifically include flash memory matrix, Modular circuit such as decoding circuit and charge pump etc..Test interface can be used for the internal high pressure of test flash memory memory module, inside Electric current and input and output logic function, it may also be used for plus high-pressure, impressed current.
In the prior art, existing test interface is usually single, for example, can only test low-voltage, or can only survey Examination electric current, or only possess logic function.Even if there being multiplexing, but also not by high voltage, small current and digital logical hybrid Integrated.
With manufacturing cost control increasingly stricter, the drawbacks of the test interface of prior art shows, using two or Three interfaces of person are realizing high voltage, the input and output of small current and Digital Logic.So not only waste chip area, Er Qieying Ring the testing efficiency of chip, improve testing cost.
By high voltage, small current and digital logical hybrid are integrated into a test interface to the present invention, so can greatly contract Little chip area, thus can produce more chips on wafer.In addition, in the fixing situation of tester hardware condition Under, such structure can realize more massive test simultaneously, thus improving testing efficiency, reduce testing cost.
Content of the invention
The present invention is for reducing chip interface area, in the case that tester hardware condition is fixing, realizes more extensive Test simultaneously and reduce production cost.Thus that invents ties for the brand-new test interface that flash memory body module is tested Structure, test circuit and method of testing.
According to the first aspect of the invention, there is provided a kind of test interface for being tested to flash memory body module Structure, it includes:Testing weld pad, control signal module, digital signal module, high-pressure modular (more than 12V) and small current letter Number module (being accurate to na), wherein under the control of the control signal that control signal module is exported, you can realizes numeral letter Any switching laws between number module, high-pressure modular and current signal module, to realize the function of multiplexing.
Preferably, in the above-mentioned test interface structure for being tested to flash memory body module, flash memory Module includes the modular circuits such as flash memory matrix, decoding circuit and charge pump.
Preferably, in the above-mentioned test interface structure for being tested to flash memory body module, digital signal mould Transmitting digital signals between block and testing weld pad;And when needing supplied with digital signal, high-pressure modular and small current module will For high-impedance state, control signal module enables with output control signal, and testing weld pad connects to digital signal module, numeral Signal is input to chip internal under control of the control signal;To when needing output digit signals, high-pressure modular and current module For high-impedance state, control signal module enables with output control signal, and testing weld pad connects to digital signal module, so that number Word signal output is to testing weld pad.
Preferably, in the above-mentioned test interface structure for being tested to flash memory body module, high-pressure modular with High voltage signal is transmitted between testing weld pad;And when needing high input voltage signal, control signal module disconnects numeral letter Number module, high-pressure modular enables, so that high voltage signal directly can be input to high-pressure modular from testing weld pad, this high voltage (NMOS tube that grid end adds vdd voltage plays automatic isolation high pressure not to interfere with or damage digital module and small-signal module Effect);When needing output HIGH voltage, control signal module disconnects digital signal module, and high-pressure modular enables, and internal high voltages can Directly to export testing weld pad from high-pressure modular.
Preferably, in the above-mentioned test interface structure for being tested to flash memory body module, small current signal Small current signal is transmitted between module and testing weld pad;When needing input current signal, control signal module disconnects digital signal Module, high-pressure modular directly can be input to chip internal from testing weld pad for high-impedance state, small current;When needs output electricity Stream signal, control signal module disconnects digital signal module, and, for high-impedance state, small current is directly from small current mould for high-pressure modular Block exports testing weld pad.
Test interface structure according to a first aspect of the present invention, because a test interface can be multiplexed three kinds of functions, because This, be equivalent to and save two hardware resources.So, the area of chip will be less, under conditions of tester hardware is fixing, real Now more concurrent testings.
According to the second aspect of the invention, there is provided a kind of inclusion test interface knot described according to a first aspect of the present invention The test circuit of structure.Due to employing test interface structure described according to a first aspect of the present invention, therefore, people in the art Member is it is understood that test circuit according to a second aspect of the present invention is equally capable of according to the first aspect of the invention Advantageous Effects achieved by test interface structure.That is, because a test interface can be multiplexed three kinds of functions, therefore, Be equivalent to and save two hardware resources.So, the area of chip will be less, under conditions of tester hardware is fixing, realize More concurrent testings
According to the third aspect of the invention we, there is provided one kind is surveyed to flash memory body module using test interface structure Examination method of testing, described test interface structure include testing weld pad, control signal module, digital signal module, high-pressure modular, And small current signaling module, described method of testing includes:Under the control of the control signal that control signal module is exported, that is, Any switching laws between achievable digital signal module, high-pressure modular and current signal module, to realize the work(multiplexing Energy.
Similarly, using test interface structure, flash memory body module is being tested according to a third aspect of the present invention Method of testing in, because a test interface can be multiplexed three kinds of functions, therefore, be equivalent to and save two hardware resources. So, the area of chip will be less, under conditions of tester hardware is fixing, realize more concurrent testings
Brief description
In conjunction with accompanying drawing, and by reference to detailed description below, it will more easily have more complete understanding to the present invention And its adjoint advantages and features are more easily understood, wherein:
Fig. 1 schematically shows according to embodiments of the present invention connecing for the test that flash memory body module is tested The block diagram of mouth structure.
It should be noted that accompanying drawing is used for the present invention is described, and the unrestricted present invention.Note, represent that the accompanying drawing of structure can Can be not necessarily drawn to scale.And, in accompanying drawing, same or like element indicates same or like label.
Reference number explanation:
Pad:Pad
CS(Control Signal):Control signal
DS(Digital Signal):Digital signal
AS(Analog Signal):Analogue signal
CO(Current output):Electric current exports
Specific embodiment
In order that present disclosure is more clear and understandable, with reference to specific embodiments and the drawings in the present invention Appearance is described in detail.
Fig. 1 schematically shows according to embodiments of the present invention connecing for the test that flash memory body module is tested The block diagram of mouth structure.Specifically, flash memory body module specifically may include flash memory matrix, decoding circuit and charge pump Etc. modular circuit etc..
Test interface structure include testing weld pad pad, control signal module CS, digital signal module DS, high-pressure modular AS, And small current signaling module CO.Wherein, under the control of the control signal that control signal module CS is exported, digital signal mould Can be with any switching laws, to realize the function of multiplexing between block DS, high-pressure modular AS and small current signaling module CO.As Described in Fig. 1, test interface structure also includes the NMOS tube that a grid end adds VDD.
One of digital signal module DS, high-pressure modular AS and small current signaling module CO are passed with testing weld pad pad Signal transfer direction during delivery signal is two-way, can be from digital signal module DS, high-pressure modular AS and small current signal One of module CO transmits signal to testing weld pad pad, or alternatively it is also possible to from testing weld pad pad to digital signal One of module DS, high-pressure modular AS and small current signaling module CO transmit signal.
Transmitting digital signals between digital signal module DS and testing weld pad Pad;And when needing supplied with digital signal, High-pressure modular AS and small current module CO will be high-impedance state, and control signal module CS enables with output control signal, and surveys Test weld disk Pad connects to digital signal module DS, and digital signal is input to chip internal under control of the control signal;Work as needs Output digit signals, high-pressure modular AS and small current module CO will be high-impedance state, and control signal module CS enables to export control Signal processed, testing weld pad Pad connects to digital signal module DS, so that digital signal exports testing weld pad Pad.
High voltage signal is transmitted between high-pressure modular AS and testing weld pad Pad;And when needing high input voltage signal, Control signal module CS disconnects digital signal module DS, and high-pressure modular AS enables, so that high voltage signal can be directly from test Pad Pad is input to high-pressure modular AS, and this high voltage does not interfere with or damage digital module DS and small-signal module CO (grid The NMOS tube of end plus vdd voltage plays the automatic effect completely cutting off high pressure);When needing output HIGH voltage, control signal module CS is broken Open digital signal module, high-pressure modular AS enables, internal high voltages directly can export testing weld pad from high-pressure modular AS Pad.
Small current signal is transmitted between small current signaling module CO and testing weld pad Pad;When needing input current signal, control Signaling module CS processed disconnects digital signal module DS, and, for high-impedance state, small current can be directly from test weldering for high-pressure modular AS Disk Pad is input to chip internal;When needing output current signal, control signal module CS disconnects digital signal module DS, high pressure For high-impedance state, small current directly exports testing weld pad Pad from small current module CO to modules A S.
As can be seen that control signal module CS output control signal control digital signal module DS, high-pressure modular AS and Gating between small current module CO, high-pressure modular AS and small current module CO are to be automatically obtained isolation and gate.
In one particular embodiment of the present invention, that transmits between small current signaling module CO and testing weld pad pad is little Current signal is analogue signal.
Additionally, in one particular embodiment of the present invention, the high electricity of transmission between high-pressure modular AS and testing weld pad pad Pressure signal is simulation high voltage signal, and is, for example, the high voltage signal of 12V.
Because the hardware resource of test machine is limited, it is necessary to save hardware resource under the conditions of certain hardware resource, So could constantly reduce testing expense in the case that cost is fixing.As mentioned above, because a test interface can be answered With three kinds of functions, therefore, be equivalent to and save two hardware resources.So it is possible to realizing more concurrent testings.
In one embodiment of the invention, the present invention relates to a kind of include above-mentioned test interface structure test circuit.
And, in one embodiment of the invention, the present invention relates to a kind of method of testing as above.
Preferably, above-mentioned test interface structure, test circuit and method of testing are advantageously used for SIM (user's identification Card) big quantity concurrent testing.
Although it is understood that the present invention is disclosed as above with preferred embodiment, but above-described embodiment being not used to Limit the present invention.For any those of ordinary skill in the art, without departing under technical solution of the present invention ambit, The technology contents that the disclosure above all can be utilized are made many possible variations and modification, or are revised as to technical solution of the present invention Equivalent embodiments with change.Therefore, every content without departing from technical solution of the present invention, according to the technical spirit pair of the present invention Any simple modification made for any of the above embodiments, equivalent variations and modification, all still fall within the scope of technical solution of the present invention protection Interior.

Claims (8)

1. a kind of for test interface structure that flash memory body module is tested it is characterised in that including:Testing weld pad, Control signal module, digital signal module, high-pressure modular and small current signaling module, wherein defeated in control signal module institute Under the control of the control signal going out, you can realize appointing between digital signal module, high-pressure modular and small current signaling module Meaning switching, to realize the function of multiplexing, the wherein voltage of high-pressure modular is more than 12V, and the electricity of small current signaling module Stream can be accurate to na;
Wherein, transmitting digital signals between digital signal module and testing weld pad;And when needing supplied with digital signal, high pressure Module and small current signaling module will be high-impedance state, and control signal module enables with output control signal, and testing weld pad Connect to digital signal module, digital signal is input to chip internal under control of the control signal;Believe when needing output numeral Number, high-pressure modular and small current signaling module will be high-impedance state, and control signal module enables with output control signal, test weldering Disk connects to digital signal module, so that digital signal exports testing weld pad.
2. the test interface structure for being tested to flash memory body module according to claim 1, its feature exists In flash memory body module includes flash memory matrix, decoding circuit and charge pump.
3. the test interface structure for being tested to flash memory body module according to claim 1 and 2, its feature It is, between high-pressure modular and testing weld pad, transmit high voltage signal;And when needing high input voltage signal, control signal Module disconnects digital signal module, and high-pressure modular enables, so that high voltage signal directly can be input to high pressure from testing weld pad Module, this high voltage does not interfere with or damages digital signal module and small-signal module;When needing output HIGH voltage, control Signaling module disconnects digital signal module, and high-pressure modular enables, and internal high voltages directly can export test from high-pressure modular Pad.
4. the test interface structure for being tested to flash memory body module according to claim 1 and 2, its feature It is, between small current signaling module and testing weld pad, transmit small current signal;When needing input current signal, control signal mould Block disconnects digital signal module, and high-pressure modular is in high-impedance state, and small current can directly be input in chip from testing weld pad Portion;When needing output current signal, control signal module disconnects digital signal module, high-pressure modular for high-impedance state, little electricity Stream directly exports testing weld pad from small current signaling module.
5. a kind of test circuit it is characterised in that include according to one of Claims 1-4 for flash memory mould The test interface structure that block is tested.
6. a kind of method of testing flash memory body module tested using test interface structure, described test interface structure Including testing weld pad, control signal module, digital signal module, high-pressure modular and small current signaling module it is characterised in that Described method of testing includes:Under the control of the control signal that control signal module is exported, realize digital signal module, high pressure Module and the multiplexing of small current signaling module;
Wherein, transmitting digital signals between digital signal module and testing weld pad;And when needing supplied with digital signal, high pressure Module and small current signaling module will be high-impedance state, and control signal module enables with output control signal, and testing weld pad Connect to digital signal module, digital signal is input to chip internal under control of the control signal;Believe when needing output numeral Number, high-pressure modular and small current signaling module will be high-impedance state, and control signal module enables with output control signal, test weldering Disk connects to digital signal module, so that digital signal exports testing weld pad.
7. method of testing flash memory body module tested using test interface structure according to claim 6, It is characterized in that, transmit high voltage signal between high-pressure modular and testing weld pad;And when needing high input voltage signal, control Signaling module processed disconnects digital signal module, and high-pressure modular enables, so that high voltage signal can directly input from testing weld pad To high-pressure modular, this high voltage does not interfere with or damages digital signal module and small-signal module;When needing, output height is electric Pressure, control signal module disconnects digital signal module, and high-pressure modular enables, and internal high voltages can directly export from high-pressure modular To testing weld pad.
8. method of testing flash memory body module tested using test interface structure according to claim 6, It is characterized in that, transmit small current signal between small current signaling module and testing weld pad;When needing input current signal, control Signaling module disconnects digital signal module, and high-pressure modular is in high-impedance state, and small current can directly be input to from testing weld pad Chip internal;When needing output current signal, control signal module disconnects digital signal module, and high-pressure modular is for high resistant shape State, small current directly exports testing weld pad from small current signaling module.
CN201110187397.6A 2011-07-05 2011-07-05 Test interface structure, test circuit and test method Active CN102354536B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201110187397.6A CN102354536B (en) 2011-07-05 2011-07-05 Test interface structure, test circuit and test method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201110187397.6A CN102354536B (en) 2011-07-05 2011-07-05 Test interface structure, test circuit and test method

Publications (2)

Publication Number Publication Date
CN102354536A CN102354536A (en) 2012-02-15
CN102354536B true CN102354536B (en) 2017-02-08

Family

ID=45578077

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201110187397.6A Active CN102354536B (en) 2011-07-05 2011-07-05 Test interface structure, test circuit and test method

Country Status (1)

Country Link
CN (1) CN102354536B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111294036A (en) * 2019-07-17 2020-06-16 锐迪科创微电子(北京)有限公司 Pad multiplexing device and electronic equipment

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1434973A (en) * 2000-06-09 2003-08-06 三因迪斯克公司 EEPROM memory chip with multiple use pinouts
CN1988046A (en) * 2005-12-22 2007-06-27 松下电器产业株式会社 Semiconductor leakage current detector and leakage current measurement method, and semiconductor intergrated circuit thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1434973A (en) * 2000-06-09 2003-08-06 三因迪斯克公司 EEPROM memory chip with multiple use pinouts
CN1988046A (en) * 2005-12-22 2007-06-27 松下电器产业株式会社 Semiconductor leakage current detector and leakage current measurement method, and semiconductor intergrated circuit thereof

Also Published As

Publication number Publication date
CN102354536A (en) 2012-02-15

Similar Documents

Publication Publication Date Title
CN105116317B (en) Integrated circuit test system and method
CN100578240C (en) Method for implementing chip test
CN106531654B (en) A kind of chip input pin test method and device
CN104598405A (en) Expansion chip and expandable chip system and control method
CN103267940A (en) Multi-module parallel test system and multi-module parallel test method
CN102354536B (en) Test interface structure, test circuit and test method
CN102800364B (en) test system
CN103915416B (en) There is the electronic installation of thin membrane flip chip encapsulation
CN109164378B (en) Design and test method of boundary scan test link
CN104111400A (en) JTAG link interconnection method
ATE290744T1 (en) CUSTOMIZABLE CHIP CARD
CN101976216B (en) IEEE1500 standard-based IP core test structure and test method
CN102687520A (en) Digital television and system achieving serial communication
CN106872883A (en) It is a kind of to can be used for the test motherboard of various chips packing forms and method of testing
CN206060730U (en) A kind of A/D change-over circuits with self-checking function
CN102754208A (en) Bypass capacitor circuit and method of providing a bypass capacitance for an integrated circuit die
CN101995491B (en) Adaptation board, modifying method of double-station testing machine and testing method thereof
CN202631692U (en) Test adapter
CN204406394U (en) USB and ADC interface multiplexing circuit
CN203658400U (en) A probe card general board for a digital-analog hybrid chip wafer level test
CN104422867B (en) A kind of chip device and its method of testing
CN206161688U (en) General test fixture of camera module
CN103197197B (en) Extremely low power consumption digital circuit structure for open circuit detection and detection method thereof
CN206657085U (en) A kind of test motherboard available for various chips packing forms
CN207558780U (en) The perforation repair system of three dimensional integrated circuits chip

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
ASS Succession or assignment of patent right

Owner name: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING

Free format text: FORMER OWNER: HONGLI SEMICONDUCTOR MANUFACTURE CO LTD, SHANGHAI

Effective date: 20140428

C41 Transfer of patent application or patent right or utility model
TA01 Transfer of patent application right

Effective date of registration: 20140428

Address after: 201203 Shanghai Zhangjiang hi tech park Zuchongzhi Road No. 1399

Applicant after: Shanghai Huahong Grace Semiconductor Manufacturing Corporation

Address before: 201203 Shanghai Guo Shou Jing Road, Pudong New Area Zhangjiang hi tech Park No. 818

Applicant before: Hongli Semiconductor Manufacture Co., Ltd., Shanghai

C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant