CN102340366B

CN102340366B - Single clock source of gigabit and 10 gigabit compound network card

Info

Publication number: CN102340366B
Application number: CN201110205088.7A
Authority: CN
Inventors: 姚文浩; 郑臣明; 王晖; 王英; 柳胜杰; 郝志彬; 梁发清; 邵宗有; 刘新春; 杨晓君
Original assignee: Dawning Information Industry Co Ltd
Current assignee: The dawn of the Dragon Information Technology Co. Ltd.
Priority date: 2011-07-21
Filing date: 2011-07-21
Publication date: 2014-08-27
Anticipated expiration: 2031-07-21
Also published as: CN102340366A

Abstract

The invention provides a single clock source of a gigabit and 10 gigabit compound network card, and the clock source comprises a field-programmable crystal oscillator, a clock buffer, a 10 gigabit interface chip and an FPGA (field-programmable gate array) chip, wherein the output end of the field-programmable crystal oscillator is connected to the input end of the clock buffer, the output end of the clock buffer is connected to the 10 gigabit interface chip and the input end of an FPGA, and the output end of the FPGA is connected to the input end of the field-programmable crystal oscillator. By adopting the single clock source, the single clock source can be shared in the compound network card which needs a plurality of the crystal oscillators, thereby effectively reducing the cost and maintaining the stability of a system; furthermore, a reference clock of the system can be arbitrarily modified, thereby being conductive to debugging the system.

Description

A kind of single clock source of gigabit 10,000,000,000 compound network interface cards

Technical field

The present invention relates to network interface card clock source solution, be specifically related to a kind of adopt crystal oscillator CY2XF24 able to programme and clock buffer meet a plurality of clock frequency demands and can change into online optional frequency clock source.

Background technology

On current market, what everybody was seen is all independent gigabit and ten thousand Broadcoms.In order to meet some special demands, the interface of gigabit and 10,000,000,000 need to be made on the compound network interface card of same.No matter realize gigabit or 10,000,000,000, all need a high-precision reference clock, but need 125MHz, 155.52Mhz and 161.13Mhz simultaneously while realizing gigabit and 10,000,000,000 function.If adopt difference crystal oscillator that this three kinds of frequencies are provided, first the higher meeting of crystal oscillator price brings extra cost, and secondly a plurality of high frequency crystal oscillators can produce harmful effect to the SI of circuit, finally also can produce harmful effect to the wiring of PCB.

Summary of the invention

In order to address the above problem, the invention provides a kind of single clock source of gigabit 10,000,000,000 compound network interface cards.

A single clock source for gigabit 10,000,000,000 compound network interface cards, described clock source is by field-programmable crystal oscillator, clock buffer, 10,000,000,000 interface chips and fpga chip form;

Wherein, the output of field-programmable crystal oscillator is connected to the input of clock buffer, and the output of clock buffer is connected to the input of 10,000,000,000 interface chips and FPGA, and the output of FPGA is connected to the input of field-programmable crystal oscillator.

Preferably, there are four frequency memories described field-programmable crystal oscillator inside, can pre-stored four frequencies that set in advance.

Preferably, described FPGA passes through iic bus output frequency switching command to field-programmable crystal oscillator.

Preferably, if want the working frequency points that more renews, can be when work by iic bus by new working frequency points parameter downloads to field-programmable crystal oscillator.

Preferably, described new working frequency points parameter is lost after power-off, during every task, all will again download.

Preferably, described clock buffer store storage is from the clock signal of crystal oscillator able to programme, and carries out clock signal locking by fpga chip.

Preferably, described clock buffer store storage is from the clock signal of crystal oscillator able to programme, and carries out clock signal locking by 10,000,000,000 interface chips.

Preferably, when described clock source is operated in PCI-Express pattern, the signal of field-programmable crystal oscillator output is 125MHz, and while being operated in ten thousand Broadcom patterns, the signal of field-programmable crystal oscillator output is 155.52MHz.

Preferably, described field-programmable crystal oscillator adopts the CY2XF24F chip of Cypress company, and described clock buffer adopts the MC100LVEP210 chip of ONSEMI company, and described 10,000,000,000 interface chips adopt the VSC8479 chip of VITESSE company.

Preferably, described clock source acquiescence is first frequency being operated in field-programmable crystal oscillator.

By the invention enables in the compound network interface card of a plurality of crystal oscillators of needs, shared single clock source, effectively reduce cost, safeguard the stability of a system, and can, revising arbitrarily system reference clock, be conducive to system debug.

Accompanying drawing explanation

Fig. 1 is structure chart of the present invention

Embodiment

In order to use single crystal oscillator to produce whole clock frequencies, we have selected the CY2XF24F field-programmable crystal oscillator of Cypress, coordinate clock buffer MC100LVEP210 to provide reference clock to each main devices.CY2XF24F is 4 pre-programmed frequencies of internal reservoir again, then utilize iic bus to select which frequency of output.The IIC order of switching frequency is sent by FPGA program, and the program of FPGA guarantees the in the situation that of any incoming frequency, normally to send switching command through special processing.

In the process of this external debugging, sometimes can need some very special frequencies, although CY2XF24F is disposable programmable device, not need to change crystal oscillator.Can utilize IIC interface by the parameter downloads of new working frequency points in CY2XF24F.Make like this and can not revise inner parameter of having programmed, parameter modification during just by operation, all can lose by the parameter that IIC downloads after that is to say power-off, also needs software all to download at every turn.CY2XF24F can not revise the current frequency of having exported, and can revise other frequency point parameters and then switching past.

The meaning of doing is like this to use sundry item to programme but frequency is selected inconsistent residue crystal oscillator, can not cause room waste.And in particular cases only with software, just can revise arbitrarily the reference clock of system at some, facilitate system debug.

As shown in Figure 1, the LVPECL clock of CY2XF24F output is connected to the input of MC100LVEP210, and the output of MC100LVEP210 is connected respectively to 10,000,000,000 interface chips and FPGA upper (gigabit networking interface is realized by FPGA).The control interface of CY2XF24F is also connected on FPGA.Burned three required frequencies in advance in CY2XF24F, it is that CY2XF24F can give tacit consent to first frequency of output that system powers on, at this moment whole clock network is operated under 125MHz, and the GTP of FPGA can normally lock the signal of gigabit Ethernet, and now network interface card is operated in gigabit pattern.When needs are switched to 10,000,000,000 pattern, control interface by CY2XF24F switches its working frequency points 2, at this moment whole clock network is operated under 155.52MHz, from new initialization 10,000,000,000 network chips, it just can lock the signal of ten thousand mbit ethernets normally afterwards, can make system works in 10,000,000,000 patterns.

Claims

1. a single clock source for gigabit 10,000,000,000 compound network interface cards, is characterized in that: described clock source is by field-programmable crystal oscillator, clock buffer, and 10,000,000,000 interface chips and fpga chip form;

Wherein, the output of field-programmable crystal oscillator is connected to the input of clock buffer, and the output of clock buffer is connected to the input of 10,000,000,000 interface chips and FPGA, and the output of FPGA is connected to the input of field-programmable crystal oscillator;

Described field-programmable crystal oscillator adopts the CY2XF24F chip of Cypress company, and described clock buffer adopts the MC100LVEP210 chip of ONSEMI company, and described 10,000,000,000 interface chips adopt the VSC8479 chip of VITESSE company;

Described clock source acquiescence is first frequency being operated in field-programmable crystal oscillator;

There are four frequency memories described field-programmable crystal oscillator inside, for pre-stored four frequencies that set in advance;

Described FPGA passes through iic bus output frequency switching command to field-programmable crystal oscillator;

If want the working frequency points more renewing, when work, by iic bus, new working frequency points parameter downloads is arrived to field-programmable crystal oscillator.

2. single clock as claimed in claim 1 source, is characterized in that: described new working frequency points parameter is lost after power-off, during every task, all will again download.

3. single clock as claimed in claim 1 source, is characterized in that: described clock buffer store storage is from the clock signal of crystal oscillator able to programme, and carries out clock signal locking by fpga chip.

4. single clock as claimed in claim 1 source, is characterized in that: described clock buffer store storage is from the clock signal of crystal oscillator able to programme, and carries out clock signal locking by 10,000,000,000 interface chips.

5. single clock as claimed in claim 1 source, it is characterized in that: when described clock source is operated in PCI-Express pattern, the signal of field-programmable crystal oscillator output is 125MHz, while being operated in ten thousand Broadcom patterns, the signal of field-programmable crystal oscillator output is 155.52MHz.