CN102331808A

CN102331808A - Solar maximum power point tracking system and method for implementing same

Info

Publication number: CN102331808A
Application number: CN201110201474A
Authority: CN
Inventors: 周锎; 耿卫东; 杜学伟; 郑海华; 吕前进
Original assignee: TIANJIN HUIGAO MAGNETICS CO Ltd
Current assignee: TIANJIN HUIGAO MAGNETICS CO Ltd
Priority date: 2011-07-19
Filing date: 2011-07-19
Publication date: 2012-01-25
Anticipated expiration: 2031-07-19
Also published as: CN102331808B

Abstract

The invention relates to a solar maximum power point tracking system and a method for implementing the same. A system circuit consists of a front-end state detection circuit, a switching circuit, a controller, a rear-end state detection circuit, a rear-end signal conditioning circuit, a disturbance step-length generator, a disturbance cycle generator and a front-end signal conditioning circuit. By adoption of a control method for variable-cycle and variable-step-length disturbance, the controller, a data acquisition circuit and a logic control circuit can be designed into an integrated circuit. The solar maximum power point tracking system is implemented by using high-efficiency simple control software. The invention has the characteristics of simple circuit structure, simple software algorithm, low power consumption, high efficiency and the like; and the power consumption of the own power supply of the system can be reduced. By the invention, the control method for the maximum power point tracking and load tracking of a solar battery is realized, and load protection can be provided. The invention is particularly applicable to some small and medium-sized solar storage battery charging circuits and solar battery power stations which independently operate.

Description

Solar maximum power point tracker and its implementation

Technical field

The present invention relates to the photovoltaic power generation technology field; Be particularly related to a kind of solar maximum power point tracker and its implementation, system has the variable period variable step and carries out the function that the disturbance observation is followed the tracks of the solar cell maximum power point, can simplify the hardware and the software overhead of solar power system; Reduce the dynamic power consumption of power conversion circuit, can be used for solar cell stand alone generating system, grid-connected system etc.

Background technology

Sun power is the free of contamination huge energy of a kind of cleaning, develops the important directions that sun power will be human development in science and technology to greatest extent; Because the urgency of global energy crisis and environmental protection, the caution of the great nuclear accident in the world makes countries in the world government release the incentive policy and the rules of a series of development and use sun power and other novel renewable energy energetically; The whole world is presenting fast development trend in the investment of new energy fields such as photovoltaic generation, comprises governmental investment, risk capital and private capital stock etc., and this industry has become the popular domain of investment; Scientific research and technological development personnel troop that this field is engaged in the whole world go from strength to strength, considerably beyond other all spectras.China has become the production capacity big country of solar energy power generating module at present; Be in the critical stage of market development and application development; Therefore independent development patented technology, significant to correlation technique such as development China photovoltaic industry, new energy technology, distributed power grid and industry.

In fact; Because solar cell belongs to semiconductor devices, has tangible nonlinear characteristic, in order to realize the maximization of photovoltaic generating system output power; Solar cell in the work carries out MPPT maximum power point tracking, is one of gordian technique of solar cell generating.People have grasped the principle of solar cell MPPT maximum power point tracking at present, have had multiple solar cell maximum power point tracing method to be carried, as: constant voltage control method; The disturbance observation method, admittance method of addition, fuzzy control method; The ANN Control method, adaptive control law or the like.But the solar cell electricity generation system is a kind of system of more complicated, receives influence of various factors, and is not only relevant with solar cell itself, and relevant with duty of topology, loadtype and the load of the structure of electricity generation system, circuit for power conversion etc.The whole bag of tricks recited above respectively has relative merits in practical application,, good stability simple like the control of constant voltage control method, but control accuracy is poor, bad adaptability; And fuzzy control method control accuracy is high, dynamically and steady-state behaviour good, but complex algorithm needs complicated cpu controller, the cost of system itself and power consumption increase.Up to the present also there is not a kind of more satisfactory solar cell MPPT maximum power point tracking technology.Solar cell electricity generation system to reality is analyzed; The purpose of MPPT maximum power point tracking is under the prerequisite of trouble free service; Obtain the electric energy that solar cell sends to greatest extent, so simple in structure, efficient is high, working stability, adaptive strong system could satisfy the photovoltaic generating system needs.

Summary of the invention

The object of the invention is exactly for overcoming the deficiency of prior art; A kind of design proposal and implementation method of disturbance observation MPPT maximum power point tracking system of variable period variable step have been proposed; Under the big situation of changes in environmental conditions, can follow the tracks of the solar cell maximum power point fast; And under the stable situation of environmental baseline, system can be in the quiescent operation state, effectively reduces self power consumption.Thereby the simplification circuit structure improves system effectiveness.

The present invention realizes through such technical scheme: a kind of solar cell MPPT maximum power point tracking system; It is characterized in that circuit system is made up of front end state detection circuit, on-off circuit, controller, rear end state detection circuit, back end signal modulate circuit, disturbance step-length generator, disturbance cycle generator and front end signal modulate circuit;

The input end of said front end state detection circuit links to each other with the set of number output terminal of outside solar cell, ambient temperature sensor, outside light intensity sensor and controller respectively, and its output terminal links to each other with the input end of front end signal modulate circuit;

The input end of said front end signal modulate circuit links to each other with the output terminal of front end state detection circuit, and its output terminal links to each other with the input end of analog signal of disturbance cycle generator and the input end of analog signal of disturbance step-length generator respectively;

The input end of said rear end state detection circuit links to each other with the set of number output terminal of load dc bus output terminal, external loading temperature sensor and the controller of on-off circuit respectively, and its output terminal links to each other with the input end of back end signal modulate circuit;

The input end of said back end signal modulate circuit links to each other with the output terminal of rear end state detection circuit, and its output terminal links to each other with the input end of analog signal of disturbance cycle generator;

The input end of analog signal of said disturbance cycle generator links to each other with the analog signal output of front end signal modulate circuit and the analog signal output of back end signal modulate circuit respectively; Its digital controlled signal end links to each other with the set of number control signal end of controller; Data bus DATA links to each other with the data bus of controller, and its output terminal links to each other with an input end of disturbance step-length generator;

The input end of analog signal of said disturbance step-length generator links to each other with the analog signal output of front end signal modulate circuit, and its digital controlled signal end links to each other with the set of number control signal end of controller, and data bus DATA links to each other with the data bus of controller; Controller reads the content of disturbance step-length generator internal disturbance step length register through data bus DATA;

The digital control port of said controller links to each other with the digital controlled signal end of front end state detection circuit, the digital controlled signal end of rear end state detection circuit, the digital controlled signal end of disturbance step-length generator, the digital controlled signal end of disturbance cycle generator respectively; Its data bus links to each other with the data bus DATA end of disturbance step-length generator and disturbance cycle generator respectively, and its control output end links to each other with the control input end of on-off circuit;

The control input end of said on-off circuit links to each other with the control output end of controller; Power input links to each other with outside solar cell, and its power output end links to each other with the external loading dc bus;

Described front end state detection circuit inside is made up of zeroing calibration circuit, buffer circuit and output driving circuit; The voltage and current signal of outside light intensity sensor, temperature sensor and solar cell output passes through after the zeroing calibration circuit; In buffer circuit, isolate through isolating device independently respectively, then through outputing to the input end of analog signal of front end signal modulate circuit after the output driving circuit buffering; The digital controlled signal of controller output is used for controlling the zeroing calibration circuit, realizes each road simulating signal is carried out separate zeroing and calibration.

Described front end signal modulate circuit inside is made up of low-pass filter and signal normalization treatment circuit; Low-pass filter is used for the signal of gathering is carried out LPF, the filtering high-frequency interferencing signal; The signal normalization treatment circuit with the voltage signal of light intensity signal, temperature signal, photovoltaic cell and current signal be treated as a kind of unified standard 0 to the 3V voltage signal, output to the input end of analog signal of disturbance cycle generator and disturbance step-length generator.

The described front end state detection circuit of described rear end state detection circuit inner structure inner structure is identical; The DC bus-bar voltage of external loading temperature sensor and native system output and current signal output to the input end of back end signal modulate circuit later on through zeroing calibration, isolation and output driving circuit.

Described back end signal modulate circuit is identical with front end signal modulate circuit inner structure; Form by low-pass filter and signal normalization treatment circuit; After the DC bus-bar voltage of load circuit temperature signal and native system output and current signal process filtering and normalization are handled, become the input end of analog signal that the 0-3V voltage signal outputs to disturbance cycle generator; Described front end state detection circuit and front end signal modulate circuit are handled four tunnel simulating signals independently, are used for the solar cell MPPT maximum power point tracking; And rear end state detection circuit and back end signal modulate circuit are handled the three paths of independent simulating signal, are used for load tracking.

Described disturbance cycle generator inside is set logical circuit, cycle set-up register and system storage by MUX A, analog to digital conversion circuit A, data latches A, digital comparator, cycle and is formed; The input end of analog signal of MUX A links to each other with four analog signal outputs of front end signal modulate circuit and three analog signal outputs of back end signal modulate circuit respectively, corresponding the linking to each other of one group of control signal port of its digital controlled signal input end C5, C6, C7 and controller; The output terminal of MUX A links to each other with the input end of analog signal of analog to digital conversion circuit A; The digital signal input end C8 of analog to digital conversion circuit A, C9 and a digital signal output end C10 link to each other with one group of control signal port of control circuit, and the output terminal of analog to digital conversion circuit A links to each other with one group of data input pin of digital comparator and the data input pin of data latches A respectively; The data output end of data latches A links to each other with one group of data input pin of digital comparator, and its address control end links to each other with one group of control signal port of controller, receives the control signal of controller; The output terminal of digital comparator links to each other with the input end that the cycle is set logical circuit; The input end of cycle set-up register links to each other with the output terminal that the cycle is set logical circuit; Its output terminal links to each other with the input end E of described disturbance step-length generator; Digital comparator and cycle set-up register connect together through data bus DATA and controller; Controller can also can write initial value set-up register write cycle in the 16 inner cell data latchs of digital comparator to the limit protection value of simulating signal through the DATA bus.

Described disturbance step-length generator inside sets logical circuit by MUX B, analog to digital conversion circuit B, sequential circuit, data latches B, slope calculating circuit, step-length and the step-length set-up register is formed; The input end of analog signal of MUX B links to each other with four analog signal outputs of front end signal modulate circuit; Its output terminal links to each other with the input end of analog signal of analog to digital conversion circuit B, and its digital control input end links to each other with three digital output ends of sequential circuit; Two digital input end C20, the C21 of analog to digital conversion circuit B link to each other with the digital output end of sequential circuit; Its digital output end C22 links to each other with a digital input end of sequential circuit; One of which group data output end links to each other with one group of data input pin of slope calculating circuit, and another group data output end links to each other with the data input pin of data latches B; Another group data input pin of slope calculating circuit links to each other with the data output end of data latches B, and the slope calculating circuit has the set of number signal input output end to link to each other with sequential circuit; The input end that the output terminal of slope calculating circuit and step-length are set logical circuit links to each other, and the rate of change data of signal are outputed to step-length setting logical circuit; And set of number control signal end C13, the C14 of sequential circuit link to each other with controller, are used to start the marking signal of sequential circuit and slope calculating end; Another output terminal C15 that step-length is set logical circuit links to each other with a digital controlled signal port of controller, and its another output terminal links to each other with the step-length set-up register; The input end of step-length set-up register links to each other with the output terminal that step-length is set logical circuit; The step-length set-up register connects together through data bus DATA and controller, and controller can write the step-length set-up register to initial value through the DATA bus, also can be from step-length set-up register reading of data.

Described controller is realized by the single-chip microcomputer of user-programmable, through the control function of software set controller; In the cycle that controller is set according to the step-length and the cycle generator of the setting of disturbance step-length generator, the output control signal changes the dutycycle of on-off circuit, thereby realizes the MPPT maximum power point tracking and the load tracking of solar cell.

Zeroing calibration circuit in the described front end state detection circuit is made up of biswitch device a, biswitch device b, biswitch device c, biswitch device d, 2-4 code translator, biswitch device e, biswitch device f, biswitch device g and biswitch device h, constitutes four tunnel simulating signal zeroing calibration switch circuit independently; Four road input end of analog signal of zeroing calibration circuit link to each other with external sensor, and four way word signal input end link to each other with controller, and its output terminal is that the input end of four road analog signal outputs and buffer circuit links to each other; The 2-4 code translator has two-way digital controlled signal input end to link to each other with controller, is used for a road simulating signal being returned to zero and calibrate of selection four-way switch circuit of timesharing.

The implementation method of a kind of solar cell MPPT maximum power point tracking system is characterized in that said method comprises following order step:

After step 1, system powered on, controller was that inner step-length set-up register of disturbance step-length generator and the inner cycle set-up register of disturbance cycle generator are provided with initial value through data bus DATA; Limit protection value with simulating signal writes in the 16 cell data latchs of digital comparator simultaneously;

Step 2, controller send control information, start rear end state detection circuit test load voltage, electric current and load circuit temperature and currency, and the signal of gathering carried out filtering and normalization processing;

The inner digital comparator of step 3, disturbance cycle generator compares the data that prestore in the data of gathering and the 16 cell data latchs; If there are data to surpass the protection ultimate value; Then system gets into guard mode; Comprise needing the full electricity of storage batteries, load underloading or load faulty (high excessively like battery temp), the cycle set-up register is set is maximal value to disturbance cycle generator in this case, this moment controller with on-off circuit entering load tracking duty; According to the electricity consumption situation by-pass cock circuit of load, satisfy loading demand or close; If digital comparator is analyzed all data all in normal range, then comparer enables subtracter, by the data of gathering the content of cycle set-up register is set, and system gets into solar cell MPPT maximum power point tracking program;

Step 4, controller send control information, start the voltage of front end state detection circuit testing solar battery output, temperature and the isoparametric rate of change of light intensity and the currency of electric current solar panel, and the signal of gathering is carried out filtering and normalization processing; The data that the internal circuit comparison and analysis front end state detection circuit of disturbance step-length generator is gathered according to solar cell voltage, solar cell electric current, solar cell temperature and intensity variations rate, are provided with the value of step-length set-up register;

Step 5, controller read the content of step-length set-up register and cycle set-up register through the DATA data line, confirm the disturbance cycle and the step-length of current solar cell MPPT maximum power point tracking program, get into normal operating conditions;

Step 6, under normal operation; Disturbance cycle generator constantly carries out the calculating in disturbance cycle; Disturbance cycle generator is handled the data that the front end state detection circuit records; To current solar cell voltage, electric current, temperature and light intensity signal, double test data is carried out subtraction through digital comparator, the absolute value of difference is big more; The value that cycle is set logical circuit set-up register write cycle is more little, the content value of cycle set-up register (N < M) between N and M; Corresponding minimum cycle length of N value is one second, and the M value is one hour to the maximum corresponding cycle length;

Step 7, under normal operation; Disturbance step-length generator constantly carries out the calculating of disturbance step-length, and to be controller follow the tracks of the maximum power point of solar cell with great step-length to step-length, and disturbance step-length generator is delivered to analog to digital conversion circuit B with the currency timesharing of test data) carry out analog to digital conversion; Then data are sent into the slope calculating circuit; The result who calculates shows the speed that signal changes, if the variation of the voltage and current of solar cell is fast, needs to follow the tracks of fast its variation; Step-length is set the disturbance step-length that logical circuit will be bigger and is write the step-length set-up register, realizes that maximum power point follows the tracks of fast; Otherwise step-length is set logical circuit less disturbance step-length is write the step-length set-up register, realizes the slower tracking of maximum power point; The span of step-length set-up register is between X and Y; The corresponding disturbance step-length minimum of the value of X is 0, and the corresponding disturbance step-length of the value of Y is 20% of solar cell voltage rating to the maximum;

Step 8, as long as the data of step-length set-up register and cycle set-up register are refreshed; Controller reads numerical value wherein immediately again; Corresponding driving frequency and the dutycycle of changing, the driving switch circuit carries out solar cell MPPT maximum power point tracking or load tracking;

Step 9, when slope calculating circuit result calculated between positive and negative 0.017; Perhaps the digital comparator subtraction as a result difference less than 4 LSB; Show that signal changes slowly or when a period of time does not change; The content of cycle set-up register and step-length set-up register is not just rewritten, and controller does not carry out disturbance to the dutycycle of on-off circuit, and system is similar to quiescent operation;

Step 10, in solar cell MPPT maximum power point tracking program, system gets into the solar cell MPPT maximum power point tracking state of variable step constant voltage process control.

Advantage of the present invention and good effect: solar maximum power point tracker provided by the invention; Adopt the control method of variable period variable step disturbance, can controller, data acquisition circuit and logic control circuit be designed to an integrated circuit, adopted high efficiency simple Control Software to realize; It is simple to have circuit structure; Characteristics such as software algorithm is simple can reduce the power supply power consumption of system itself, have low-power consumption, high-efficiency characteristics; The present invention has simultaneously realized the control method of solar cell MPPT maximum power point tracking and load tracking, and load protection can be provided, and is particularly suitable for the solar cell power station of the solar storage battery charging circuit and the independent operating of some middle and small scales.

Description of drawings

Fig. 1 is the solar maximum power point tracker structured flowchart of variable period variable step disturbance;

Fig. 2 is the structured flowchart of front end state detection circuit 1;

Fig. 3 is the structured flowchart of front end signal modulate circuit 8;

Fig. 4 is the structured flowchart of disturbance cycle generator 7;

Fig. 5 is the structured flowchart of disturbance step-length generator 6;

Fig. 6 is the structured flowchart of zeroing and calibration circuit 9;

Fig. 7 is the structured flowchart of digital comparator 17.

Among the figure: 1. front end state detection circuit, 2. on-off circuit, 3. controller, 4. rear end state detection circuit, 5. back end signal modulate circuit; 6. disturbance step-length generator, 7. disturbance cycle generator, 8. front end signal modulate circuit, 9. zeroing calibration circuit, 10. buffer circuit; 11. output driving circuit, 12. low-pass filters, 13. signal normalization treatment circuits, 14. MUX A, 15. mode switching circuit A; 16. data latches A, 17. digital comparators, 18. cycles were set logical circuit, 19. cycle set-up registers, 20. system storages; 21. MUX B, 22. mode switching circuit B, 23. sequential circuits, 24. data latches B, 25. slope calculating circuit; 26. step-length is set logical circuit, 27. step-length set-up registers, 28. biswitch device a, 29. biswitch device b, 30. biswitch device c; 31. biswitch device d, 32.2-4 code translator, 33. biswitch device e, 34. biswitch device f, 35. biswitch device g; 36. biswitch device h, 33-36. biswitch device, 37. 16 cell data latchs, 38. comparers, 39. guard mode registers; 40. output data latch, 41. subtracters, 42. counters, 43. data latches for the first time, 44. data latches for the second time.

Embodiment

Understand the present invention for clearer, describe the present invention in detail in conjunction with accompanying drawing and embodiment:

To shown in Figure 7, circuit system is made up of front end state detection circuit 1, on-off circuit 2, controller 3, rear end state detection circuit 4, back end signal modulate circuit 5, disturbance step-length generator 6, disturbance cycle generator 7 and front end signal modulate circuit 8 like Fig. 1;

The input end of front end state detection circuit 1 links to each other with the set of number output terminal of outside solar cell, ambient temperature sensor, outside light intensity sensor and controller 3 respectively, and its output terminal links to each other with the input end of front end signal modulate circuit 8;

The input end of said front end signal modulate circuit 8 links to each other with the output terminal of front end state detection circuit 1, and its output terminal links to each other with the input end of analog signal of disturbance cycle generator 7 and the input end of analog signal of disturbance step-length generator 6 respectively;

The input end of rear end state detection circuit 4 links to each other with the set of number output terminal of load dc bus output terminal, external loading temperature sensor and the controller 3 of on-off circuit 2 respectively, and its output terminal links to each other with the input end of back end signal modulate circuit 5;

The input end of back end signal modulate circuit 5 links to each other with the output terminal of rear end state detection circuit 4, and its output terminal links to each other with the input end of analog signal of disturbance cycle generator 7;

The input end of analog signal of disturbance cycle generator 7 links to each other with the analog signal output of front end signal modulate circuit 8 and the analog signal output of back end signal modulate circuit 5 respectively; Its digital controlled signal end links to each other with the set of number control signal end of controller 3; Data bus DATA links to each other with the data bus of controller 3, and its output terminal links to each other with an input end of disturbance step-length generator 6;

The input end of analog signal of disturbance step-length generator 6 links to each other with the analog signal output of front end signal modulate circuit 8, and its digital controlled signal end links to each other with the set of number control signal end of controller 3, and data bus DATA links to each other with the data bus of controller 3; Controller 3 reads the content of disturbance step-length generator 6 internal disturbance step length register through data bus DATA;

The digital control port of controller 3 links to each other with the digital controlled signal end of front end state detection circuit 1, the digital controlled signal end of rear end state detection circuit 4, the digital controlled signal end of disturbance step-length generator 6, the digital controlled signal end of disturbance cycle generator 7 respectively; Its data bus links to each other with the data bus DATA end of disturbance step-length generator 6 and disturbance cycle generator 7 respectively, and its control output end links to each other with the control input end of on-off circuit 2;

The control input end of on-off circuit 2 links to each other with the control output end of controller 3; Power input links to each other with outside solar cell, and its power output end links to each other with the external loading dc bus;

Front end state detection circuit 1 inside is made up of zeroing calibration circuit 9, buffer circuit 10 and output driving circuit 11; The voltage and current signal of outside light intensity sensor, temperature sensor and solar cell output passes through after the zeroing calibration circuit 9; In buffer circuit 10, isolate through isolating device independently respectively, then through outputing to the input end of analog signal of front end signal modulate circuit 8 after output driving circuit 11 bufferings; The digital controlled signal of controller 3 outputs is used for controlling zeroing calibration circuit 9, realizes each road simulating signal is carried out separate zeroing and calibration.

Front end signal modulate circuit 8 inside are made up of low-pass filter 12 and signal normalization treatment circuit 13; Low-pass filter 12 is used for the signal of gathering is carried out LPF, the filtering high-frequency interferencing signal; Signal normalization treatment circuit 13 with the voltage signal of light intensity signal, temperature signal, photovoltaic cell and current signal be treated as a kind of unified standard 0 to the 3V voltage signal, output to the input end of analog signal of disturbance cycle generator 7 and disturbance step-length generator 6.

Described front end state detection circuit 1 inner structure of rear end state detection circuit 4 inner structures is identical; The DC bus-bar voltage of external loading temperature sensor and native system output and current signal output to the input end of back end signal modulate circuit 5 later on through zeroing calibration, isolation and output driving circuit;

Back end signal modulate circuit 5 is identical with front end signal modulate circuit 8 inner structures; Form by low-pass filter and signal normalization treatment circuit; After the DC bus-bar voltage of load circuit temperature signal and native system output and current signal process filtering and normalization are handled, become the input end of analog signal that the 0-3V voltage signal outputs to disturbance cycle generator 7; Described front end state detection circuit 1 and 8 processing four tunnel of front end signal modulate circuit are simulating signal independently, is used for the solar cell MPPT maximum power point tracking; And rear end state detection circuit 4 is handled the three paths of independent simulating signal with back end signal modulate circuit 5, is used for load tracking.

Disturbance cycle generator 7 inside are set logical circuit 18, cycle set-up register 19 and system storage 20 by MUX A14, analog to digital conversion circuit A15, data latches A16, digital comparator 17, cycle and are formed; The input end of analog signal of MUX A14 links to each other with four analog signal outputs of front end signal modulate circuit 8 and three analog signal outputs of back end signal modulate circuit 5 respectively, corresponding the linking to each other of one group of control signal port of its digital controlled signal input end C5, C6, C7 and controller 3; The output terminal of MUX A14 links to each other with the input end of analog signal of analog to digital conversion circuit A15; The digital signal input end C8 of analog to digital conversion circuit A15, C9 and a digital signal output end C10 link to each other with one group of control signal port of control circuit 3, and the output terminal of analog to digital conversion circuit A15 links to each other with one group of data input pin of digital comparator 17 and the data input pin of data latches A16 respectively; The data output end of data latches A16 links to each other with one group of data input pin of digital comparator 17, and its address control end links to each other with one group of control signal port of controller 3, accepts the control signal of controller 3; The output terminal of digital comparator 17 links to each other with the input end that the cycle is set logical circuit 18; The input end of cycle set-up register 19 links to each other with the output terminal that the cycle is set logical circuit 18; Its output terminal links to each other with the input end E of described disturbance step-length generator 6; Digital comparator 17 connects together through data bus DATA and controller 3 with cycle set-up register 19; Controller 3 can also can write initial value set-up register write cycle 19 in the 16 cell data latchs 36 of digital comparator 17 inside to the limit protection value of simulating signal through the DATA bus.

Disturbance step-length generator 6 inside set logical circuit 26 by MUX B21, analog to digital conversion circuit B22, sequential circuit 23, data latches B24, slope calculating circuit 25, step-length and step-length set-up register 27 is formed; The input end of analog signal of MUX B21 links to each other with four analog signal outputs of front end signal modulate circuit 8; Its output terminal links to each other with the input end of analog signal of analog to digital conversion circuit B22, and its digital control input end links to each other with three digital output ends of sequential circuit 23; Two digital input end C20, the C21 of analog to digital conversion circuit B22 link to each other with the digital output end of sequential circuit 23; Its digital output end C22 links to each other with a digital input end of sequential circuit 23; One of which group data output end links to each other with one group of data input pin of slope calculating circuit 25, and another group data output end links to each other with the data input pin of data latches B24; Another group data input pin of slope calculating circuit 25 links to each other with the data output end of data latches B24, and slope calculating circuit 25 has the set of number signal input output end to link to each other with sequential circuit 23; The input end that the output terminal of slope calculating circuit 25 and step-length are set logical circuit 26 links to each other, and the rate of change data of signal are outputed to step-length setting logical circuit 26; And the set of number control signal end C13 of sequential circuit 23, C14 link to each other with controller 3, are used to start the marking signal that sequential circuit 23 and slope calculating finish; Another output terminal C15 that step-length is set logical circuit 26 links to each other with a digital controlled signal port of controller 3, and its another output terminal links to each other with step-length set-up register 27; The input end of step-length set-up register 27 links to each other with the output terminal that step-length is set logical circuit 26; Step-length set-up register 27 connects together through data bus DATA and controller 3, and controller 3 can write step-length set-up register 27 to initial value through the DATA bus, also can be from step-length set-up register 27 reading of data.

Controller 3 is realized by the single-chip microcomputer of user-programmable, through the control function of software set controller 3; In the cycle that controller 3 is set according to the step-length and the cycle generator of the setting of disturbance step-length generator, the output control signal changes the dutycycle of on-off circuit 2, thereby realizes the MPPT maximum power point tracking and the load tracking of solar cell.

Zeroing calibration circuit 9 in the front end state detection circuit 1 is made up of biswitch device a28, biswitch device b29, biswitch device c30, biswitch device d31,2-4 code translator 32, biswitch device e33, biswitch device f34, biswitch device g35 and biswitch device h36, constitutes four tunnel simulating signal zeroing calibration switch circuit independently; Four road input end of analog signal of zeroing calibration circuit 9 link to each other with external sensor, and four way word signal input end link to each other with controller 3, and its output terminal is that the input end of four road analog signal outputs and buffer circuit 10 links to each other; 2-4 code translator 32 has two-way digital controlled signal input end to link to each other with controller 3, is used for a road simulating signal being returned to zero and calibrate of selection four-way switch circuit of timesharing.

Embodiment 1:

Solar maximum power point tracker as shown in Figure 1; Each element circuit is integrated; Be designed to a block system circuit board to on-off circuit 2, zeroing calibration circuit 9 and buffer circuit 10 as the sheet external component; Wherein: the input end of analog signal of front end state detection circuit 1 has four, links to each other with outside solar cell voltage sensor, solar cell current sensor, external temperature sensor and outside light intensity sensor respectively; The digital controlled signal end links to each other with the set of number control signal end of controller 3; Its four analog signal outputs link to each other with the input end of front end signal modulate circuit 8; Front end state detection circuit 1 is worked under the control of controller 3, accomplishes the detection to solar cell voltage, electric current, temperature and light intensity signal current state.

The input end of front end signal modulate circuit 8 has four, links to each other with four analog signal outputs of front end state detection circuit 1 respectively, and its output terminal links to each other with the input end of analog signal of disturbance step-length generator 6 with disturbance cycle generator 7; LPF and signal normalization treatment circuit that front end signal modulate circuit 8 is realized four tunnel simulating signals.

The input end of analog signal of rear end state detection circuit 4 has three, links to each other with the load temperature sensor with load DC bus-bar voltage sensor, load dc bus current sensor respectively; The digital controlled signal end links to each other with the set of number control signal end of controller 3; Its three analog signal outputs link to each other with the input end of back end signal modulate circuit 5; Rear end state detection circuit 4 is worked under the control of controller 3, accomplishes the detection to voltage, electric current and the load circuit temperature signal current state of load dc bus.

The input end of back end signal modulate circuit 5 has three, links to each other with three analog signal outputs of rear end state detection circuit 4 respectively, and its output terminal links to each other with the input end of analog signal of disturbance cycle generator 7; LPF and signal normalization treatment circuit that back end signal modulate circuit 5 is realized three tunnel simulating signals.

Disturbance step-length generator 6 input end of analog signal link to each other with the analog signal output of front end signal modulate circuit 8; Its data bus DATA links to each other with controller 3; Enable control input end E and link to each other with the control output end that enables of disturbance cycle generator 7, the digital controlled signal input end links to each other with controller 3; Disturbance step-length generator 6 is worked under the control of controller 3; Disturbance step-length generator 6 inside set logical circuit 26 by MUX B21, analog to digital conversion circuit B21, sequential circuit 23, data latches B24, slope calculating circuit 24, step-length and step-length set-up register 27 is formed; Wherein: the digital signal input end of MUX B21 links to each other with the digital signal output end of sequential circuit 23, and its output terminal links to each other with the analog input end of analog to digital conversion circuit B21; The input end of analog signal of analog to digital conversion circuit B21 links to each other with the output terminal of MUX B21; Its data output end has two groups; Link to each other with slope calculating circuit 24 with data latches B24 respectively, its digital controlled signal end links to each other with sequential circuit 23, work under the control of sequential circuit 23; The data input pin of data latches B24 links to each other with the data output end of analog to digital conversion circuit B21, and its data output end links to each other with slope calculating circuit 24, and its address links to each other with sequential circuit 23 with digital control end, work under the control of sequential circuit 23; The data input pin of slope calculating circuit 24 has two groups, links to each other with data latches B24 with analog to digital conversion circuit B21 respectively, and its output terminal is set logical circuit 26 with step-length and linked to each other, and its work startup links to each other with sequential circuit 23 with work complement mark signal; The input end that step-length is set logical circuit 26 links to each other with slope calculating circuit 24, and its data output end links to each other with step-length set-up register 27, and its digital signal output end links to each other with controller 3; The data input pin of step-length set-up register 27 is set logical circuit 26 with step-length and is linked to each other, and step-length is set logical circuit 26 and can both be read and write step-length set-up register 27 through data bus DATA with controller 3; Sequential circuit 23 produces the work that the various logic control signal is controlled disturbance step-length generator 6, and sequential circuit 23 is through set of number control signal end C13 C14 and controller 3 communications.

The input end of analog signal of disturbance cycle generator 7 links to each other with the analog signal output of front end signal modulate circuit 8 with back end signal modulate circuit 5; Its data bus DATA links to each other with controller 3; Enable control output end E and link to each other with the control input end that enables of disturbance step-length generator 6, the digital controlled signal input end links to each other with controller 3; Disturbance cycle generator 7 is worked under the control of controller 3; Disturbance cycle generator 7 inside set logical circuit 18 by MUX A14, analog to digital conversion circuit A15, data latches A16, digital comparator 17, cycle and cycle set-up register 19 is formed; Wherein: the digital signal input end of MUX A15 links to each other with the digital controlled signal end of controller 3, and its output terminal links to each other with the analog input end of analog to digital conversion circuit A15; The input end of analog signal of analog to digital conversion circuit A15 links to each other with the output terminal of MUX A14; The data output end of analog to digital conversion circuit A15 has two groups, links to each other with digital comparator 17 with data latches A16 respectively, and its digital controlled signal end links to each other with controller 3, work under the control of controller 3; The data input pin of data latches A16 links to each other with the data output end of analog to digital conversion circuit A15; Its data output end has two; Link to each other with system storage 20 with digital comparator 17 respectively, its address links to each other with controller 3 with digital control end, work under the control of controller 3; The data input pin of digital comparator 17 has two groups, links to each other with data latches A16 with analog to digital conversion circuit A15 respectively, and its output terminal is set logical circuit 18 with the cycle and linked to each other, and one of which group data relatively complement mark signal end C11 link to each other with controller 3; The input end that cycle is set logical circuit 18 links to each other with digital comparator 17, and its data output end links to each other with cycle set-up register 19, and the status signal end C12 of cycle setting value set-up register write cycle links to each other with controller 3; The data input pin of cycle set-up register 19 is set logical circuit 18 with the cycle and is linked to each other, and the cycle is set logical circuit 18 and can both read and write cycle set-up register 19 through data bus DATA with controller 3.

Controller 3 inside comprise CPU and internal storage, and its input end and system data line DATA can read the content of all latchs, RS through data line; Its output terminal is the various control signals of system, links to each other with front end signal modulate circuit 8 with front end state detection circuit 1, on-off circuit 2, controller 3, rear end state detection circuit 4, back end signal modulate circuit 5, disturbance step-length generator 6, disturbance cycle generator 7 respectively.

On-off circuit 2 inside comprise driver and high-power switch device, and on-off circuit 2 is performers of system, and its power input links to each other with solar cell, and the control input end links to each other with controller 3, and output terminal links to each other with load circuit.

Front end state detection circuit 1 is made up of zeroing calibration circuit, buffer circuit and output driving circuit with rear end state detection circuit 4 inside; The structure of calibration circuit of wherein returning to zero is as shown in Figure 6; Its implementation process is: four input end of analog signal of zeroing calibration circuit link to each other with external sensor; Its four digital controlled signal ends link to each other with controller 3, and its four analog signal outputs link to each other with the front end signal modulate circuit 8 or the back end signal modulate circuit 5 of back respectively; Controller 3 is controlled the zeroing and the calibration of four tunnel simulating signals through 2-4 code translator 32; When the input end C18 of 2-4 code translator 32 and C19 are 0; The output of 2-4 code translator 32 makes biswitch device 27 closures; Other biswitch devices break off, and the digital controlled signal of controller 3 outputs this moment is connected through terminal C16, C17 and biswitch device 32, and system can return to zero to the simulating signal by 32 controls of biswitch device and calibrate; During zeroing, C16=1, first switch contact of C17=0 biswitch device 32 joins with ground, and another contact is straight-through, by biswitch device 32 outputs 0 signal, just can return to zero to this signal processing circuit; During calibration, C16=0, second switch contact and the reference voltage Vref of C17=1 biswitch device 32 are joined, and another contact is straight-through, and therefore the circuit of back can be calibrated through the Vref reference voltage; In like manner, as C18 C19=0 1, C18 C19=1 0, during C18 C19=1 1, zeroing can realize its excess-three road simulating signal is returned to zero and calibrates with calibration circuit 9.Zeroing calibration circuit 9 adopts relay system biswitch device, and the zeroing that can realize simulating signal in the front of simulating signal buffer circuit is with more accurate.

Embodiment 2:

Following step is passed through in the realization of solar maximum power point tracker of the present invention successively:

The first, after system powered on, controller 3 was that disturbance step-length generator 6 inner step-length set-up registers 27 are provided with initial value with disturbance cycle generator 7 inner cycle set-up registers 19 through data bus DATA; Limit protection value with simulating signal writes in the 16 cell data latchs 37 of digital comparator 17 simultaneously.

The second, controller 3 sends control information, start rear end state detection circuit 4 test loads voltage, electric current and load circuit temperature and currency, and the signal of gathering carried out filtering and normalization processing.

Three, the data that prestore in the data of 17 pairs of collections of digital comparator of disturbance cycle generator 7 inside and the 16 cell data latchs 37 compare; If there are data to surpass the protection ultimate value; Then system gets into guard mode; Comprise needing the full electricity of storage batteries, load underloading or load faulty (high excessively like battery temp), disturbance cycle generator 7 is provided with cycle set-up register 19 and is maximal value in this case, and this moment, controller 3 got into the load tracking duties with on-off circuit 2; According to the electricity consumption situation by-pass cock circuit 2 of load, satisfy loading demand or close; If digital comparator 17 is analyzed all data all in normal range, then comparer 38 enables subtracter 41, by the data of gathering the content of cycle set-up register 19 is set, and system gets into solar cell MPPT maximum power point tracking program.

Four, controller 3 sends control information, starts the voltage of front end state detection circuit 1 testing solar battery output, temperature and the isoparametric rate of change of light intensity and the currency of electric current solar panel, and the signal of gathering is carried out filtering and normalization processing.The data that the internal circuit comparison and analysis front end state detection circuit 1 of disturbance step-length generator 6 is gathered according to solar cell voltage, solar cell electric current, solar cell temperature and intensity variations rate, are provided with the value of step-length set-up register 27.

Five, controller 3 reads the content of step-length set-up register 27 and cycle set-up register 19 through the DATA data line, confirms the disturbance cycle and the step-length of current solar cell MPPT maximum power point tracking program, gets into normal operating conditions.

Six, under normal operation, disturbance cycle generator 7 constantly carries out the calculating (power that the cycle promptly needs how long solar cell to be exported carries out the disturbance observation and follows the tracks of) in disturbance cycle.Disturbance cycle generator 7 is handled the data that front end state detection circuit 1 records; To current solar cell voltage, electric current, temperature and light intensity signal; Double test data is carried out subtraction through digital comparator 17; The absolute value of difference is big more, and the value that the cycle is set logical circuit set-up register 18 write cycle 19 is more little, the content value of cycle set-up register 19 (N < M) between N and M; Corresponding minimum cycle length of N value is one second, and the M value is one hour to the maximum corresponding cycle length.

Seven, under normal operation, disturbance step-length generator 6 constantly carries out the calculating (step-length is controller is followed the tracks of solar cell with great step-length a maximum power point) of disturbance step-length.Disturbance step-length generator 6 carries out analog to digital conversion with the analog to digital conversion circuit B21 that delivers to of the currency timesharing of test data; Then data are sent into slope calculating circuit 24; The result who calculates shows the speed that signal changes, if the variation of the voltage and current of solar cell is fast, needs to follow the tracks of fast its variation; Step-length is set the disturbance step-length (step-length) that logical circuit 26 will be bigger and is write step-length set-up register 27, realizes that maximum power point follows the tracks of fast; Otherwise step-length is set logical circuit 26 less disturbance step-length (step-length) is write step-length set-up register 27, realizes the slower tracking of maximum power point; The span of step-length set-up register 27 is between X and Y; The corresponding disturbance step-length minimum of the value of X is 0, and the corresponding disturbance step-length of the value of Y is 20% of solar cell voltage rating to the maximum.

Eight, as long as the data of step-length set-up register 27 and cycle set-up register 19 are refreshed; Controller 3 reads numerical value wherein immediately again; Corresponding driving frequency and the dutycycle of changing, driving switch circuit 2 carries out solar cell MPPT maximum power point tracking or load tracking.

Nine, when slope calculating circuit 24 result calculated very little; Perhaps difference is very little as a result for digital comparator 17 subtraction; Show that signal changes slowly or when a period of time does not change; The content of cycle set-up register 19 and step-length set-up register 27 is not just rewritten, and the dutycycle of 3 pairs of on-off circuits 2 of controller is not carried out disturbance, and system is similar to quiescent operation.

Ten, in solar cell MPPT maximum power point tracking program, system gets into the solar cell MPPT maximum power point tracking state of variable step constant voltage process control.

Embodiment 3:

The solar cell MPPT maximum power point tracking workflow of solar cell MPPT maximum power point tracking of the present invention system is following:

The structure of the solar cell MPPT maximum power point tracking system of variable period variable step disturbance is as shown in Figure 1, and the flow process of system stability work is:

The first step, front end state detection circuit 1 and rear end state detection circuit 4 are with circle collection solar cell voltage, solar cell electric current, solar cell temperature, solar irradiation light intensity, load DC bus-bar voltage, load dc bus current and load circuit temperature.

Second step; Front end signal modulate circuit 8 carries out LPF and signal normalization respectively with 5 pairs seven tunnel simulating signals of back end signal modulate circuit to be handled; 50Hz and above high frequency interference in the low pass filter filters out signal; The signal normalization treatment circuit amplifies simulating signal and level shift, and 0 to 3V normal voltage signal of output is delivered to disturbance step-length generator 6 and disturbance cycle generator 7 respectively.

The 3rd step; Accomplish the internal work of disturbance step-length generator 6, confirm the disturbance step-length of MPPT maximum power point tracking: solar cell voltage, solar cell electric current, solar cell temperature, solar irradiation light intensity four road analog input signals get into the input end of MUX B 21; Controller 3 starts disturbance step-length generator 6 internal time sequence circuit 23 through digital controlled signal C9; Sequential circuit 23 is brought in control MUX B21 and data register B23 through three controls; Article three, selection one tunnel simulating signal that can order when the state of control end from 000 to 011 changes; Output to 12 analog to digital conversion circuit B 21 and carry out analog to digital conversion, simultaneously the memory address of the specified data register B23 of order; Sequential circuit 23 control MUX B 21, analog to digital conversion circuit B 21 and data register B23 are at the appointed time to a certain road simulating signal continuous acquisition 2 times; Sequential circuit 23 is through the work of three digital signal line traffic control analog to digital conversion circuit B 21; When sequential circuit 23 is provided with C20, C21=0 0; Analog to digital conversion circuit B 21 beginnings are analog to digital conversion for the first time, and this moment, the data output end of analog to digital conversion circuit B21 linked to each other with data latches B24, after analog to digital conversion finishes; Mode converter B 22 draws high digital signal C22, simultaneously data latching is arrived data latches B24; Sequential circuit 23 is provided with C20, C21=1 0 then, starts analog to digital converter B21 and carries out the analog to digital conversion second time, and this moment, number converter B 21 elder generations dragged down digital signal C22; Begin analog to digital conversion then; When C20, C21=1 0, the data output end of analog to digital conversion circuit B21 links to each other with one group of data input pin of slope calculating circuit 24, waits after for the second time analog to digital conversion finishes; Mode converter B 22 draws high digital signal C22; Simultaneously data are outputed to slope calculating circuit 24, sequential circuit 23 is provided with C20, C21=1 1, and mode converter B 22 is in waiting status; Slope calculating circuit 24 utilizes the rate of change of this simulating signal of data computation of twice collection; After having calculated, slope calculating circuit 24 sends collection and the calculating that control signal is given the next simulating signal of sequential circuit 23 beginnings, and sequential circuit 23 finishes through signal wire C10 notification controller 3 these slope calculating simultaneously; Step-length setting logical circuit 26 latchs the result of calculation of slope calculating circuit 24, and after one group of four data was latched by the time, step-length was set logical circuit 26 analyses and compared four data; If temperature, light intensity, solar cell voltage, solar cell electric current have one to change; Show that the solar cell maximum power point changes, which changes maximum in these four data, judges that then the variation of solar cell maximum power point is caused by this factor; Just set the disturbance step-length according to the rate of change of this signal; Step-length is set the numerical value that logical circuit 26 calculates according to slope calculating circuit 24, and the value of rewriting step-length set-up register 27 increases or reduce the disturbance step-length; This process that circulates makes the rate of change of four signals be decreased to balance, finds new solar cell maximum power point.

The 4th goes on foot, and accomplishes the internal work of disturbance cycle generator 7, confirms the disturbance cycle of MPPT maximum power point tracking: seven road analog input signals of front get into the input end of MUX A 14; 1), the voltage of native system output following sequential processes seven tunnel simulating signals:, 2), the electric current of native system output, 3), the load circuit temperature; 4), solar cell voltage; 5), the solar cell electric current, 6), solar cell temperature, 7), the solar irradiation light intensity; Controller 3 is controlled the address of MUX A14 and data latches A16 through three control end C5, C6, the C7 of MUX A14; Selection one tunnel simulating signal that can order when the state from 000 to 110 of three control end C5, C6, C7 changes outputs to 12 analog to digital converter A 15 and carries out analog to digital conversion; Controller 3 is controlled the work of analog to digital converter A 15 through three control end C8, C9, the C10 of analog to digital converter A 15, and when control end C8, C9=0 0, analog to digital converter A 15 puts 0 with C10; The beginning analog to digital conversion, after analog to digital conversion finished, analog to digital converter A 15 put 1 with C10; Controller 3 makes control end C8, C9=1 0, and the data latching after analog to digital converter A 15 will change is to data latches A16, after controller 3 is waited for a software delay then; C8, C9=0 0 are set again, start analog to digital converter A 15 C10 is put 0, gather same simulating signal for the second time; After analog to digital conversion finishes; Analog to digital converter A 15 puts 1 with C10, and controller 3 is provided with C8C9=11, and digital comparator 17 is delivered in the output of analog to digital converter A 15; Digital comparator 17 should value and 16 cell data latchs 37 in analog value compare; If data do not go beyond the limit of protection value scope; Then from data latches A16, read a preceding latched data and currency and carry out subtraction; And operation result is latched into the cycle sets logical circuit 18, this relatively finishes digital comparator 17 through control signal C7 notification controller 3 simultaneously; Controller 3 changes the value of C5, C6, three control ends of C7, and next simulating signal is tested, and seven ASH are finished is one-period continuously; Cycle is set continuous seven the 12 bit error signals that logical circuit 18 receives digital comparator 17 outputs; When three data are all in normal range in front; Get into solar cell MPPT maximum power point tracking duty, all the other four data are compared and analyze, particularly two data of temperature and light intensity change more greatly; Show that then current solar cell working point is far away more apart from maximum power point; Which changes more greatly in these four data, then judges the variation of solar cell maximum power point because this parameter causes that the cycle is set logical circuit 18 and just selects these data as the foundation of rewriting cycle set-up register 19; The disturbance cycle that sets one second by one hour between; The value of 12 bit error signals is big more, and the cycle that sets is short more, in other words the electric current of the voltage of solar cell, solar cell, temperature and light intensity; As long as there is one big variation takes place; Then native system will be followed the tracks of the solar cell maximum power point with minimum one second cycle fast, if four variablees all do not have obvious variation, then native system will make system be bordering on the quiescent operation state with maximum one hour cycle.System sets the disturbance cycle of following the tracks of the solar cell maximum power point through logical circuit automatically according to the ambient condition of solar cell like this.As long as these four parameters change, the cycle is set the value that logical circuit 18 will be rewritten cycle set-up register 19, and controller 3 will change the frequency of disturbance.

Embodiment 4:

The load tracking flow process of solar cell MPPT maximum power point tracking of the present invention system is following:

After system powered on, controller 3 was that disturbance step-length generator 6 inner step-length set-up registers 27 are provided with initial value 0.1 through data bus DATA, for disturbance cycle generator 7 inner cycle set-up registers 19 were provided with initial value 60 seconds; Limit protection value with simulating signal writes in the specified register of digital comparator 17 simultaneously, and the rated voltage of setting the load accumulator is 48V, and upper limit (UL) protection value is 58.8V, and lowest limit protection value is 42.3V, and other parameters are normal.

Front end state detection circuit 1 is started working with rear end state detection circuit 4 simultaneously; With detected solar cell voltage, solar cell electric current, solar cell temperature, light intensity, accumulator busbar voltage, charge in batteries electric current and battery temp; Deliver to disturbance cycle generator 7 and disturbance step-length generator 6 through front end signal modulate circuit 8 and back end signal modulate circuit 5 respectively; The MUX A14 of disturbance cycle generator 7 inside is under the control of controller 3; Seven aanalogvoltages to gathering are in order delivered to the input end of analog to digital conversion circuit A15, for the voltage data of accumulator, the voltage data after the conversion for the first time are latched among the data latches A16; Corresponding data compares in voltage data that digital comparator 17 is changed analog to digital conversion circuit A15 for the second time and the 16 cell data latchs 37; If the voltage of the accumulator that record this moment is 58.8V, reached the greatest limit protection value of battery tension, 38 output control signal W are invalid for comparer; Subtracter is not worked; Comparer is read status code through output data latch set-up register 40 write cycle 19 according to the numerical value of counter 42 outputs from guard mode register 39 simultaneously, sets logical circuit 18 control signal C23 is drawn high; Controller 3 no longer carries out the MPPT maximum power point tracking disturbance to solar cell; Make system be in the load tracking duty, controller 3 will constantly read the data of battery tension, electric current and battery-operated temperature through data line DATA, according to the frequency and the dutycycle of the input control signal of the working condition by-pass cock circuit 2 of load.

Embodiment 5:

The implementation flow process of the zeroing calibration circuit 9 of solar maximum power point tracker of the present invention is following:

The zeroing calibration circuit 9 of front end state detection circuit 1 inside is as shown in Figure 6; Form by biswitch device a28, biswitch device b29, biswitch device c30, biswitch device d31, biswitch device e33, biswitch device f34, biswitch device g35, biswitch device h36 and 2-4 code translator 32, constitute four tunnel simulating signal zeroing calibration switch circuit independently; Its four input end of analog signal link to each other with external sensor, and its four digital controlled signal ends link to each other with controller 3, and its four analog signal outputs link to each other with the front end signal modulate circuit 8 of back respectively; Controller 3 is controlled the zeroing and the calibration of four tunnel simulating signals through 2-4 code translator 32; When the input end C18C19=00 of 2-4 code translator 32; The output of 2-4 code translator 32 makes biswitch device 27 closures; Other biswitch devices break off, and the digital controlled signal of controller 3 outputs this moment is connected through terminal C16, C17 and biswitch device 32, and system can return to zero to the simulating signal by 32 controls of biswitch device and calibrate; During zeroing, C16=1, first switch contact of C17=0 biswitch device 32 joins with ground, and another contact is straight-through, and biswitch device 32 outputs 0 signal just can return to zero to this Signal Processing circuit; During calibration, C16=0, C17=1, second switch contact and the reference voltage Vref of biswitch device 32 are joined, and another contact is straight-through, and therefore the circuit of back can be calibrated through the Vref reference voltage; In like manner, work as C18C19=01, C18C19=10, during C18C19=11, zeroing calibration circuit 9 can be realized its excess-three road simulating signal is returned to zero and calibrates.Zeroing is adopted relay system biswitch device with calibration circuit 9; The zeroing that can realize simulating signal in the front of simulating signal buffer circuit is with more accurate; Can before a collection of simulant signal, carry out the zeroing of signal and calibration, also can in officely what is the need for and to return to zero or carry out during calibrating signal signal.

According to above-mentioned explanation, can realize scheme of the present invention in conjunction with art technology.

Claims

1. solar cell MPPT maximum power point tracking system; It is characterized in that circuit system is made up of front end state detection circuit (1), on-off circuit (2), controller (3), rear end state detection circuit (4), back end signal modulate circuit (5), disturbance step-length generator (6), disturbance cycle generator (7) and front end signal modulate circuit (8); The input end of said front end state detection circuit (1) links to each other with outside solar cell, ambient temperature sensor, outside light intensity sensor and the set of number output terminal of controller (3) respectively, and its output terminal links to each other with the input end of front end signal modulate circuit (8); The input end of said front end signal modulate circuit (8) links to each other with the output terminal of front end state detection circuit (1), and its output terminal links to each other with the input end of analog signal of disturbance cycle generator (7) and the input end of analog signal of disturbance step-length generator (6) respectively; The input end of said rear end state detection circuit (4) links to each other with load dc bus output terminal, external loading temperature sensor and the set of number output terminal of controller (3) of on-off circuit (2) respectively, and its output terminal links to each other with the input end of back end signal modulate circuit (5); The input end of said back end signal modulate circuit (5) links to each other with the output terminal of rear end state detection circuit (4), and its output terminal links to each other with the input end of analog signal of disturbance cycle generator (7); The input end of analog signal of said disturbance cycle generator (7) links to each other with the analog signal output of front end signal modulate circuit (8) and the analog signal output of back end signal modulate circuit (5) respectively; Its digital controlled signal end links to each other with the set of number control signal end of controller (3); Data bus DATA links to each other with the data bus of controller (3), and its output terminal links to each other with an input end of disturbance step-length generator (6); The input end of analog signal of said disturbance step-length generator (6) links to each other with the analog signal output of front end signal modulate circuit (8); Its digital controlled signal end links to each other with the set of number control signal end of controller (3), and data bus DATA links to each other with the data bus of controller (3); Controller (3) reads the content of disturbance step-length generator (6) internal disturbance step length register through data bus DATA; The digital control port of said controller (3) links to each other with the digital controlled signal end of front end state detection circuit (1), the digital controlled signal end of rear end state detection circuit (4), the digital controlled signal end of disturbance step-length generator (6), the digital controlled signal end of disturbance cycle generator (7) respectively; Its data bus links to each other with the data bus DATA end of disturbance step-length generator (6) and disturbance cycle generator (7) respectively, and its control output end links to each other with the control input end of on-off circuit (2); The control input end of said on-off circuit (2) links to each other with the control output end of controller (3); Power input links to each other with outside solar cell, and its power output end links to each other with the external loading dc bus.

2. solar cell MPPT maximum power point tracking according to claim 1 system is characterized in that, described front end state detection circuit (1) is inner to be made up of zeroing calibration circuit (9), buffer circuit (10) and output driving circuit (11); The voltage and current signal of outside light intensity sensor, temperature sensor and solar cell output passes through after the zeroing calibration circuit (9); In buffer circuit (10), isolate through isolating device independently respectively, pass through the input end of analog signal that outputs to front end signal modulate circuit (8) after output driving circuit (11) buffering then; The digital controlled signal of controller (3) output is used for controlling zeroing calibration circuit (9), realizes each road simulating signal is carried out separate zeroing and calibration.

3. solar cell MPPT maximum power point tracking according to claim 1 system is characterized in that, described front end signal modulate circuit (8) is inner to be made up of low-pass filter (12) and signal normalization treatment circuit (13); Low-pass filter (12) is used for the signal of gathering is carried out LPF, the filtering high-frequency interferencing signal; Signal normalization treatment circuit (13) with the voltage signal of light intensity signal, temperature signal, photovoltaic cell and current signal be treated as a kind of unified standard 0 to the 3V voltage signal, output to the input end of analog signal of disturbance cycle generator (7) and disturbance step-length generator (6).

4. solar cell MPPT maximum power point tracking according to claim 1 and 2 system is characterized in that the described front end state detection circuit of described rear end state detection circuit (4) inner structure (1) inner structure is identical; The DC bus-bar voltage of external loading temperature sensor and native system output and current signal output to the input end of back end signal modulate circuit (5) later on through zeroing calibration, isolation and output driving circuit.

5. according to claim 1 or 3 described solar cell MPPT maximum power point tracking systems, it is characterized in that described back end signal modulate circuit (5) is identical with front end signal modulate circuit (8) inner structure; Form by low-pass filter and signal normalization treatment circuit; After the DC bus-bar voltage of load circuit temperature signal and native system output and current signal process filtering and normalization are handled, become the input end of analog signal that the 0-3V voltage signal outputs to disturbance cycle generator (7); Described front end state detection circuit (1) and front end signal modulate circuit (8) processing four tunnel be simulating signal independently, is used for the solar cell MPPT maximum power point tracking; And rear end state detection circuit (4) and back end signal modulate circuit (5) are handled the three paths of independent simulating signal, are used for load tracking.

6. solar cell MPPT maximum power point tracking according to claim 1 system; It is characterized in that described disturbance cycle generator (7) is inner to be made up of MUX A (14), analog to digital conversion circuit A (15), data latches A (16), digital comparator (17), cycle setting logical circuit (18), cycle set-up register (19) and system storage (20); The input end of analog signal of MUX A (14) links to each other with four analog signal outputs of front end signal modulate circuit (8) and three analog signal outputs of back end signal modulate circuit (5) respectively, corresponding the linking to each other of one group of control signal port of its digital controlled signal input end C5, C6, C7 and controller (3); The output terminal of MUX A (14) links to each other with the input end of analog signal of analog to digital conversion circuit A (15); The digital signal input end C8 of analog to digital conversion circuit A (15), C9 and a digital signal output end C10 link to each other with one group of control signal port of control circuit (3), and the output terminal of analog to digital conversion circuit A (15) links to each other with one group of data input pin of digital comparator (17) and the data input pin of data latches A (16) respectively; The data output end of data latches A (16) links to each other with one group of data input pin of digital comparator (17), and its address control end links to each other with one group of control signal port of controller (3), receives the control signal of controller (3); The output terminal of digital comparator (17) links to each other with the input end that the cycle is set logical circuit (18); The input end of cycle set-up register (19) links to each other with the output terminal that the cycle is set logical circuit (18); Its output terminal links to each other with the input end E of described disturbance step-length generator (6); Digital comparator (17) and cycle set-up register (19) connect together through data bus DATA and controller (3); Controller (3) can also can write initial value set-up register write cycle (19) in the 16 inner cell data latchs (36) of digital comparator (17) to the limit protection value of simulating signal through the DATA bus.

7. solar cell MPPT maximum power point tracking according to claim 1 system; It is characterized in that described disturbance step-length generator (6) is inner to be made up of MUX B (21), analog to digital conversion circuit B (22), sequential circuit (23), data latches B (24), slope calculating circuit (25), step-length setting logical circuit (26) and step-length set-up register (27); The input end of analog signal of MUX B (21) links to each other with four analog signal outputs of front end signal modulate circuit (8); Its output terminal links to each other with the input end of analog signal of analog to digital conversion circuit B (22), and its digital control input end links to each other with three digital output ends of sequential circuit (23); Two digital input end C20 of analog to digital conversion circuit B (22), C21 link to each other with the digital output end of sequential circuit (23); Its digital output end C22 links to each other with a digital input end of sequential circuit (23); One of which group data output end links to each other with one group of data input pin of slope calculating circuit (25), and another group data output end links to each other with the data input pin of data latches B (24); Another group data input pin of slope calculating circuit (25) links to each other with the data output end of data latches B (24), and slope calculating circuit (25) has the set of number signal input output end to link to each other with sequential circuit (23); The input end that the output terminal of slope calculating circuit (25) and step-length are set logical circuit (26) links to each other, and the rate of change data of signal are outputed to step-length setting logical circuit (26); And the set of number control signal end C13 of sequential circuit (23), C14 link to each other with controller (3), are used to start the marking signal that sequential circuit (23) and slope calculating finish; Another output terminal C15 that step-length is set logical circuit (26) links to each other with a digital controlled signal port of controller (3), and its another output terminal links to each other with step-length set-up register (27); The input end of step-length set-up register (27) links to each other with the output terminal that step-length is set logical circuit (26); Step-length set-up register (27) connects together through data bus DATA and controller (3), and controller (3) can write step-length set-up register (27) to initial value through the DATA bus, also can be from step-length set-up register (27) reading of data.

8. solar cell MPPT maximum power point tracking according to claim 1 system is characterized in that described controller (3) is realized by the single-chip microcomputer of user-programmable, through the control function of software set controller (3); In the cycle that controller (3) is set according to the step-length and the cycle generator of the setting of disturbance step-length generator, the output control signal changes the dutycycle of on-off circuit (2), thereby realizes the MPPT maximum power point tracking and the load tracking of solar cell.

9. solar cell MPPT maximum power point tracking according to claim 2 system; It is characterized in that; Zeroing calibration circuit (9) in the described front end state detection circuit (1) is made up of biswitch device a (28), biswitch device b (29), biswitch device c (30), biswitch device d (31), 2-4 code translator (32), biswitch device e (33), biswitch device f (34), biswitch device g (35) and biswitch device h (36), constitutes four tunnel simulating signal zeroing calibration switch circuit independently; Four road input end of analog signal of zeroing calibration circuit (9) link to each other with external sensor, and four way word signal input end link to each other with controller (3), and its output terminal is that the input end of four road analog signal outputs and buffer circuit (10) links to each other; 2-4 code translator (32) has two-way digital controlled signal input end to link to each other with controller (3), is used for a road simulating signal being returned to zero and calibrate of selection four-way switch circuit of timesharing.

10. the implementation method of solar cell MPPT maximum power point tracking system is characterized in that, said method comprises following order step:

After step 1, system powered on, controller (3) was that inner step-length set-up register (27) of disturbance step-length generator (6) and the inner cycle set-up register (19) of disturbance cycle generator (7) are provided with initial value through data bus DATA; Limit protection value with simulating signal writes in the 16 cell data latchs (36) of digital comparator (17) simultaneously;

Step 2, controller (3) send control information, start rear end state detection circuit (4) test load voltage, electric current and load circuit temperature and currency, and the signal of gathering carried out filtering and normalization processing;

The inner digital comparator (17) of step 3, disturbance cycle generator (7) compares the data that prestore in the data of gathering and the 16 cell data latchs (36); If there are data to surpass the protection ultimate value; Then system gets into guard mode; Comprise needing the full electricity of storage batteries, load underloading or load faulty (high excessively like battery temp), disturbance cycle generator (7) is provided with cycle set-up register (19) and is maximal value in this case, this moment controller (3) with on-off circuit (2) entering load tracking duty; According to the electricity consumption situation by-pass cock circuit (2) of load, satisfy loading demand or close; If digital comparator (17) is analyzed all data all in normal range, then comparer (38) enables subtracter (41), by the data of gathering the content of cycle set-up register (19) is set, and system gets into solar cell MPPT maximum power point tracking program;

Step 4, controller (3) send control information; Start the voltage of front end state detection circuit (1) testing solar battery output, temperature and the isoparametric rate of change of light intensity and the currency of electric current solar panel, and the signal of gathering is carried out filtering and normalization processing; The data that the internal circuit comparison and analysis front end state detection circuit (1) of disturbance step-length generator (6) is gathered; According to solar cell voltage, solar cell electric current, solar cell temperature and intensity variations rate, the value of step-length set-up register (27) is set;

Step 5, controller (3) read the content of step-length set-up register (27) and cycle set-up register (19) through the DATA data line, confirm the disturbance cycle and the step-length of current solar cell MPPT maximum power point tracking program, get into normal operating conditions;

Step 6, under normal operation; Disturbance cycle generator (7) constantly carries out the calculating in disturbance cycle; Disturbance cycle generator (7) is handled the data that front end state detection circuit (1) records; To current solar cell voltage, electric current, temperature and light intensity signal, double test data is carried out subtraction through digital comparator (17), the absolute value of difference is big more; The value that cycle is set logical circuit (18) set-up register write cycle (19) is more little, the content value of cycle set-up register (19) (N < M) between N and M; Corresponding minimum cycle length of N value is one second, and the M value is one hour to the maximum corresponding cycle length;

Step 7, under normal operation; Disturbance step-length generator (6) constantly carries out the calculating of disturbance step-length; Step-length is controller is followed the tracks of solar cell with great step-length a maximum power point; Disturbance step-length generator (6) carries out analog to digital conversion with the analog to digital conversion circuit B (22) that delivers to of the currency timesharing of test data, then data is sent into slope calculating circuit (25), and the result who calculates shows the speed that signal changes; If it is fast that the voltage and current of solar cell changes; Need follow the tracks of its variation fast, step-length is set and is write step-length set-up register (27) after logical circuit (26) increases by 1% with the disturbance step-length, and the realization maximum power point is followed the tracks of fast; Otherwise step-length setting logical circuit (26) reduces 1% with the disturbance step-length and writes step-length set-up register (27), realizes the slower tracking of maximum power point; The span of step-length set-up register (27) is between X and Y; The corresponding disturbance step-length minimum of the value of X is 0, and the corresponding disturbance step-length of the value of Y is 20% of solar cell voltage rating to the maximum;

Step 8, as long as the data of step-length set-up register (27) and cycle set-up register (19) are refreshed; Controller (3) reads numerical value wherein immediately again; Corresponding driving frequency and the dutycycle of changing, driving switch circuit (2) carries out solar cell MPPT maximum power point tracking or load tracking;

Step 9, when slope calculating circuit (24) result calculated between positive and negative 0.017; Perhaps digital comparator (17) subtraction result is less than 4LSB; Show that signal changes slowly or when a period of time does not change; The content of cycle set-up register (19) and step-length set-up register (27) is not just rewritten, and controller (3) does not carry out disturbance to the dutycycle of on-off circuit (2), and system is similar to quiescent operation;