CN102324936A - Unbalanced spatial filter for edge maladjustment correction of resistance averaging network - Google Patents
Unbalanced spatial filter for edge maladjustment correction of resistance averaging network Download PDFInfo
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- CN102324936A CN102324936A CN201110180914A CN201110180914A CN102324936A CN 102324936 A CN102324936 A CN 102324936A CN 201110180914 A CN201110180914 A CN 201110180914A CN 201110180914 A CN201110180914 A CN 201110180914A CN 102324936 A CN102324936 A CN 102324936A
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- edge
- spatial filter
- resistance
- averaging network
- imbalance
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Abstract
The invention belongs to the technical field of design of an analog integrated circuit, and particularly relates to an unbalanced spatial filter for edge maladjustment correction of a resistance averaging network. In the invention, the theory of the unbalanced spatial filter is introduced for the maladjustment at the edge of the resistance averaging network. Only a dummy unit is additionally arranged at the edge of the resistance averaging network, and the dummy unit at the edge is crosswise connected from the beginning to the end through a terminal resistor RT, so that the ratio of the RT/R1 is optimized, and maladjustment at the edge is suppressed. The filter is applied to a 4.25GS/s3b flash analog-to-digital converter. A test result shows that the static performance of the flash analog-to-digital converter can be greatly improved by the spatial filter.
Description
Technical field
The invention belongs to technical field of analog integrated circuit design, be specifically related to a kind of edge imbalance circuit for rectifying of resistance averaging network of superelevation speed flash pattern number converter.
Background technology
Analog to digital converter is the important component part in the mixed-signal system, and multiple structure type is arranged, and wherein dodging the pattern number converter is that all analog to digital converter medium velocities are the fastest, extensive use fields such as digital oscilloscope, disk read-write, ultra broadband, radar.
Dodging the pattern number converter generally all need use the resistance averaging network to eliminate the imbalance at random of preamplifier; But this technology is introduced bigger " edge effect " at boundary, and traditional way is to increase a large amount of dummy argument unit to make the amplifier of boundary enjoy the environment the same with intermediate amplifier.But this scheme can be wasted a large amount of power consumptions and signal swing.
Summary of the invention
The object of the present invention is to provide a kind of resistance averaging network edge imbalance circuit for rectifying, both increased considerably less extra power consumption, can alleviate the offset voltage of resistance averaging network edge again.
The invention provides a kind of non-equilibrium spatial filter that the imbalance of resistance averaging network edge is corrected that is applied to, this circuit comprises the average networking of traditional resistance, a dummy argument unit and cross-coupled terminal resistance R
TThrough optimizing R
T/ R
1Value can reduce and dodge integral nonlinearity (INL) and the differential nonlinearity (DNL) that pattern is counted converter.As shown in Figure 1, traditional resistance averaging network is by amplifier and average resistance R
1Form, with the output and the average resistance R of amplifier
1Link to each other; Can suppress the imbalance at random of intermediate amplifier; But because the residing environment of amplifier of edge is different with intermediate amplifier; Locate on the edge of to introduce extra imbalance, add a dummy amplifier (grey amplifier) through the next door of amplifier on the edge of, again with this dummy amplifier through terminal resistance R
TR is optimized in interconnection
T/ R
1Value, make that the suffered impulse of the amplifier of edge is corresponding identical with intermediate amplifier, improve the static properties that dodges the pattern number converter with this.
The present invention has introduced the theory of non-equilibrium spatial filter for the imbalance of resistance averaging network edge.It is through locating to add a large amount of dummy arguments on the edge of, make the residing environment of edge's amplifier identical with intermediate amplifier that the imbalance of traditional edge is corrected, and this scheme has been wasted a large amount of power consumptions, and has lost too much signal swing.The present invention is through only adding a dummy argument unit in resistance averaging network edge, and with the dummy argument of edge through terminal resistance R
THead and the tail intersect and link to each other, and optimize R
T/ R
1Ratio, R wherein
1Be average resistance.Non-equilibrium spatial filter through the present invention proposes is theoretical, works as R
T/ R
1Value be 2 o'clock, can suppress the imbalance of edge effectively.The present invention has greatly improved for the static properties that dodges the pattern number converter.
In the such scheme, the mistuning calibration function circuit that this circuit adopts can improve the static properties that dodges the pattern number converter under the situation that increases less power consumption.
In the such scheme, what the non-equilibrium spatial filter that this circuit proposes adopted is passive device, therefore can be operated in the above frequency of GHz.
In the such scheme, this circuit only need increase a dummy argument amplifying unit, and through optimizing terminal resistance R
TThe offset voltage that can suppress edge greatly.
The present invention has following beneficial effect:
1, utilizes the present invention, have greatly improved for the static properties that dodges the pattern number converter.It is through locating to add a large amount of dummy arguments on the edge of, make the residing environment of edge's amplifier identical with intermediate amplifier that the imbalance of traditional edge is corrected, and this scheme has been wasted a large amount of power consumptions, and has lost too much signal swing.The present invention is through only adding a dummy argument unit in resistance averaging network edge, and with the dummy argument of edge through terminal resistance R
THead and the tail intersect and link to each other, and optimize R
T/ R
1Ratio, suppress the imbalance of edge.
2, utilize the present invention, the mistuning calibration function circuit of employing can improve the static properties that dodges the pattern number converter under the situation that increases less power consumption.
3, utilize the present invention, what non-equilibrium spatial filter adopted in the circuit is passive device, therefore can be operated in the above frequency of GHz.
4, utilize the present invention, only need increase a dummy argument unit, and through optimizing R
T/ R
1The offset voltage that can suppress edge greatly.
Description of drawings
Fig. 1 is the structural representation that is applied to the non-equilibrium spatial filter circuit of resistance averaging network edge imbalance rectification provided by the invention.
Fig. 2 (a) is that the theoretical model (b) of resistance averaging network is a response function.
Fig. 3 is the theory analysis structural representation that is applied to the non-equilibrium spatial filter of resistance averaging network edge imbalance rectification provided by the invention.
Fig. 4 is the spatial excitation response function that is applied to the non-equilibrium spatial filter of resistance averaging network edge imbalance rectification provided by the invention.
Fig. 5 is the marginal error voltage optimization function curve that is applied to the non-equilibrium spatial filter of resistance averaging network edge imbalance rectification provided by the invention.
Fig. 6 is the rectification intensity curve that is applied to the non-equilibrium spatial filter of resistance averaging network edge imbalance rectification to integral nonlinearity (INL) and differential nonlinearity (DNL) provided by the invention.
Fig. 7 is applied to the test result that a 4.25GS/s 3b dodges the pattern number converter for the non-equilibrium spatial filter that is applied to the imbalance rectification of resistance averaging network edge provided by the invention.
Embodiment
Below in conjunction with accompanying drawing to further explain of the present invention.
As shown in Figure 1, the non-equilibrium spatial filter that is applied to the imbalance rectification of resistance averaging network edge is through dummy amplifier of increase in resistance averaging network border, and the dummy argument of edge is passed through terminal resistance R
THead and the tail intersect and link to each other, and optimize R
T/ R
1Ratio, suppress the imbalance of edge, improve the static properties of analog to digital converter.
The resistance averaging network can be analyzed with the space filtering theory, and shown in Fig. 2 (a), R1 is an average resistance, and R0 is the load impedance of preamplifier, and the mutual conductance of preamplifier is modeled as desirable current source.If a current i is arranged
s(n) get into the resistance averaging network, its can produce electric current on each bar branch road, but these electric currents vary in size in different positions, satisfies following the distribution, shown in Fig. 2 (b).
Spatial filter only can influence limited scope, and we define this scope is W
IR, work as W
IR=5, the significant response that from Fig. 2 (b), can obtain spatial filter surpasses 90%, the total regression scope of our acquiescence Here it is spatial filter.For node n, current equation is:
Owing to is along with the input signal of preamplifier changes, it only influences a certain definite scope, the preamplifier in this scope is in saturation condition, other then work in linear zone, can define another parameter W
Zx, generally speaking, guarantee
, so just can obtain enough signal gains.
It is unlimited that most of space filtering theory all is based on the space filtering response, does not consider the finiteness of border condition, perhaps just increases a large amount of dummy amplifiers on the border and makes the border approximate unlimited.The present invention proposes a kind of asymmetrical space filtering theory and optimize the voltage imbalance of boundary, only need to increase a dummy argument unit, and the dummy argument of edge is passed through terminal resistance R
THead and the tail intersect and link to each other, and optimize R
T/ R
1Ratio, suppress the imbalance of edge, as shown in Figure 1.
On the asymmetrical space filtering response nature be the non-equilibrium of boundary amplifier both sides environment and the response balance between contradiction, we suppose W
IR=5, so the limited range of the amplifier of boundary comprises the preamplifier of three black shown in Figure 3 and the dummy amplifier of two grey, the response of the space filtering of boundary can be expressed as so:
Arrive
Be the reference voltage that the resistance string ladder produces, g
mBe the mutual conductance of amplifier, I
TailIt is tail current source.If i
Out=0, can obtain the error voltage expression formula of boundary:
V
OvIt is the overdrive voltage of amplifier.
The non-equilibrium filter that can draw responds at the space filtering of boundary, and is as shown in Figure 4.The response curve on Fig. 4 the right receives R
T/ R
1Influence, the antagonism spatial filter is in the effective range of boundary.The more important thing is, the Optimization result that can draw the boundary offset voltage, as shown in Figure 5.Design R
T/ R
1Value be 2 o'clock, the offset voltage value that can be optimized at boundary.
Error compensation coefficient (ECF) is the performance that is commonly used to weigh spatial filter.
and
for before correcting with correct after equivalence input imbalance,
and
for before correcting with correct after equivalence import mutual conductance.
For integral nonlinearity (INL) and differential nonlinearity (DNL), the error compensation coefficient can be expressed as:
Fig. 6 has provided the rectification intensity curve of asymmetric spatial filter for integral nonlinearity (INL) and differential nonlinearity (DNL), can find out that asymmetric spatial filter has stronger rectification ability for differential nonlinearity (DNL).
Fig. 7 has provided the test result of the sudden strain of a muscle type 4.25GS/s 3b analog-to-digital conversion device that uses asymmetric spatial filter, has used asymmetric spatial filter, and the static properties of analog-to-digital conversion device is improved, especially the differential nonlinearity of analog to digital converter (DNL).
Claims (1)
1. one kind is used for the non-equilibrium spatial filter that the imbalance of resistance averaging network edge is corrected, and it is characterized in that adding a dummy argument unit in original resistance averaging network edge, and the dummy argument unit of edge is passed through terminal resistance R
THead and the tail intersect and link to each other, and optimize R
T/ R
1Ratio, suppress the imbalance of edge, wherein, R
TBe terminal resistance, R
1Be average resistance.
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104700373A (en) * | 2015-03-26 | 2015-06-10 | 清华大学 | Multi-scale Gaussian filter device for image analog signals and manufacturing method thereof |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1905158A (en) * | 2005-07-26 | 2007-01-31 | 台湾积体电路制造股份有限公司 | Method for reducing element efficiency mismatch and semiconductor circuit |
US20080266162A1 (en) * | 2007-04-30 | 2008-10-30 | National Taiwan University | Amplifier array circuits and flash analog to digital converters |
-
2011
- 2011-06-30 CN CN201110180914A patent/CN102324936A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1905158A (en) * | 2005-07-26 | 2007-01-31 | 台湾积体电路制造股份有限公司 | Method for reducing element efficiency mismatch and semiconductor circuit |
US20080266162A1 (en) * | 2007-04-30 | 2008-10-30 | National Taiwan University | Amplifier array circuits and flash analog to digital converters |
Non-Patent Citations (2)
Title |
---|
JUN-XIA MA 等: "A Power-Efficient 1.056 GS/s Resolution-Switchable 5-bit/6-bit Flash ADC for UWB Applications", 《CIRCUITS AND SYSTEMS, 2006. ISCAS 2006. PROCEEDINGS. 2006 IEEE INTERNATIONAL SYMPOSIUM ON 》 * |
XICHENG JIANG 等: "A 1-GHz Signal Bandwidth 6-bit CMOS ADC With Power-Efficient Averaging", 《IEEE JOURNAL OF SOLID-STATE CIRCUITS》 * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104700373A (en) * | 2015-03-26 | 2015-06-10 | 清华大学 | Multi-scale Gaussian filter device for image analog signals and manufacturing method thereof |
CN104700373B (en) * | 2015-03-26 | 2018-01-16 | 清华大学 | A kind of multiple dimensioned gaussian filtering device and its building method for image analoging signal |
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Application publication date: 20120118 |