CN102324223A - Display panel - Google Patents
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- CN102324223A CN102324223A CN201110290051A CN201110290051A CN102324223A CN 102324223 A CN102324223 A CN 102324223A CN 201110290051 A CN201110290051 A CN 201110290051A CN 201110290051 A CN201110290051 A CN 201110290051A CN 102324223 A CN102324223 A CN 102324223A
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Abstract
The invention provides a display panel comprising a time sequence controller used for outputting a clock signal, a voltage generator used for outputting a first voltage signal, a voltage level converter which is coupled with the time sequence controller and the voltage generator and is used for converting the first voltage signal into a second voltage signal, and a thin film transistor array substrate. The thin film transistor array substrate comprises a substrate, an active display region which is provided with at least one thin film transistor, a grid driving circuit which is coupled with the voltage level converter and the thin film transistor and is used for generating a grid driving voltage signal according to the second voltage signal, and a sensing circuit which is arranged on the substrate, is coupled with the voltage level converter and is used for sensing the second voltage signal to generate a third voltage signal and outputting the third voltage to a voltage generator, wherein the voltage generator adjusts the first voltage signal output by the voltage generator according to the third voltage signal and generates the grid driving voltage signal according to the first voltage signal to drive the grid of the thin film transistor.
Description
Technical field
The present invention relates to display panel, relate in particular to the display panel that on substrate, is integrated with sensing circuit.
Background technology
LCD (liquid crystal display; LCD) have low radiation, volume is little and advantage such as low power consuming; (cathode ray tube display CRT), thereby is widely used in notebook computer, personal digital assistant (personal digital assistant to replace traditional cathode-ray tube display gradually; PDA), flat-surface television, or on the information products such as mobile phone.The type of drive of traditional monitor is to utilize external source driving circuit (source driver) and gate driver circuit (gate driver) to drive pixel on the panel with display image; Develop into gradually in recent years driving circuit structure directly is made on the array base palte of display panel; For example gate driver circuit (gate driver) is integrated in the array base palte of display panel; Be the capable driving of array base palte (gate driver on array, GOA) technology.But adopt the GOA framework, for driving circuit, like gate driver circuit; Its driving force generally receives the temperature effect of operating environment; When the temperature of operating environment is hanged down, possibly make the gate driver circuit driving force not enough, can not the driven grid thereby cause.
In existing GOA framework, generally being employed in increases by one group of thermal control compensate circuit on the power circuit, not enough with the driving force that solves the driving circuit in the GOA framework under the low temperature.Specifically, generally be on power circuit, to increase by one group of thermal control compensate circuit, this thermal control compensate circuit is made up of general resistance and thermistor that some are welded on the assembled printed circuit boards usually.Though this thermal control compensate circuit can compensate the not enough problem of driving force of driving circuit under the low-temperature operation environment, the difference that faces drives ability in the GOA framework that causes because of process variation is felt simply helpless.Generally speaking, under the different batches of reasonable processing procedure, thin film transistor (TFT) (thin film transistor, conducting electric current I TFT) will appear
ONSize has certain difference, i.e. some conducting electric current I
ONHigher, and some conducting electric current I
ONLower, and the conducting electric current I
ONSize be into corresponding relation with the driving force of driving circuit, that is, work as I
ONHigher, then the driving force of pairing driving circuit is preferable, works as I
ONLower, then the driving force of pairing driving circuit is relatively poor.Therefore, existing temperature-compensation circuit can't improve the difference of the driving force of the driving circuit that different batches caused in the processing procedure.In addition; In the existing GOA framework; The voltage that power supply provided can pass through the voltage level converter carry out voltage level conversion after, and must just can input to driving circuit afterwards, therefore through one section wiring (layout trace); Can cause voltage attenuation (decay) in this process, this may influence the quality (the for example output waveform distortion of gate drive signal) of signal.
Summary of the invention
In order to solve above-mentioned existing issue, the present invention proposes a kind of display panel, comprise: time schedule controller, in order to export a clock pulse signal; One voltage generator is in order to export one first voltage signal; One voltage level converter is coupled to said time schedule controller and said voltage generator, in order to convert said first voltage signal into one second voltage signal; An and thin-film transistor array base-plate.Wherein, thin-film transistor array base-plate comprises: a substrate; One active viewing area is arranged on the said substrate, has at least one thin film transistor (TFT); One gate driver circuit is arranged on the said substrate, is coupled to said voltage level converter and said thin film transistor (TFT), in order to produce a gate drive voltage signal according to said second voltage signal; And a sensing circuit, be arranged on the said substrate, be coupled to said voltage level converter, in order to said second voltage signal of sensing to produce a tertiary voltage signal and to transfer to said voltage generator; Wherein, said voltage generator is adjusted its said first voltage signal of exporting according to said tertiary voltage signal, and produces said gate drive voltage signal in view of the above to drive the grid of said thin film transistor (TFT).
Preferably, said sensing circuit comprises:
One the first transistor, its grid and source electrode write request signal in order to import one:
One transistor seconds, the drain electrode of its grid and said the first transistor is coupled to a first node, the said clock signal of its drain electrode input, said first node place is in order to import said second voltage signal;
One the 3rd transistor, its grid and the said clock signal of drain electrode input;
One the 4th transistor, its grid is coupled to the drain electrode of said the first transistor, and its source electrode is coupled to the said the 3rd transistorized source electrode, and its drain electrode couples a ground signalling;
One the 5th transistor, its grid are coupled to the said the 3rd transistorized source electrode, and its drain electrode is coupled to said the 3rd transistor drain;
One the 6th transistor, its grid is coupled to the drain electrode of said the first transistor, and its drain electrode is coupled to the said the 5th transistorized source electrode;
One the 7th transistor, its grid are coupled to the said the 5th transistorized source electrode, and its drain electrode is coupled to the drain electrode of said the first transistor, and its source electrode couples said ground signalling; And
One the 8th transistor, its grid are coupled to the said the 5th transistorized source electrode, and its source electrode couples said ground signalling, and its drain electrode is coupled to one second contact with the source electrode of said transistor seconds, and the said second contact place is in order to export said tertiary voltage signal.
Preferably, said sensing circuit also comprises: one the 9th transistor, and its grid is in order to import a reset signal, and its drain electrode couples the drain electrode of said the first transistor, and its source electrode couples said ground signalling.
Preferably, said sensing circuit also comprises: one first electric capacity, and the one of which end couples said Section Point, and its other end couples said ground signalling, in order to the undesired signal of the said tertiary voltage signal of filtering.
Preferably, said voltage generator comprises: a voltage comparison unit, and its input end is coupled to said sensing circuit, has a reference voltage, in order to said tertiary voltage and said reference voltage are compared to produce a comparison signal; And a voltage generation unit, its input end is coupled to said voltage comparison unit, in order to produce said first voltage signal according to said comparison signal.
Preferably; Said first voltage signal comprises one first high-level voltage signal and one first low level voltage signal; Said reference voltage comprises a high levels reference voltage and a low level reference voltage; Said high levels reference voltage is corresponding with the said first high-level voltage signal, and said low level reference voltage is corresponding with the said first low level voltage signal.
Preferably, the said first high-level voltage signal is in order to provide positive gate voltage, and the said first low level voltage signal is in order to provide negative-gate voltage.
Preferably, the material of said substrate is a glass.
By on can know; Display panel proposed by the invention; Integrated sensing circuit on its substrate; Input to the voltage signal of gate driver circuit and produce an output signal with sensing and transfer to voltage generator, and voltage generator according to its output of the output signal of sensing circuit adjustment to improve the driving force of gate driver circuit.Technical scheme proposed by the invention has been taken into account temperature compensation of the prior art, also can improve the not enough problem of driving force that different batches caused in the processing procedure, also can the voltage attenuation that wiring is caused be compensated.
Description of drawings
Fig. 1 has illustrated the structural representation of the display panel of an embodiment of the present invention;
Fig. 2 has illustrated sensing circuit and the electrical block diagram of voltage generator among Fig. 1; And
Sequential chart when Fig. 3 has illustrated temperature-sensitive sticker and the voltage generator running among Fig. 2.
Embodiment
Below will and specify clear explaination embodiment of the present invention with accompanying drawing, for the purpose of simplifying accompanying drawing, some known habitual structures and assembly will illustrate with the mode of simple signal in the accompanying drawings.
With reference to Fig. 1, Fig. 1 has illustrated the structural representation of the display panel of an embodiment of the present invention.
As shown in Figure 1, display panel 1 comprises: time schedule controller (timingcontroller) 11, a voltage generator 12, a voltage level converter (level shifter) 13 and one thin-film transistor array base-plate 14.Wherein, time schedule controller 11 is in order to export a clock pulse signal CLK; Voltage generator 12 is in order to export one first voltage signal V
1Voltage level converter 13 is coupled to time schedule controller 11 and voltage generator 12 in order to the first voltage signal V
1Convert one second voltage signal V into
2, in this embodiment, the second voltage signal V
2The first voltage signal V that is different from of voltage level
1Voltage level.
As shown in Figure 1, thin-film transistor array base-plate 14 comprises: a substrate 141, is viewing area 142, a gate driver circuit 143 and a sensing circuit 144 initiatively.Wherein,, in this embodiment, be glass material for substrate 141, but not as limit; Initiatively viewing area 142 is arranged on the substrate 141, and it has at least one thin film transistor (TFT) (not illustrating); Gate driver circuit 143 is arranged on the substrate 141, is coupled to voltage level converter 13 and the thin film transistor (TFT) in the viewing area 142 initiatively, in order to according to the second voltage signal V
2Produce a gate drive voltage signal V
gSensing circuit 144 is arranged on the substrate 141, is coupled to voltage level converter 13, in order to the sensing second voltage signal V
2To produce a tertiary voltage signal V
3And transfer to voltage generator 12.What need explanation is, in this embodiment, 144 sensings of sensing circuit be the second voltage signal V that voltage level converter 13 is exported
2And through the signal (inputing to the signal of gate driver circuit 143) after the wiring, in other words, the second voltage signal V
2Be through just inputing in the sensing circuit 144 after one section wiring.
In this embodiment, voltage generator 12 can be according to tertiary voltage signal V
3Adjust the first voltage signal V that it is exported
1, voltage level converter 13 will be according to this first voltage signal V then
1The corresponding second voltage signal V that produces
2, afterwards, gate driver circuit 143 corresponding output gate drive voltage signal V
gGrid with drive thin film transistors.
Below with reference to Fig. 2, Fig. 2 has illustrated sensing circuit and the electrical block diagram of voltage generator among Fig. 1.
As shown in Figure 2, sensing circuit 144 comprises: a first transistor T
1, its grid and source electrode write request signal Write in order to import one; One transistor seconds T
2, its grid and the first transistor T
1Drain electrode be coupled to a first node N
1, this first node N
1The place is as the input point (Q) of this sensing circuit 144, promptly in order to import the second aforementioned voltage signal V
2, its drain electrode input clock signal CLK; One the 3rd transistor T
3, its grid and drain electrode input clock signal CLK; One the 4th transistor T
4, its grid is coupled to the first transistor T
1Drain electrode, its source electrode is coupled to the 3rd transistor T
3Source electrode, its drain electrode couples a ground signalling V
SsOne the 5th transistor T
5, its grid is coupled to the 3rd transistor T
3Source electrode, its drain electrode is coupled to the 3rd transistor T
3Drain electrode; One the 6th transistor T
6, its grid is coupled to the first transistor T
1Drain electrode, its drain electrode is coupled to the 5th transistor T
5Source electrode; One the 7th transistor T
7, its grid is coupled to the 5th transistor T
5Source electrode, its drain electrode is coupled to the first transistor T
1Drain electrode, its source electrode couples ground signalling V
SsAnd, one the 8th transistor, its grid is coupled to the 5th transistor T
5Source electrode, its source electrode couples said ground signalling V
Ss, its drain electrode and transistor seconds T
2Source electrode be coupled to one second contact N
2, this Section Point N
2The place is as the output point (O) of this sensing circuit 144, promptly in order to export aforementioned tertiary voltage signal V
3
In this embodiment, sensing circuit 144 can also comprise: one the 9th transistor T
9, its grid is in order to import a reset signal Rst, and its drain electrode couples the first transistor T
1Drain electrode, its source electrode couples ground signalling V
Ss
In this embodiment, sensing circuit 144 can also comprise: one first capacitor C
1, the one of which end couples Section Point N
2, its other end couples ground signalling V
Ss, this capacitor C
1In order to filtering tertiary voltage signal V
3Undesired signal.
As shown in Figure 2, voltage generator 12 comprises: a voltage comparison unit 121 and a voltage generation unit 122.Wherein, voltage comparison unit 121 is coupled to sensing circuit 144, and specifically, its input end is coupled to the Section Point N in the sensing circuit 144
2This voltage comparison unit 144 is in order to tertiary voltage V
3With a reference voltage V
RefCompare, and produce a comparison signal, in this embodiment, this reference voltage V
RefCan be given through inside.Voltage generation unit 122, its input end is coupled to voltage comparison unit 121, in order to produce the first aforementioned voltage signal V according to this comparison signal
1
In this embodiment, the first voltage signal V
1Can be one first high-level voltage signal V
1hAnd one first low level voltage signal V
1l, wherein, the first high-level voltage signal is in order to provide positive gate voltage V to thin film transistor (TFT)
Gh, the first low level voltage signal is in order to provide negative-gate voltage V to thin film transistor (TFT)
G1Accordingly, reference voltage V
RefComprise a high levels reference voltage V
RefhAn and low level reference voltage V
Refl, high levels reference voltage V
RefhWith the first high-level voltage signal V
1hCorresponding, low level reference voltage V
ReflWith the first low level voltage signal V
1lCorresponding.
With reference to Fig. 3, the sequential chart when Fig. 3 has illustrated temperature-sensitive sticker and the voltage generator running among Fig. 2.
As shown in Figure 3, in this embodiment, when the read signal in the voltage comparison unit in the voltage generator 12 121 is logical one (true), such as t
1And t
2Time period, then voltage comparison unit 121 will be read the signal that sensing cell 144 is exported, i.e. tertiary voltage signal V
3, and with itself and the reference voltage V that sets
RefDo comparison, when both are unequal, voltage generation unit 122 will be adjusted its output, promptly change the first voltage signal V
1, up to V
3With V
RefTill equating.
By on can know; Display panel proposed by the invention; Integrated sensing circuit on its substrate; Input to the voltage signal of gate driver circuit and produce an output signal with sensing and transfer to voltage generator, and voltage generator according to its output of the output signal of sensing circuit adjustment to improve the driving force of gate driver circuit.Technical scheme proposed by the invention has been taken into account temperature compensation of the prior art, also can improve the not enough problem of driving force that different batches caused in the processing procedure, also can the voltage attenuation that wiring is caused be compensated.
In the preceding text, illustrate and describe embodiment of the present invention.But those skilled in the art can understand, and under situation without departing from the spirit and scope of the present invention, can also specific embodiments of the invention do various changes and replacement.These changes and replacement all drop in claims of the present invention institute restricted portion.
Claims (8)
1. a display panel is characterized in that, comprises:
Time schedule controller is in order to export a clock pulse signal;
One voltage generator is in order to export one first voltage signal;
One voltage level converter is coupled to said time schedule controller and said voltage generator, in order to convert said first voltage signal into one second voltage signal; And
One thin-film transistor array base-plate comprises:
One substrate;
One active viewing area is arranged on the said substrate, has at least one thin film transistor (TFT);
One gate driver circuit is arranged on the said substrate, is coupled to said voltage level converter and said thin film transistor (TFT), in order to produce a gate drive voltage signal according to said second voltage signal; And
One sensing circuit is arranged on the said substrate, is coupled to said voltage level converter, in order to said second voltage signal of sensing to produce a tertiary voltage signal and to transfer to said voltage generator;
Wherein, said voltage generator is adjusted its said first voltage signal of exporting according to said tertiary voltage signal, and produces said gate drive voltage signal in view of the above to drive the grid of said thin film transistor (TFT).
2. display panel according to claim 1 is characterized in that, said sensing circuit comprises:
One the first transistor, its grid and source electrode write request signal in order to import one:
One transistor seconds, the drain electrode of its grid and said the first transistor is coupled to a first node, the said clock signal of its drain electrode input, said first node place is in order to import said second voltage signal;
One the 3rd transistor, its grid and the said clock signal of drain electrode input;
One the 4th transistor, its grid is coupled to the drain electrode of said the first transistor, and its source electrode is coupled to the said the 3rd transistorized source electrode, and its drain electrode couples a ground signalling;
One the 5th transistor, its grid are coupled to the said the 3rd transistorized source electrode, and its drain electrode is coupled to said the 3rd transistor drain;
One the 6th transistor, its grid is coupled to the drain electrode of said the first transistor, and its drain electrode is coupled to the said the 5th transistorized source electrode;
One the 7th transistor, its grid are coupled to the said the 5th transistorized source electrode, and its drain electrode is coupled to the drain electrode of said the first transistor, and its source electrode couples said ground signalling; And
One the 8th transistor, its grid are coupled to the said the 5th transistorized source electrode, and its source electrode couples said ground signalling, and its drain electrode is coupled to one second contact with the source electrode of said transistor seconds, and the said second contact place is in order to export said tertiary voltage signal.
3. display panel according to claim 2 is characterized in that, said sensing circuit also comprises:
One the 9th transistor, its grid is in order to import a reset signal, and its drain electrode couples the drain electrode of said the first transistor, and its source electrode couples said ground signalling.
4. display panel according to claim 2 is characterized in that, said sensing circuit also comprises:
One first electric capacity, the one of which end couples said Section Point, and its other end couples said ground signalling, in order to the undesired signal of the said tertiary voltage signal of filtering.
5. display panel according to claim 1 is characterized in that, said voltage generator comprises:
One voltage comparison unit, its input end is coupled to said sensing circuit, has a reference voltage, in order to said tertiary voltage and said reference voltage are compared to produce a comparison signal; And
One voltage generation unit, its input end is coupled to said voltage comparison unit, in order to produce said first voltage signal according to said comparison signal.
6. display panel according to claim 5; It is characterized in that; Said first voltage signal comprises one first high-level voltage signal and one first low level voltage signal; Said reference voltage comprises a high levels reference voltage and a low level reference voltage, and said high levels reference voltage is corresponding with the said first high-level voltage signal, and said low level reference voltage is corresponding with the said first low level voltage signal.
7. display panel according to claim 6 is characterized in that, the said first high-level voltage signal is in order to provide positive gate voltage, and the said first low level voltage signal is in order to provide negative-gate voltage.
8. display panel according to claim 1 is characterized in that, the material of said substrate is a glass.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110290051A CN102324223A (en) | 2011-09-21 | 2011-09-21 | Display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110290051A CN102324223A (en) | 2011-09-21 | 2011-09-21 | Display panel |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN102324223A true CN102324223A (en) | 2012-01-18 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201110290051A Pending CN102324223A (en) | 2011-09-21 | 2011-09-21 | Display panel |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105989813A (en) * | 2015-03-20 | 2016-10-05 | 矽创电子股份有限公司 | Gate driving circuit and display module |
| CN107464520A (en) * | 2017-09-15 | 2017-12-12 | 惠科股份有限公司 | Display device and its driving method |
| CN107799072A (en) * | 2016-09-07 | 2018-03-13 | 达意科技股份有限公司 | Electric paper display device |
| CN108877659A (en) * | 2018-08-03 | 2018-11-23 | 京东方科技集团股份有限公司 | Gate driving circuit, display device and its driving method |
-
2011
- 2011-09-21 CN CN201110290051A patent/CN102324223A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105989813A (en) * | 2015-03-20 | 2016-10-05 | 矽创电子股份有限公司 | Gate driving circuit and display module |
| US10013943B2 (en) | 2015-03-20 | 2018-07-03 | Sitronix Technology Corp. | Gate driving circuit and display module |
| CN107799072A (en) * | 2016-09-07 | 2018-03-13 | 达意科技股份有限公司 | Electric paper display device |
| CN107799072B (en) * | 2016-09-07 | 2020-08-11 | 元太科技工业股份有限公司 | Electronic paper display device |
| CN107464520A (en) * | 2017-09-15 | 2017-12-12 | 惠科股份有限公司 | Display device and its driving method |
| WO2019051927A1 (en) * | 2017-09-15 | 2019-03-21 | 惠科股份有限公司 | Display device and driving method therefor |
| CN108877659A (en) * | 2018-08-03 | 2018-11-23 | 京东方科技集团股份有限公司 | Gate driving circuit, display device and its driving method |
| US11017872B2 (en) | 2018-08-03 | 2021-05-25 | Boe Technology Group Co., Ltd. | Gate driving circuit, display device and driving method |
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Application publication date: 20120118 |