CN102315385B - Method for making storage unit of phase-change random access memory - Google Patents

Method for making storage unit of phase-change random access memory Download PDF

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CN102315385B
CN102315385B CN 201010228246 CN201010228246A CN102315385B CN 102315385 B CN102315385 B CN 102315385B CN 201010228246 CN201010228246 CN 201010228246 CN 201010228246 A CN201010228246 A CN 201010228246A CN 102315385 B CN102315385 B CN 102315385B
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layer
etching
phase change
nitration case
dielectric constant
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CN102315385A (en
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洪中山
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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Abstract

The invention provides a method for making a storage unit of a phase-change random access memory. The method comprises the following steps of: providing a bottom electrode and a phase change layer positioned on the bottom electrode, wherein the bottom electrode and the phase change layer are formed in an insulating layer; depositing three laminated etching stop layers on the surfaces of the phasechange layer and the insulating layer, wherein the three laminated etching stop layers sequentially comprise a deposited first nitride layer, an oxide layer and a second nitride layer; sequentially depositing a low-dielectric constant material layer and a coating photoresistive glue layer on the surfaces of the three laminated etching stop layers; exposing, developing and patterning the photoresistive glue layer; defining the position of a top electrode; etching the low-dielectric constant material layer into the three laminated etching stop layers by taking the patterned photoresistive glue layer as a mask and stopping; etching the second nitride layer into the oxide layer and stopping; etching the oxide layer into the first nitride layer and stopping; etching the first nitride layer; and filling an etching position to form the top electrode after the phase change layer is exposed. By the method, the loss of the phase change layer is effectively reduced during etching of the positionof the top electrode.

Description

The manufacture method of phase-change memory storage unit
Technical field
The present invention relates to technical field of manufacturing semiconductors, particularly a kind of manufacture method of phase-change memory storage unit.
Background technology
At present, phase transition storage (Phase-Change RAM, PC RAM) since have non-volatile, have extended cycle life, component size is little, low in energy consumption, can multistagely store, efficiently read, advantage such as anti-irradiation, high-low temperature resistant, anti-vibration, anti-electronic jamming and manufacturing process are simple, be considered to most possibly replace present flash memory (Flash), dynamic random access memory (DRAM) and static memory (SRAM) and become following semiconductor memory main product.
The PC ram memory cell comprises phase change layer, and the hearth electrode that contacts with phase change layer and top electrode.The phase change layer of PC ram memory cell is the most crucial zone of phase transition storage, is used for phase-change material and undergoes phase transition, and realizes memory function.At present phase change layer has multiple alloy material, is generally chalkogenide, and Ge-Sb-Te (GST, GeSbTe) alloy is the maximum the most ripe phase-change material of research of generally acknowledging.In conjunction with Fig. 1 a to Fig. 1 g, the manufacture method of prior art phase-change memory storage unit is described.
Step 11, see also Fig. 1 a, a hearth electrode 101 is provided and is positioned at phase change layer 102 on the hearth electrode 101, described hearth electrode 101 and phase change layer 102 are formed in the insulating barrier 103; Wherein, hearth electrode can be for the silicide of the polysilicon, doped amorphous silicon or the tungsten that mix etc.; Phase change layer can be chalkogenides such as GST;
Step 12, see also Fig. 1 b, at the surface deposition silicon nitride layer 104 of phase change layer 102 and insulating barrier 103, silicon nitride layer 104 is as etch stop layer;
Step 13, see also Fig. 1 c, surface deposition low dielectric constant material layer 105 at silicon nitride layer 104, black diamond (the black diamond that for example contains the similar oxide (Oxide) of silicon, oxygen, carbon, protium, BD) or be mixed with the silex glass of fluorine ion, also can be called fluoride glass (Fluorin Silicon Glass, FSG) etc.;
Step 14, see also Fig. 1 d, at the surface of low dielectric constant material layer 105 coating photoresistance glue-line 106, and the described photoresistance glue-line 106 of exposure imaging patterning, the position of definition top electrode;
Step 15, seeing also Fig. 1 e, is mask with the photoresistance glue-line 106 of patterning, and the described low dielectric constant material layer 105 of etching etches into silicon nitride layer 104 and stops etching gas such as carbon tetrafluoride (CF 4), fluoroform (CHF 3) or octafluoroization four carbon (C 4F 8) etc.;
Step 16, see also Fig. 1 f, etch silicon nitride layer 104 manifests phase change layer 102, etching gas such as fluoroform (CHF 3), difluoromethane (CH 2F 2) or a fluoromethane (CH 3F) etc.;
Step 17, see also Fig. 1 g, above phase change layer 102, fill metallic copper, gold etc. on the position of etch silicon nitride layer 104 and low dielectric constant material layer 105 and form top electrode 107.
So far, formed the PC ram memory cell.
Need to prove, in the prior art, because the thickness of the low dielectric constant material layer 105 that need deposit is thicker, about 1～2,000 dust, and be limited to existing deposition and lithographic technique, low dielectric constant material layer 105 thickness evenness of deposition are relatively poor, the thickness evenness of the low dielectric constant material layer 105 after the etching is also relatively poor, for guaranteeing in step 15 behind the complete low dielectric constant material layer 105 of etching, silicon nitride layer has residue on each position of etching, namely be unlikely to etch into phase change layer 102, so silicon nitride layer 104 thickness of deposition are also thicker relatively in the step 12, about 400～600 dusts.Further, because silicon nitride layer 104 is thicker, so its uniformity is also relatively poor, when etching is finished silicon nitride layer 104, when manifesting phase change layer 102 fully, phase change layer 102 has been etched greatly.On the other hand, because during etching low dielectric constant material layer 105, be mask with photoresistance glue-line 106, so choose the gas of etching low dielectric constant material layer 105, should not be too high for the selection ratio of low dielectric constant material layer 105 and silicon nitride layer 104, be specially 1～1.5, otherwise can in etching process, produce very heavy polymer (polymer), be not easy to remove fully, produce some defectives, thereby reduce the finished product rate.After so etching is finished low dielectric constant material layer 105, can't stop at well on the silicon nitride layer 104, namely still can etching part silicon nitride layer 104, if the thickness of silicon nitride layer 104 is enough not thick, will cause the loss of phase change layer 102 then.Phase change layer is the most crucial zone of phase transition storage, and this loss causes the phase-change memory cell cisco unity malfunction probably, can't accurately show storage information.
Summary of the invention
In view of this, the technical problem of the present invention's solution is: reduce the loss of phase change layer in the etching process that forms the top electrode position.
For solving the problems of the technologies described above, technical scheme of the present invention specifically is achieved in that
The invention discloses a kind of manufacture method of phase-change memory storage unit, this method comprises:
One hearth electrode and the phase change layer that is positioned on the hearth electrode are provided, and described hearth electrode and phase change layer are formed in the insulating barrier;
At the lamination etch stop layer of three layers of the surface depositions of phase change layer and insulating barrier, described three layers lamination etch stop layer comprises first nitration case, oxide layer and second nitration case of deposition successively;
At described three layers lamination etch stop layer surface deposition low dielectric constant material layer;
At described low dielectric constant material layer coating photoresistance glue-line, and the described photoresistance glue-line of exposure imaging patterning, the position of definition top electrode;
Photoresistance glue-line with patterning is mask, the described low dielectric constant material layer of etching, and the lamination etch stop layer that etches into three layers stops;
Etching second nitration case stops to oxide layer;
The etching oxidation layer stops to first nitration case;
Etching first nitration case, manifest phase change layer after, above phase change layer, fill to form top electrode on the lamination etch stop layer that etching is three layers and the position of low dielectric constant material layer.
The silicon carbide layer NDC that described first nitration case is silicon nitride layer, silicon oxynitride layer or nitrating, thickness are 50～200 dusts.
Described oxide layer is silicon oxide layer, and thickness is 100～400 dusts.
Described second nitration case is silicon nitride layer, silicon oxynitride layer or NDC, and thickness is 200～800 dusts.
As seen from the above technical solutions, the present invention is at the surface deposition etch stop layer of phase change layer, and this etch stop layer is three layers lamination, is followed successively by nitration case, oxide layer and nitration case.Because the etching selection ratio of etching gas between nitration case and oxide layer be higher, between the adjacent etched stop layer, during etching, reduce etching difference gradually, finally when manifesting phase change layer, avoid the loss of phase change layer as far as possible.And the thicker individual layer silicon nitride etch stop layer that the phase change layer surface has in the prior art, thickness evenness is relatively poor, be easy to just lose the partial phase change layer during etch silicon nitride layer, so adopt method of the present invention, avoided the loss of phase change layer in the etching process that forms the top electrode position effectively.
Description of drawings
Fig. 1 a to Fig. 1 g is the concrete generalized section of the manufacture method of prior art phase-change memory storage unit.
Fig. 2 a to Fig. 2 i is the concrete generalized section of the manufacture method of phase-change memory storage unit of the present invention.
Fig. 2 is the schematic flow sheet of the manufacture method of phase-change memory storage unit of the present invention.
Embodiment
For make purpose of the present invention, technical scheme, and advantage clearer, below with reference to the accompanying drawing embodiment that develops simultaneously, the present invention is described in more detail.
Core concept of the present invention is that at the surface deposition etch stop layer of phase change layer, this etch stop layer is three layers lamination, is followed successively by nitration case, oxide layer and nitration case.Because the etching selection ratio of etching gas between nitration case and oxide layer be higher, so between the adjacent etched stop layer, during etching, reduce etching difference gradually, finally when manifesting phase change layer, avoid the loss of phase change layer as far as possible.
The invention discloses a kind of manufacture method of phase-change memory storage unit, its schematic flow sheet specifically describes in conjunction with Fig. 2 a to Fig. 2 i as shown in Figure 2, and this method comprises:
Step 21, see also 2a, a hearth electrode 101 is provided and is positioned at phase change layer 102 on the hearth electrode 101, described hearth electrode 101 and phase change layer 102 are formed in the insulating barrier 103; Wherein, hearth electrode can be for the silicide of the polysilicon, doped amorphous silicon or the tungsten that mix etc.; Phase change layer can be chalkogenides such as GST;
Step 22, see also 2b, the lamination etch stop layer 200 three layers of the surface depositions of phase change layer 102 and insulating barrier 103 is specially:
At first deposit first nitration case 201, thickness is 50～200 dusts.The thinner thickness of this layer, uniformity is better;
Then in the surface deposition oxide layer 202 of first nitration case 201, thickness is 100～400 dusts.This layer is mainly used in transmitting thickness;
At surface deposition second nitration case 203 of oxide layer 202, thickness is 200～800 dusts then.Basic identical in this layer thickness and the prior art, because the thickness of the low dielectric constant material layer 105 that need deposit is thicker, about 1～2,000 dust, and be limited to existing deposition and lithographic technique, low dielectric constant material layer 105 thickness evenness after deposition and the etching are relatively poor, for guaranteeing that second nitration case 203 has residue on each position behind the complete low dielectric constant material layer 105 of subsequent etching, so second nitration case, 203 thickness that deposit in this step also thicker relatively (200～800 dust).
Wherein, first nitration case 201 and second nitration case 203 can be silicon carbide layer (NDC) of silicon nitride layer, silicon oxynitride layer or nitrating etc., both materials can be identical also can be inequality; Oxide layer 202 can be silicon oxide layer.Three layers lamination etch stop layer adopts nitration case and oxide layer, mainly be because the existing mutual etching selection ratio that is used between nitration case and the oxide layer can be according to the various parameters of etching process, as the change of gas flow and kind, change between very on a large scale.Such as, nitration case can be controlled 2～10 the selection ratio of oxide layer, and is same, oxide layer to the selection of nitration case than also controlling between 2～10.Select highlyer than more, the uniformity after the etching is more good, namely in the etching nitration case, can be substantially etching oxidation layer not, perhaps in the etching oxidation layer, can be substantially etching nitration case not.
Step 23, see also 2c, at the surface deposition low dielectric constant material layer 105 of three layers lamination etch stop layers 200, FSG for example, BD etc.;
Step 24, see also 2d, at the surface of low dielectric constant material layer 105 coating photoresistance glue-line 106, and the described photoresistance glue-line 106 of exposure imaging patterning, the position of definition top electrode;
Step 25, seeing also 2e, is mask with the photoresistance glue-line 106 of patterning, the described low dielectric constant material layer 105 of etching, and the lamination etch stop layer 200 that etches into three layers stops.Etching gas such as CF 4, CHF 3Perhaps C 4F 8Etc., the etching gas in this step is for the top layer of three layers lamination etch stop layer 200: second nitration case 203, and etching selection ratio is still lower, otherwise can in etching process, produce very heavy polymer, be not easy to remove fully, produce some defectives, thereby reduce the finished product rate.Because lower etching selection ratio, after low dielectric constant material layer 105 etchings were complete, etching can't stop at once, still can etch into part second nitration case 203, causes the thickness evenness of second nitration case 203 relatively poor;
Step 26, see also 2f, etching second nitration case 203 etches into oxide layer 202 and stops etching gas such as CHF 3, CH 2F 2Perhaps CH 3F etc., second nitration case 203 can be controlled 2～10 as required with the etching selection ratio of oxide layer 202 in this step.Though the thickness of second nitration case 203 is thicker, uniformity is relatively poor, through the etching of this step, because etching selection ratio is higher, so can obviously improve this problem; Especially at high selectivity more, such as greater than 7 the time, etching oxidation layer 202 not basically, the improvement degree is more obvious;
Step 27, see also 2g, etching oxidation layer 202 etches into first nitration case 201 and stops etching gas such as C 4F 6, C 5F 8Perhaps C 4F 8Etc., the etching selection ratio of oxide layer 202 and first nitration case 201 also can be controlled 2～10 as required in this step, when further guaranteeing etching complete oxidation layer 202, first nitration case 201 is not etched, and the thickness evenness of the nitration case 201 of winning is further enhanced;
Step 28, see also 2h, etching first nitration case 201, manifest phase change layer 102, because first nitration case 201 thinner (50～200 dust), thickness evenness is relatively good, be etched in phase change layer 102 and stop so being easy to control, and guarantee that first nitration case, 201 etchings are complete, 102 losses of a large amount of phase change layers can not occur;
Step 29, see also 2i, above phase change layer 102, fill metallic copper, gold etc. on the lamination etch stop layer 200 that etching is three layers and the position of low dielectric constant material layer 105 and form top electrode 107.
So far, formed PC ram memory cell of the present invention.
In sum, the present invention when this lamination is carried out etching, reduces etching difference at the lamination etch stop layer of three layers of the surface depositions of phase change layer gradually, makes finally etching first nitration case equably, avoids etching into phase change layer as far as possible.Need to prove, if have the two-layer etch stop layer of nitrogen-oxide structure at the surface deposition of phase change layer, be oxide layer covering phase change layer and the insulating barrier 103 in the etching stop layer, because insulating barrier 103 generally also is oxide skin(coating), when the oxide layer in the etch stop layer is carried out etching, its material with insulating barrier is identical, so be easy to etch into insulating barrier 103, and the most important thing is, reducing etching difference only embodies when the etching nitration case, therefore be not enough to avoid etching into phase change layer, so the two-layer etch stop layer that has nitrogen-oxide structure at the phase change layer surface deposition is worthless.
The above only is preferred embodiment of the present invention, and is in order to limit the present invention, within the spirit and principles in the present invention not all, any modification of making, is equal to replacement, improvement etc., all should be included within the scope of protection of the invention.

Claims (4)

1. the manufacture method of a phase-change memory storage unit, this method comprises:
One hearth electrode and the phase change layer that is positioned on the hearth electrode are provided, and described hearth electrode and phase change layer are formed in the insulating barrier;
At the lamination etch stop layer of three layers of the surface depositions of phase change layer and insulating barrier, described three layers lamination etch stop layer comprises first nitration case, oxide layer and second nitration case of deposition successively;
At described three layers lamination etch stop layer surface deposition low dielectric constant material layer;
At described low dielectric constant material layer coating photoresistance glue-line, and the described photoresistance glue-line of exposure imaging patterning, the position of definition top electrode;
Photoresistance glue-line with patterning is mask, the described low dielectric constant material layer of etching, and the lamination etch stop layer that etches into three layers stops;
The etching selection ratio scope that adopts second nitration case and oxide layer is that 2～10 etching gas etching second nitration case stops to oxide layer;
The etching selection ratio scope that adopts oxide layer and first nitration case is that 2～10 etching gas etching oxidation layer stops to first nitration case;
Etching first nitration case, manifest phase change layer after, above phase change layer, fill to form top electrode on the lamination etch stop layer that etching is three layers and the position of low dielectric constant material layer.
2. method according to claim 1 is characterized in that, the silicon carbide layer NDC that described first nitration case is silicon nitride layer, silicon oxynitride layer or nitrating, thickness are 50～200 dusts.
3. method according to claim 2 is characterized in that, described oxide layer is silicon oxide layer, and thickness is 100～400 dusts.
4. method according to claim 3 is characterized in that, described second nitration case is silicon nitride layer, silicon oxynitride layer or NDC, and thickness is 200～800 dusts.
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CN103904214B (en) * 2014-03-03 2017-06-16 上海新储集成电路有限公司 A kind of two-dimentional phase change memory unit structure and its manufacture method
CN104465443B (en) * 2014-11-28 2017-07-07 上海华力微电子有限公司 A kind of Sensitivity Analysis Method to NDC growth thickness
CN105720191B (en) * 2014-12-02 2018-06-01 中芯国际集成电路制造(上海)有限公司 Phase transition storage and forming method thereof
CN105789436B (en) * 2014-12-25 2018-08-21 中芯国际集成电路制造(上海)有限公司 A kind of semiconductor devices and its manufacturing method, electronic device
CN106159082B (en) * 2015-03-24 2018-12-21 中芯国际集成电路制造(上海)有限公司 The forming method of resistor type random access memory

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US7038320B1 (en) * 2001-02-20 2006-05-02 Advanced Micro Devices, Inc. Single damascene integration scheme for preventing copper contamination of dielectric layer

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7038320B1 (en) * 2001-02-20 2006-05-02 Advanced Micro Devices, Inc. Single damascene integration scheme for preventing copper contamination of dielectric layer

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