CN102299149A - Semiconductor inductance device and manufacturing method thereof - Google Patents
Semiconductor inductance device and manufacturing method thereof Download PDFInfo
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- CN102299149A CN102299149A CN2010102179253A CN201010217925A CN102299149A CN 102299149 A CN102299149 A CN 102299149A CN 2010102179253 A CN2010102179253 A CN 2010102179253A CN 201010217925 A CN201010217925 A CN 201010217925A CN 102299149 A CN102299149 A CN 102299149A
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Abstract
The invention provides a semiconductor inductance device which comprises a semiconductor substrate and a metal coil, wherein the semiconductor substrate comprises an insulating dielectric layer; the metal coil is arranged on the insulating dielectric layer, the metal coil is in spiral distribution and the surface of the metal coil, deviated from the semiconductor substrate, is a concave-convex surface. The invention also provides a manufacturing method of the semiconductor inductance device. The method comprises the following steps: providing a semiconductor substrate, wherein the semiconductor substrate comprises an insulating dielectric layer; forming a metal layer on the insulating dielectric layer; patterning the metal layer to form a metal coil, wherein the metal coil is in spiral distribution, and the surface of the metal coil, deviated from the semiconductor substrate, is a concave-convex surface. The quality factor of the semiconductor device can be improved.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, particularly a kind of semiconductor inductor spare and manufacture method thereof.
Background technology
The main effect of inductance component be to AC signal isolate, filtering or form resonant circuits with capacitor, resistor etc.Because inductance component plays an important role, therefore semiconductor inductor spare is used also relatively extensively in chip.The major parameter of inductance component has inductance value, permissible variation, quality factor, distributed capacitance and rated current etc.Quality factor also claim the Q value, are physical quantitys of expression wire coil quality, are the major parameters of weighing the inductance component quality.The Q value is meant when inductance component is worked under the alternating voltage of a certain frequency, the induction reactance X that is presented
LThe ratio of the resistance equivalent, that is: Q=X with it
L/ R.The Q value of inductance component is high more, and the loss in loop is more little, and efficient is high more.The loss that the Q value of coil and dielectric loss, radome or the iron core of the D.C. resistance of lead, skeleton cause, the factors such as influence of high frequency skin effect are relevant.
Skin effect is meant when alternating current passes through wire coil that the current density of each several part is inhomogeneous, and in other words, wire coil internal current density is little, and the wire coil surface current density is big, and this phenomenon is called skin effect.The frequency of alternating current is high more, and skin effect is remarkable more, and frequency is high to a certain degree, can think that electric current is fully from wire coil surface current mistake.Therefore in high frequency ac circuit, must consider the influence of skin effect, the for example lead coiling of multiply mutual insulating of the coil on the broadcast receiver magnetic antenna, television room's outside antenna is made of the thicker metal tube of diameter without metal bar, all be long-pending, overcome the adverse effect that skin effect is brought in order to increase surface of conductors.
Skin effect makes the Q value of inductance component reduce in inductance component, and especially under the high-frequency work situation, skin effect is remarkable, and the Q value reduces significantly.Based on the problems referred to above, in the prior art, work in the Switching Power Supply wire coil of low-frequency range, generally adopt the lead coiling of tape insulations such as enamelled wire.Operating frequency is higher than several ten thousand hertz, and be lower than in the circuit of 2MHz, adopt the lead coiling of multiply insulation, for example application number is for disclosing a kind of on-chip inductor method for designing of multiple current current path suppression current congestion effect in the Chinese patent application of " 200410067599.7 ", wherein design the multiple current path, be exactly in same plane, the unicoil metal of conventional design is split into a plurality of lines parallel connections; In vertical stack, will not use through hole to connect at many levels, but end to end or local the connection.Make electric current basic evenly distribution in the coil of inductance like this, increased the surface area of wire coil, thereby can overcome the influence of skin effect, make the high 30%-50% of coil of the Q value solid conductor coiling more long-pending than same cross-sectional.
But be higher than in the circuit of 2MHz in frequency, should not select the stranded conductor coiling for use, because split conductor is when frequency is very high, the coil insulation medium will cause extra loss, and its effect is anti-good not as solid conductor.
Therefore how overcoming skin effect, improve the Q value, is the problem that all the time enjoys people to pay close attention to.
Summary of the invention
The technical problem of solution of the present invention is the lower problem of Q value of semiconductor inductor spare.
In order to address the above problem, the invention provides a kind of semiconductor inductor spare, comprising: the semiconductor-based end,, the described semiconductor-based end, comprise insulating medium layer; Be positioned at the wire coil on the insulating medium layer, described wire coil shape in the shape of a spiral distributes, and described wire coil to deviate from the surface at the semiconductor-based end be convex-concave surface.
The present invention also provides a kind of manufacture method of semiconductor inductor spare, comprises step: the semiconductor-based end is provided, and the described semiconductor-based end, comprise insulating medium layer; On described insulating medium layer, form metal level; Patterned metal layer forms wire coil, and described wire coil shape in the shape of a spiral distributes, and described wire coil to deviate from the surface at the semiconductor-based end be convex-concave surface.
Compare with prior art, the advantage of technique scheme is:
The present invention is by adjusting the manufacturing process of semiconductor inductor spare, thereby the surface of the wire coil of the feasible semiconductor inductor spare that forms is a convex-concave surface, increase the surface area of the wire coil of inductance component like this, thereby reduced skin effect, increased the Q value of inductance component.
Description of drawings
By the more specifically explanation of the preferred embodiments of the present invention shown in the accompanying drawing, above-mentioned and other purpose, feature and advantage of the present invention will be more clear.Reference numeral identical in whole accompanying drawings is indicated identical part.Painstakingly do not draw accompanying drawing, focus on illustrating purport of the present invention by actual size equal proportion convergent-divergent.
Fig. 1 is the schematic top plan view of semiconductor inductor spare one embodiment of the present invention;
Fig. 2 is a semiconductor inductor spare shown in Figure 1 cutaway view along A-A ' direction;
Fig. 3 is the flow chart of the manufacture method of semiconductor inductor spare of the present invention;
Fig. 4 to Fig. 6 is the schematic diagram of manufacture method one embodiment of semiconductor inductor spare of the present invention.
Embodiment
In production process of semiconductor device, usually need make semiconductor inductor spare in chip, because the Q value of inductance component is high more, its loss is more little, efficient is high more, and the Q value that especially improves inductance component in the inductance component of high-frequency work is the problem that people pay close attention to always.
The present inventor thinks: skin effect makes a big impact to the Q value of inductance component, makes the Q value of inductance component be limited in the scope of a reduction, and especially frequency is high more, and skin effect is remarkable more, and the Q value is also low more.Yet the ideal method that reduces skin effect is exactly the surface area that increases wire coil.
Therefore the inventor has invented a kind of semiconductor inductor spare through behind the big quantity research, and comprising: the semiconductor-based end, the described semiconductor-based end comprises insulating medium layer; Be positioned at the wire coil on the insulating medium layer, described wire coil shape in the shape of a spiral distributes, and described wire coil to deviate from the surface at the semiconductor-based end be convex-concave surface.
The present invention also provides a kind of manufacture method of semiconductor inductor spare, comprises step: the semiconductor-based end is provided, and the described semiconductor-based end, comprise insulating medium layer; On described insulating medium layer, form metal level; Patterned metal layer forms wire coil, and described wire coil shape in the shape of a spiral distributes, and described wire coil to deviate from the surface at the semiconductor-based end be convex-concave surface.
The present invention is by adjusting the manufacturing process of semiconductor inductor spare, thereby the surface of the wire coil of the feasible semiconductor inductor spare that forms is a convex-concave surface, increase the surface area of the wire coil of inductance component like this, thereby reduced skin effect, increased the Q value of inductance component.
For above-mentioned purpose of the present invention, feature and advantage can be become apparent more, the specific embodiment of the present invention is described in detail below in conjunction with accompanying drawing.A lot of details have been set forth in the following description so that fully understand the present invention.But the present invention can implement much to be different from alternate manner described here, and those skilled in the art can do similar popularization under the situation of intension of the present invention, so the present invention is not subjected to the restriction of following public concrete enforcement.
Secondly, the present invention utilizes schematic diagram to be described in detail, when the embodiment of the invention is described in detail in detail; for ease of explanation; the profile of expression device architecture can be disobeyed general ratio and be done local the amplification, and described schematic diagram is example, and it should not limit the scope of protection of the invention at this.The three dimensions size that in actual fabrication, should comprise in addition, length, width and the degree of depth.
Fig. 1 is the schematic diagram of semiconductor inductor spare one embodiment of the present invention, and Fig. 2 is a semiconductor inductor spare shown in Figure 1 cutaway view along A-A ' direction, below in conjunction with Fig. 1 and Fig. 2 semiconductor inductor spare of the present invention is described.
As shown in Figure 1, semiconductor inductor spare of the present invention comprises the semiconductor-based end 110 and wire coil 120.
The described semiconductor-based end 110 can be monocrystalline silicon, polysilicon or amorphous silicon; Also can be silicon, germanium, GaAs or silicon Germanium compound; Also can be to have epitaxial loayer or insulating barrier silicon-on.The described semiconductor-based end 110 can also be other semi-conducting material, enumerates no longer one by one here.
Of particular note, in the semiconductor-based end 110 of needs formation wire coil 120 correspondence positions, do not have semiconductor device.
As shown in Figure 2, the semiconductor-based end 110, comprise insulating medium layer 110a, and described wire coil 120 is positioned on the described insulating medium layer 110a.
The material of described wire coil 120 can be a kind of or combination in aluminium, copper, aluminium copper, titanium, titanium nitride, tantalum, the tantalum nitride.In addition, wire coil 120 also can be other metal material.
Described wire coil 120 is positioned on the insulating medium layer 110a, shape distributes in the shape of a spiral, and the surperficial 120a that described wire coil 120 deviates from the semiconductor-based end 110 is a convex-concave surface, this concrete convex-concave surface can be depression and the projection that forms in addition on wire coil 120 after forming wire coil 120, also can be for adjusting the formation technology of wire coil 120, for example adjust physical vapour deposition (PVD) (PVD, PysicalVapor Deposition) technology, temperature of the semiconductor-based ends 110 raise or the flow of plasma is strengthened or the like, thereby the rough surface of the feasible wire coil 120 that forms, thereby make that the surface of wire coil 120 is a convex-concave surface.In addition, described wire coil 120 also can adopt other method to make to be convex-concave surface by rough surface.
Preferably, the surperficial 120b of described wire coil 120 towards the semiconductor-based end 110 is convex-concave surface, and this concrete convex-concave surface can be realized for the formation technology of adjusting metal level.
Preferably, the recessed position of described convex-concave surface and the difference in height d of raised position be greater than 200 dusts, for example 210 dusts.Like this can be so that the wire coil surface area of the inductance component that arrives increase, so skin effect weakens, the Q value increases, and especially is applied in the high frequency environment, can be that the Q value significantly improves, and this difference in height can be so that the performance of inductance be best.But the difference in height d of convex-concave surface described in the present invention is not limited to this, and in addition described difference in height d can also be less than or equal to 200 dusts, for example is 190 dusts.
Optionally, the material of described insulating medium layer 110a is silica, silicon nitride or silicon oxynitride.
Accordingly, the present invention also provides a kind of manufacture method of semiconductor inductor spare.Fig. 3 is the flow chart of the manufacture method of semiconductor inductor spare of the present invention.Fig. 4 to Fig. 7 is the schematic diagram of manufacture method one embodiment of semiconductor inductor spare.Below in conjunction with Fig. 3 to Fig. 7 the manufacture method of semiconductor inductor spare of the present invention is elaborated, it comprises step:
S10: the semiconductor-based end is provided, and the described semiconductor-based end, comprise insulating medium layer.
With reference to figure 4, concrete, the described semiconductor-based end 110 can be monocrystalline silicon, polysilicon or amorphous silicon; Also can be silicon, germanium, GaAs or silicon Germanium compound; Also can be to have epitaxial loayer or insulating barrier silicon-on.The described semiconductor-based end 110 can also be other semi-conducting material, enumerates no longer one by one here.
Of particular note, in the semiconductor-based end 110 of needs formation wire coil 120 correspondence positions, do not have semiconductor device.
The semiconductor-based end 110, comprise insulating medium layer 110a.
S20: on described insulating medium layer 110a, form metal level.
With reference to figure 5, concrete can adopt physical vapor deposition (PVD) or sputter (sputtering) process deposits metal level 115.The material of described metal level 115 can be a kind of or combination in aluminium, copper, aluminium copper, titanium, titanium nitride, tantalum, the tantalum nitride.In an embodiment, adopt PVD process deposits metallic aluminium.In traditional depositing operation, target is more smooth with the surface deposition of metal level, in the present invention, traditional PVD technological parameter can be adjusted, concrete the semiconductor base reservoir temperature be raise, for example temperature is elevated to 450 ℃ from traditional 300 ℃, make that like this speed of reaction speeds, thereby the particle of the feasible metal aluminium lamination that forms is bigger, and the surperficial 115a that forms metal level is more coarse, has concavo-convex fluctuating.Because the flow of plasma being strengthened or the pressure of reaction chamber is increased or the like mode can be so that the speed of reaction speeds, thereby make the particle of metal level 115 of formation bigger, the surperficial 115a that forms metal level is more coarse, has concavo-convex fluctuating.Therefore in other embodiments, can also adopt flow with plasma to strengthen or the pressure of reaction chamber is increased or the like mode to make that the surface of formation metal level 115 is more coarse, have concavo-convex fluctuating.
Preferably, the difference in height d of the recessed position of described convex-concave surface and raised position is greater than 200 dusts.
Also can adopt the method for CVD annealing temperature afterwards in addition; make that the surface that forms metal level is more coarse; the object of the present invention is to provide a kind of metal level with convex-concave surface, therefore well known to those skilled in the art can be so that the metal level that forms has the method for convex-concave surface all in protection scope of the present invention.
Because invention is that the surface that will make metal level 115 deviate from insulating medium layer 110a is a convex-concave surface, therefore in the present invention also can be as adopting traditional handicraft deposited metal 115, intensification or increasing plasma flow come fast reaction speed then, the surperficial 115a that makes metal level 115 deviate from insulating medium layer 110a is a convex-concave surface, and carry out owing to begin to use conventional methods, therefore the surface that makes metal level 115 contact with the semiconductor-based end 110 is more smooth, thereby and the contact at the semiconductor-based end 110 better.
Preferably, described wire coil 120 is a convex-concave surface towards the surface at the semiconductor-based end 110, can further increase the surface area of wire coil 120 like this.Preferably, the difference in height d of the recessed position of described convex-concave surface and raised position is greater than 200 dusts.
Concrete method can be that the surface towards metal level (upper surface) of insulating medium layer 110a is convex-concave surface, and when CVD formed metal level 115, metal level 115 was a convex-concave surface just towards the surface of insulating medium layer 110a like this.In a preferred embodiment, can be by adjusting the parameter of CVD technology, the temperature at the semiconductor-based end, the pressure that increases gas flow, increase reaction chamber or increase annealing temperature for example raise, thereby make the rough surface of the insulating medium layer 110a that CVD technology forms, thereby the surperficial 115b of the metal level 115 of Xing Chenging is also more coarse thereon, has relief pattern.
In addition, also can form smooth insulating medium layer earlier, on insulating medium layer, form projection again, make that the surface of insulating medium layer is a convex-concave surface.
S30: patterned metal layer, form wire coil, described wire coil shape in the shape of a spiral distributes, and described wire coil to deviate from the surface at the semiconductor-based end be convex-concave surface.
With reference to figure 6, concrete can be at first on metal level 115 surfaces, utilize ald (ALD), chemical vapor deposition (CVD) technology, preferably plasma strengthens vapor deposition (PECVD) technology, deposit one deck passivation layer, utilize photoresist figure mask employing plasma etching industrial or reactive ion etching (RIE) technology etching passivation layer, metal level 115 then, form wire coil 120.
Remove passivation layer and photoresist figure then, just obtain semiconductor inductor spare.
In other embodiments, for the metal of more difficult etching, for example copper also can adopt elder generation's etching in insulating medium layer to form spiral helicine groove, fills metal then in groove, thereby forms spiral helicine wire coil.
Utilize the wire coil surface area of the inductance component that the manufacture method of semiconductor inductor spare of the present invention obtains to increase, so skin effect weakens, the Q value increases, and especially is applied in the high frequency environment, can be that the Q value significantly improves.The difference in height d of described convex-concave surface is not limited to greater than 200 dusts in the present invention, and in addition described difference in height d is less than or equal to 200 dusts (for example 190 dusts), all within protection scope of the present invention.
Though the present invention discloses as above with preferred embodiment, yet be not in order to limit the present invention.Any those of ordinary skill in the art, do not breaking away under the technical solution of the present invention scope situation, all can utilize the method and the technology contents of above-mentioned announcement that technical solution of the present invention is made many possible changes and modification, or be revised as the equivalent embodiment of equivalent variations.Therefore, every content that does not break away from technical solution of the present invention, all still belongs in the scope of technical solution of the present invention protection any simple modification, equivalent variations and modification that above embodiment did according to technical spirit of the present invention.
Claims (10)
1. a semiconductor inductor spare is characterized in that, comprising:
The semiconductor-based end,, the described semiconductor-based end, comprise insulating medium layer;
Be positioned at the wire coil on the insulating medium layer, described wire coil shape in the shape of a spiral distributes, and described wire coil to deviate from the surface at the semiconductor-based end be convex-concave surface.
2. semiconductor inductor spare according to claim 1 is characterized in that, described wire coil is a convex-concave surface towards the surface at the semiconductor-based end.
3. semiconductor inductor spare according to claim 1 and 2 is characterized in that, the recessed position of described convex-concave surface and the difference in height of raised position are greater than 200 dusts.
4. semiconductor inductor spare according to claim 1 is characterized in that, described wire coil is positioned at same plane.
5. semiconductor inductor spare according to claim 1 is characterized in that, the material of described wire coil is a kind of or combination in aluminium, copper, aluminium copper, titanium, titanium nitride, tantalum, the tantalum nitride.
6. the manufacture method of a semiconductor inductor spare is characterized in that, comprises step:
The semiconductor-based end is provided, and the described semiconductor-based end, comprise insulating medium layer;
On described insulating medium layer, form metal level;
Patterned metal layer forms wire coil, and described wire coil shape in the shape of a spiral distributes, and described wire coil to deviate from the surface at the semiconductor-based end be convex-concave surface.
7. the manufacture method of semiconductor inductor spare according to claim 6 is characterized in that, the method that forms metal level on described dielectric is: physical vapour deposition (PVD).
8. the manufacture method of semiconductor inductor spare according to claim 6 is characterized in that, the material of described metal level is a kind of or combination in aluminium, copper, aluminium copper, titanium, titanium nitride, tantalum, the tantalum nitride.
9. the manufacture method of semiconductor inductor spare according to claim 6 is characterized in that, the method for described patterned metal layer is a plasma etching.
10. the manufacture method of semiconductor inductor spare according to claim 6 is characterized in that, the recessed position of described convex-concave surface and the difference in height of raised position are greater than 200 dusts.
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| CN2010102179253A CN102299149A (en) | 2010-06-23 | 2010-06-23 | Semiconductor inductance device and manufacturing method thereof |
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| CN2010102179253A CN102299149A (en) | 2010-06-23 | 2010-06-23 | Semiconductor inductance device and manufacturing method thereof |
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| CN102637677A (en) * | 2012-04-24 | 2012-08-15 | 上海宏力半导体制造有限公司 | Inductor as well as forming method thereof, radio frequency device and integrated passive device |
| CN103325763A (en) * | 2012-03-19 | 2013-09-25 | 联想(北京)有限公司 | Spiral inductance element and electronic device |
| CN110227565A (en) * | 2019-06-25 | 2019-09-13 | 京东方科技集团股份有限公司 | Micro-fluidic device and production method, biomolecule amount detection method and system |
| CN111462687A (en) * | 2020-06-09 | 2020-07-28 | 上海天马有机发光显示技术有限公司 | Display panel, driving method thereof and display device |
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Application publication date: 20111228 |