CN102280399A - Online wafer conveying device - Google Patents
Online wafer conveying device Download PDFInfo
- Publication number
- CN102280399A CN102280399A CN2011102325396A CN201110232539A CN102280399A CN 102280399 A CN102280399 A CN 102280399A CN 2011102325396 A CN2011102325396 A CN 2011102325396A CN 201110232539 A CN201110232539 A CN 201110232539A CN 102280399 A CN102280399 A CN 102280399A
- Authority
- CN
- China
- Prior art keywords
- processing module
- chamber
- wafer
- conveying
- conveyance device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
The invention discloses an online wafer conveying device. The online wafer conveying device comprises a loading chamber (51) for conveying a wafer from the outside, an unloading chamber (53) for outputting the wafer to the outside, and a plurality of conveying chambers (54a, 54b and 54c) and a plurality of processing modules (52a and 52b), wherein the conveying chambers and the processing modules are connected in series between the loading chamber and the unloading chamber; the conveying chambers and the processing modules are connected in an alternate way; and the plurality of conveying chambers comprise a first conveying chamber (54a) which is connected to the loading chamber, a second conveying chamber (54c) which is connected to the unloading chamber, and another one or more middle conveying chambers (54b).
Description
The application be that November 09, application number in 2007 are 200780101440.4 the applying date, denomination of invention divides an application for the application of " at the line style wafer conveyance device ".
Technical field
The present invention relates to a kind of semiconductor-fabricating device and manufacture method, more specifically, relate to a kind of have cramped construction at line style (inline-type) wafer conveyance device.
Background technology
The traditional semiconductor crystal wafer conveying device that has several types, these traditional semiconductor crystal wafer conveying devices all have big shortcoming.Traditional bunch type (cluster-type) wafer conveyance device has following structure: dispose a plurality of processing modules around the mechanical hand chamber that is positioned at central authorities radially.Big the taking up room of this bunch type wafer conveyance device requirement (footprint) is installed.In addition, when finishing dealing with in each processing module, wafer is just temporarily placed buffer part etc. and is waited for next processing at every turn, and therefore, the whole processing speed of device is slower.In addition, in most of the cases, because design, the maximum quantity of the processing module in bunch type wafer conveyance device is limited to five or six usually.
Compare with bunch processing speed of type device, have higher processing speed at the line style wafer conveyance device.Yet the linear structure owing at the line style wafer conveyance device is difficult to and will be applied to the structure of up-to-date semiconductor manufacturing facility at the line style wafer conveyance device.In addition, in the line style wafer conveyance device, when in semiconductor fabrication, under vacuum environment, carrying wafer, may there be following situation: traditional because the friction between the parts of wafer conveyance device causes producing the not particle of expected degree.
Fig. 1 shows traditional plane graph at the line style wafer conveyance device (for example, with reference to patent documentation 1).In wafer conveyance device 10, each processing module 13a to 13g disposes located adjacent one anotherly and connects in the mode of connecting.Each processing module by gate valve (gate valve) (not shown) separately.Wafer is transported to the first processing module 13a and manages throughout the module by processed in sequence from load chamber 14 by the mechanical hand 12 in the mechanical hand chamber 11.Handle the back wafer and be transported to relief chamber 15 from last processing module 13g by mechanical hand 12.Do not need to be used to carry the additional machine hand or the mechanical hand chamber of wafer, therefore, taking up room that wafer conveyance device 10 is required is less.
Fig. 2 shows the phantom at line style wafer conveyance device 10 shown in Figure 1.Wafer 21 is installed in bearing part 23 and is transported to next processing module from a certain processing module.Manage throughout in the module, wafer 21 is raised base station 26 and raises and processed from bearing part 23, is installed on the bearing part 23 once more then and is transported to next processing module.By means of bearing part 23 being moved such as roller 25 transfer mechanisms such as grade.When wafer 21 was transported to next adjacent processing module, gate valve 24 was opened, thereby made two adjacent processing modules be in the state of non-hermetic each other property ground sealing.Wafer 21 standbies that lived through handling in a certain processing module become empty up to next processing module.
Fig. 3 shows another traditional plane graph at line style wafer conveyance device 30 (for example, with reference to patent documentation 2).Comprise two wafer transfer boxes (front opening unified pods) (FOUP) 31a and 31b at line style wafer conveyance device 30.For example, FOUP 31a has two load chamber 32a and 32b, these two load chamber 32a and 32b all have the be untreated box of wafer of storage, and FOUP 31b has two 33a of relief chamber and 33b, and these two 33a of relief chamber and 33b all have the box that is used for wafer after the stores processor.Wafer conveyance device 30 also comprises and being used at the temporary transient surge chamber 36a to 36d that places wafer of the course of conveying of wafer.During processing, wafer is delivered to the first surge chamber 36a by the mechanical hand 35a in the 34a of mechanical hand chamber from the box in load chamber 32a or the 32b.As schematically, wafer conveyance device 30 comprises the mechanical hand chamber 38a to 38c between surge chamber.Between each surge chamber and the adjacent mechanical hand chamber thereof and between each mechanical hand chamber and adjacent processing module thereof, gate valve 39 is set as schematically.Temporarily place the wafer of surge chamber 36a to be delivered to the first processing module 37a and processed at the first processing module 37a by the mechanical hand in the 38a of mechanical hand chamber.Subsequently, wafer is delivered to the second processing module 37b and processed in the second processing module 37b by the mechanical hand in the 38a of mechanical hand chamber once more.The wafer that lives through handling in the second processing module 37b is placed among the second surge chamber 36b by the mechanical hand in the 38a of mechanical hand chamber.Further, wafer is transported to the 3rd processing module 37c by the mechanical hand in the second mechanical hand chamber 38b from surge chamber 36b.After this, similarly, wafer is moved to processing module 37f and processed among processing module 37f in turn from processing module 37c.The wafer that lives through handling in all processing modules temporarily is placed among the surge chamber 36d, is stored among the 33a of relief chamber or the box in the 33b of FOUP 31b by the mechanical hand 35b in the 34b of mechanical hand chamber then.Wafer conveyance device 30 has the advantage that can increase the quantity of processing module as required neatly.
Fig. 4 shows the plane graph (for example, with reference to patent documentation 3) of traditional bunch type wafer conveyance device.Wafer conveyance device 40 comprises: inlet module 45a, and wafer 46 is transfused to from the outside via this inlet module 45a; Outlet module 45b, wafer 46 is output to the outside via this outlet module 45b; Conveying chamber 42a and 42b, it is used for wafer is transported to processing module 41b, 41c, 41f and 41g; And carry mechanical hand 43a and 43b, it is set at respectively in conveying chamber 42a and the 42b.Master controller 47 is handled module controller P, inlet module 45a, outlet module 45b and operator control panel via standard traffic bus 48 and each and is communicated by letter.Not processed as yet wafer 46 in the inlet module 45a is transferred the orientation that 42a interior conveying mechanical hand 43a in chamber temporarily is placed on the aligner (aligner) 44 and adjusts wafer on aligner 44.Then, the wafer on the aligner 44 is transferred mechanical hand 43a or 43b is transported to for example processing module 41b or 41c and processed in processing module 41b or 41c, is turned back to aligner 44 once more then.After repeating this task, the wafer that lives through handling at processing module 41b, 41c, 41f and 41g is transferred mechanical hand 43a and turns back to outlet module 45b.
No. 2006/0102078 communique specification of [patent documentation 1] U.S. Patent application
The 7th, 210, No. 246 specifications of [patent documentation 2] U.S. Patent application
The flat 1-500072 communique of [patent documentation 3] Japanese Unexamined Patent Application Publication
Summary of the invention
Yet can keep the portable bearing part 23 of processed wafer in wafer conveyance device 10 and be used to make that bearing part 23 moves such as roller 25 transfer mechanisms such as grade illustrated in figures 1 and 2 need comprising at line style wafer conveyance device 10.In this case, produce following problem: the structure of wafer conveyance device 10 complicates and price becomes expensive.In addition, bearing part 23 moves on such as roller 25 transfer mechanisms such as grade, therefore, because the particle that the friction between these parts causes is easy to produce.Adhere to the feasible quality badness that is formed at the film of wafer of particle of the wafer that is transferred 20 in the wafer conveyance device 10.
Shown in Figure 3 traditional need be used for temporarily placing the surge chamber 36a to 36d of wafer, make device become complicated more at line style wafer conveyance device 30.In addition, because these surge chambers, wafer conveyance device 30 required taking up room become bigger.In addition, if attempt to realize not using the wafer conveyance device 30 of surge chamber 36a to 36d, the wafer that then needs for example to have lived through handling in the second processing module 37b directly is sent to next mechanical hand chamber 38b from mechanical hand chamber 38a.Just, need between mechanical hand, transmit wafer.Should directly transmit and make the performance accuracy and the reliability deterioration of wafer conveyance device 30.
Conveying chamber 42a and 42b that traditional bunch type wafer conveyance device 40 has to be positioned at central authorities are the center structure of configuration process module radially, therefore, produce the big problem that takes up room.In addition, for a bunch type wafer conveyance device 40, before being delivered to each processing module, wafer needs wafer temporarily is placed on the aligner 44.Need this aligner 44 to make taking up room of whole device further increase.Then, after finishing dealing with, wafer just need be placed on aligner 44 at every turn, therefore, needs complicated conveying task.
In order to solve above-mentioned traditional problem, the objective of the invention is to realize a kind of generation that can suppress particle, avoid complicated conveying mechanism and have small occupied space simple structure at the line style wafer conveyance device.
To achieve these goals, of the present inventionly comprise at the line style wafer conveyance device: load chamber, described load chamber are used for from outside input wafer; Relief chamber, described relief chamber is used for wafer is outputed to the outside; And a plurality of conveying chambers and a plurality of processing module, described conveying chamber and described processing module all are connected in series between described load chamber and described relief chamber.Described conveying chamber alternately is connected with described processing module, and described a plurality of conveying chamber comprises conveying chamber in the middle of the first end conveying chamber that is connected to described load chamber, the second end conveying chamber that is connected to described relief chamber and other one or more,
The described first end conveying chamber is transported to first processing module with wafer from described load chamber, conveying chamber was being carried wafer in the middle of each was described between the processing module in its place ahead and the processing module at its rear, and the described second end conveying chamber is transported to described relief chamber with wafer from last processing module.
In said structure, also load chamber, the first end conveying chamber, each processing module, each middle conveying chamber, the second end conveying chamber and the relief chamber that is connected in series can be arranged such that they form the configuration of U font on the whole.
Also can at least one processing module further be set in the medial region of U font configuration, this at least one processing module is connected at least one side in the first end conveying chamber, middle conveying chamber and the second end conveying chamber that constitutes the configuration of U font.
Also can make a processing module in the processing module have the flat shape of general square shape, any two sides that are perpendicular to one another in four sides of this processing module are connected to two conveying chambers adjacent with this processing module.In this case, the total of wafer conveyance device is not linear, but sentences right-angle bending in a described processing module.In addition, can be constructed such that also a conveying chamber in the conveying chamber that is connected to a described processing module has the flat shape of general square shape, and the side with the lateral vertical that is connected to a described processing module of this conveying chamber is connected to another processing module adjacent with this conveying chamber.Therefore, the total of wafer conveyance device is sentenced right-angle bending at this conveying chamber.
The flat shape of processing module and conveying chamber is not limited to square.Also can adopt circle or other various flat shapes.This structure is designed such that two gate valves that a processing module in the processing module is perpendicular to one another via direction respectively are connected to two conveying chambers adjacent with this processing module.Then, this structure is designed such that two gate valves that a conveying chamber in described two conveying chambers is perpendicular to one another via direction are connected to a described processing module and another processing module.
Also can further be provided with described in the middle of conveying chamber in the middle of adjacent one of conveying chamber in the middle of in the conveying chamber one, and be designed to make in the middle of these adjacent two conveying chamber in the middle of each in conveying chamber all to have the flat shape of general square shape the structure, conveying chamber is connected to another middle conveying chamber via a side in two sides that are perpendicular to one another in the middle of one in the middle of these adjacent two in the conveying chamber, and the middle conveying chamber of each in the conveying chamber is connected to the processing module that is adjacent via the another side in described two sides in the middle of these adjacent two.
In this structure, the flat shape of middle conveying chamber also is not limited to square.Also can adopt circular and other various flat shapes.In addition, the middle conveying chamber that a middle conveying chamber in setting and the middle conveying chamber is adjacent, and the middle conveying chamber of each in the conveying chamber all is connected to another middle conveying chamber via gate valve in the middle of these two.In addition, conveying chamber is connected to different processing modules via direction perpendicular to another gate valve of the direction of described gate valve respectively in the middle of these two.
Two wafers be can to handle simultaneously in order making, first processing module and second processing module that all can handle independently also each processing module can be divided into.Here, first processing module and second processing module have two adjacent sides respectively, a side in two sides of first processing module is connected to a side of the side of the conveying chamber that is arranged in its place ahead via gate valve, another side in two sides of first processing module is connected to a side of the side of the conveying chamber that is arranged in its rear via gate valve, a side in two sides of second processing module is connected to another side of the conveying chamber that is positioned at its place ahead via gate valve, second processing module two sides in another side be connected to another side of the conveying chamber that is positioned at its rear via gate valve.
This structure can be designed such that above-mentioned first and second processing modules have such as various flat shapes such as general square shape and circles.A gate valve in two gate valves that first processing module and second processing module are perpendicular to one another via direction respectively is connected to the conveying chamber that is positioned at its place ahead, and is connected to the conveying chamber that is positioned at its rear via another gate valve.
Replace the linear pattern wafer conveyance device for what realize having warp architecture at the line style wafer conveyance device, can use surge chamber to replace at least one processing module.Surge chamber is configured to the conveying chamber that reciprocal two sides are connected to the conveying chamber in the place ahead that is positioned at this surge chamber via two gate valves and are positioned at the rear of this surge chamber.
In order to realize the U font structure, the conveying chamber that expansion also can be set replaces a processing module.The conveying chamber that enlarges comprises the conveying mechanism that is positioned at substantial middle portion and is positioned at two buffer part of the both sides of conveying mechanism.
According to the present invention, realized suppressing particle generation, avoid complicated conveying mechanism and have small occupied space simple structure at the line style wafer conveyance device.
Description of drawings
Fig. 1 is traditional plane graph at the line style wafer conveyance device.
Fig. 2 is traditional phantom at the line style wafer conveyance device shown in Figure 1.
Fig. 3 is another traditional plane graph at the line style wafer conveyance device.
Fig. 4 is the plane graph of traditional bunch type wafer conveyance device.
Fig. 5 is according to the plane graph at the line style wafer conveyance device of the present invention.
Fig. 6 is the plane graph according to another execution mode at the line style wafer conveyance device of the present invention.
Fig. 7 is the plane graph according to another execution mode at the line style wafer conveyance device of the present invention.
Fig. 8 is the figure that another modification at the line style wafer conveyance device shown in Figure 7 is shown.
Fig. 9 is the figure that another modification at the line style wafer conveyance device shown in Figure 7 is shown.
Figure 10 is the figure that another modification at the line style wafer conveyance device shown in Figure 7 is shown.
Figure 11 is the plane graph of another configuration example at the line style wafer conveyance device shown in Figure 7.
Figure 12 is the plane graph according to another execution mode at the line style wafer conveyance device of the present invention.
Figure 13 is the plane graph of another configuration example at the line style wafer conveyance device shown in Figure 12.
Figure 14 is the plane graph according to another execution mode at the line style wafer conveyance device of the present invention.
Figure 15 is the plane graph of another configuration example at the line style wafer conveyance device shown in Figure 14.
Figure 16 is the plane graph of another configuration example at the line style wafer conveyance device shown in Figure 14.
Figure 17 illustrates how to use the figure that carries out actual treatment with the structure of similar at the line style wafer conveyance device shown in Figure 14.
Figure 18 is illustrated in the figure that carries out the situation of actual treatment after the conveying chamber for shown in Figure 17 in the middle of the line style wafer conveyance device further increases by two processing modules and.
Figure 19 is illustrated in the figure that carries out the situation of actual treatment after the conveying chamber for shown in Figure 17 in the middle of the line style wafer conveyance device further increases by two processing modules and.
Figure 20 is illustrated in the figure that carries out the situation of actual treatment after the conveying chamber for shown in Figure 180 in the middle of the line style wafer conveyance device further increases by four processing modules and two.
Figure 21 be illustrate use with Figure 20 similarly carry out the figure of the situation of actual treatment at the line style wafer conveyance device at the line style wafer conveyance device.
Figure 22 be illustrate use with Figure 20 similarly carry out the figure of the situation of actual treatment at the line style wafer conveyance device at the line style wafer conveyance device.
Figure 23 be illustrate use with Figure 20 similarly carry out the figure of the situation of actual treatment at the line style wafer conveyance device at the line style wafer conveyance device.
Figure 24 be illustrate use with Figure 20 similarly carry out the figure of the situation of actual treatment at the line style wafer conveyance device at the line style wafer conveyance device.
Figure 25 be illustrate use have with structure shown in Figure 14 similarly structure carry out the figure of the situation of actual treatment at the line style wafer conveyance device.
Description of reference numerals
10: wafer conveyance device
11: conveying chamber
12: mechanical hand
13a-13g: processing module
14: load chamber
15: relief chamber
21: wafer
23: bearing part
24: gate valve
25: roller
26: the rising base station
30: wafer conveyance device
31a、31b：FOUP
32a, 32b: load chamber
33a, 33b: processing module
34a, 34b: conveying chamber
35a, 35b: mechanical hand
36a-36d: surge chamber
37a-37f: processing module
38a-38c: conveying chamber
39: gate valve
40: wafer conveyance device
41b, 41c, 41f, 41g: processing module
42a, 42b: conveying chamber
43a, 43b: carry mechanical hand
44: aligner
45a: inlet module
45b: outlet module
46: wafer
47: master controller
48: the standard traffic bus
50: wafer conveyance device
51: load chamber
52a, 52b: processing module
53: relief chamber
54a-54c: conveying chamber
55a-55c: conveying mechanism
56a-56f: gate valve
60: wafer conveyance device
61: load chamber
63: relief chamber
136,137: clean room
152e: processing module
158: surge chamber
168a, 168b: surge chamber
164d: the conveying chamber of expansion
165d: conveying mechanism
168c, 168d: buffer part
170,180,190,200,210,220,230,240,250: wafer conveyance device
171,181,191,201,211,221,231,241,251: load chamber
172a-172d, 182a-182f, 192a-192f, 202a-202j, 212a-212j, 222a-222j, 232a-232j, 242a-242j, 252a-252h: processing module
173,183,193,203,213,223,233,243,253: Unload module
174a: the first end conveying chamber
175a: wafer holding member
Embodiment
Fig. 5 shows the plane graph at the line style wafer conveyance device of the present invention.Wafer conveyance device 50 has following structure: be used for importing the be untreated load chamber 51 of wafer, the first end conveying chamber 54 with conveying mechanism 55a, the first processing module 52a, the middle conveying chamber 54b with conveying mechanism 55b, the second processing module 52b from the outside, have the second end conveying chamber 54c of conveying mechanism 55c and be used for that wafer after handling is outputed to outside relief chamber 53 being connected.The first end conveying chamber 54a is set between the load chamber 51 and the first processing module 52a, middle conveying chamber 54b is set between the first processing module 52a and the second processing module 52b, and the second end conveying chamber 54c is set between the second processing module 52b and the relief chamber 53.Conveying mechanism 55a-55c all is configured to for example to have the mechanical hand of arm that can mobile wafer.Load chamber 51 can be a plurality of load chambers (not schematically showing), and relief chamber 53 can be a plurality of relief chamber (not schematically showing).
Be stored in the load chamber 51 from the wafer that is untreated of outside input.The conveying mechanism 55a wafer 57a that will be untreated is transported to the first processing module 52a from load chamber 51.The wafer 57b that conveying mechanism 55b will live through handling in the first processing module 52a is transported to the second processing module 52b.The wafer 57c that conveying mechanism 55c will live through handling in the second processing module 52b is transported to relief chamber 53.
As shown in Figure 5, also can be between the load chamber 51 and the first end conveying chamber 54a, between the first end conveying chamber 54a and the first processing module 52a, between the first processing module 52a and the middle conveying chamber 54b, between middle conveying chamber 54b and the second processing module 52b, between the second processing module 52b and the second end conveying chamber 54c and between the second end conveying chamber 54c and the relief chamber 53 gate valve 56a-56f is set respectively.
The example of handling at the line style wafer conveyance device in the present embodiment shown in Figure 5 is used in explanation.At first, the wafer that is untreated is input to the load chamber 51 from outside (atmospheric side) and is stored in the load chamber 51, uses exhaust gear (not schematically showing) that vacuum state is lined up in the inside of load chamber 51.Then, open gate valve 56a between the first end conveying chamber 54a and the load chamber 51 and the gate valve 56b between the first end conveying chamber 54a and the first processing module 52a.Then, use the conveying mechanism 55a in the first end conveying chamber 54a that the wafer that is untreated in the load chamber 51 is delivered to the first processing module 52a.After closing the gate valve of having opened, in first processing module, the wafer that is transferred is carried out predetermined process (for example, annealing).
Then, open gate valve 56c between the first processing module 52a and the middle conveying chamber 54b and the gate valve 56d between the middle conveying chamber 54b and the second processing module 52b, and the wafer that the conveying mechanism 55b in the conveying chamber 54b will live through handling in the middle of using is delivered to the second processing module 52b in the first processing module 52a.After closing the gate valve of having opened, in the second processing module 52b, wafer is carried out predetermined process (for example, sputter process, etch processes etc.).
Then, open gate valve 56e between the second processing module 52b and the second end conveying chamber 54c and the gate valve 56f between the second end conveying chamber 54c and the relief chamber 53, and the wafer that uses the conveying mechanism 55c in the second end conveying chamber 54c to have lived through handling in the second processing module 52b is delivered to relief chamber 53, and this wafer is outputed to the outside of wafer conveyance device 50.In order to obtain high-throughput (throughput), the processing time in each processing module is equated basically.When handling the required pitch time (tact time) of wafer when being 36 seconds in whole wafer conveyance device 50, the throughput of wafer conveyance device 50 is 100pph, can handle 100 wafers in one hour.When pitch time was 12 seconds, throughput was 300pph, can handle 300 wafers in one hour.
The wafer conveyance device 50 of present embodiment does not need bearing part 23 and transfer mechanism such as roller 25 as shown in Figure 2.Therefore, in the course of conveying of wafer, be not easy to produce particle.In addition, compare with the conveying device of as shown in Figure 3 use surge chamber, this wafer conveyance device 50 has better simply structure and less taking up room.In addition, utilize this simple structure, can realize having the wafer conveyance device of high reliability.In addition, compare with a bunch type conveying device as shown in Figure 4, this wafer conveyance device 50 has very simple structure and little taking up room.As mentioned above, according to present embodiment, can solve above-mentioned prior art problems all sidedly.In addition, in wafer conveyance device 50, from load chamber 51 to relief chamber a direction of 53 carry wafer.Therefore, the wafer that lives through handling can be delivered to next processing module in a certain processing module, simultaneously, wafer subsequently can be transported to this a certain processing module.Therefore, can improve the throughput of whole device.
First execution mode
Fig. 6 shows the plane graph according to another execution mode at the line style wafer conveyance device of the present invention.As shown in Figure 6, wafer conveyance device 60 has for example following at linear structure: load chamber 61, eight conveying chambers, seven processing modules and relief chamber 63 are not configured to rectilinear form but the U font configuration that is configured to be out of shape.Arrow among the figure represents to carry the direction of wafer.Two conveying chamber 64a of configuration and 64b have for example flat shape of general square shape in the way, and as schematically, and two conveying chamber 64a and 64b are constructed such that all two adjacent sides are attached to gate valve.By this structure, wafer conveyance device 60 has been realized the configuration of U font.Also can adopt as shown in Figure 6 load chamber 61 and relief chamber 63 to replace load chamber shown in Figure 5 51 and relief chamber 53.Under the situation of the wafer conveyance device 50 in Fig. 5, the total length of device increases along with the increase of required processing quantity, and has the possibility be difficult to this device of installation in factory etc.In this case, if the structure among employing Fig. 6 then can the length of restraining device increase when utilizing above-mentioned feature of the present invention.
Second execution mode
Fig. 7 shows the plane graph according to another execution mode at the line style wafer conveyance device of the present invention.Wafer conveyance device 70 comprises nine conveying chambers and ten processing modules.Certainly, also can adopt the number of components different with above-mentioned number of components.The intermediate process module 72b and the 72e that comprise at least more than one in the device shown in Figure 7 dummy section in U font configuration shown in Figure 6.Intermediate process module 72b and 72e are connected at least one conveying chamber that constitutes the configuration of U font respectively.Utilize this structure, can handle at short notice needs a small amount of wafer of handling.For example, the wafer of handling among three processing module 72a, 72b that only need be in Fig. 7 and the 72c is transported to processing module 72b and processed in processing module 72b via conveying chamber 74a after living through handling in processing module 72a, further be delivered to processing module 72c and processed in processing module 72c via conveying chamber 74b.Therefore, can select transport path neatly, and can increase whole processing speed for each wafer that needs different disposal.When on same wafer, piling up identical layer continuously, can handle effectively.For example, when needs form two-layer aluminium continuously on a wafer, can in processing module 72a, form ground floor and in processing module 72b, form the second layer.Compare with the situation of carrying out two types processing in same processing module, wafer conveyance device 70 shows following effect: can carry out continuous processing under the situation of the productivity ratio that does not reduce device integral body.
Fig. 8, Fig. 9 and Figure 10 show other modification 80,90 and 100 at the line style wafer conveyance device in the present embodiment respectively.These structures also show with Fig. 7 in the identical effect of effect of wafer conveyance device 70.
Figure 11 shows the plane graph in another configuration example of line style wafer conveyance device of present embodiment.Wafer conveyance device 110 has following structure: (cover) conveying chamber and processing module alternately are set under the situation of not staying the gap.Except the effect that realizes by wafer conveyance device shown in Figure 7 70, the increase that takes up room in the time of can also suppressing the quantity increase when the processing that will carry out wafer.In addition, wafer conveyance device 110 can improve the throughput of device integral body.For example, shown in the dotted arrow among Figure 11, when using conveying chamber 114b to carry the wafer that in processing module 112a, has lived through handling, can use the first end conveying chamber 114a wafer that will be untreated to be delivered to processing module 112a from load chamber 111.Therefore, can further improve the throughput of device integral body and show the effect that obtains by the structure among Fig. 7 to Figure 10.
The 3rd execution mode
Figure 12 shows the plane graph according to another execution mode at the line style wafer conveyance device of the present invention.As shown in figure 12, wafer conveyance device 120 comprises for example eight conveying chambers and seven processing modules, and can carry out seven different continuous processing or seven identical continuous processing.As schematically, the overall structure of wafer conveyance device 120 is not linear but sentences right-angle bending at processing module 122a place and middle conveying chamber 124a.
The processing module that constitutes wafer conveyance device 120 is constructed such that basically the reciprocal side of processing module is connected to the conveying chamber adjacent with this processing module via gate valve.Yet, in order to realize the warp architecture as schematically showing, a processing module 122a has the flat shape of general square shape and is constructed such that two sides that are perpendicular to one another in four sides are connected to two conveying chambers adjacent with this processing module 122a via two gate valves respectively.Similarly, the reciprocal side of each conveying chamber is attached to gate valve basically.Yet a conveying chamber 124a adjacent with above-mentioned processing module 122a has the flat shape of general square shape and is constructed such that two sides that are perpendicular to one another in four sides are connected to two processing modules adjacent with this conveying chamber 124a via two gate valves respectively.The flat shape of processing module and conveying chamber is not limited to square.For example, can adopt such as various flat shapes such as circles.In this case, (corresponding with the 122a among Figure 12) in the processing module is configured to be connected to two conveying chambers adjacent with this processing module via two gate valves respectively, and is constructed such that the direction of these two gate valves is perpendicular to one another.In addition, (corresponding with the 124a among Figure 12) in the conveying chamber is configured to be connected to an above-mentioned processing module and another processing module via two gate valves respectively, and is constructed such that the direction of these two gate valves is perpendicular to one another.
If compare with the wafer conveyance device 60 that also can carry out handling for seven times among Fig. 6, littler taking up room can be realized in the gap between the row of the row by eliminating load chamber 121 sides (among Figure 12 following) and relief chamber's 123 sides (among Figure 12 above-listed).Just, except the effect that realizes wafer conveyance device 60, can also make taking up room of wafer conveyance device littler, and show the effect that can realize identical throughput.
Figure 13 shows another configuration example of the wafer conveyance device in the present embodiment.The something in common of the wafer conveyance device 120 among wafer conveyance device 130 and Figure 12 is: do not have the gap between the row (following) of load chamber 131 sides and the row (above-listed) of relief chamber's 133 sides.On the other hand, wafer conveyance device 130 is with the difference of wafer conveyance device 120: wafer conveyance device 130 is the adjacent middle conveying chamber 134b of conveying chamber 134a in the middle of the end of a side opposite with relief chamber's 133 place sides with load chamber 131 of device also comprises with one.The flat shape that these two adjacent middle conveying chamber 134a and 134b have general square shape, and be connected to each other via a side in the two sides that are perpendicular to one another.Conveying chamber 134a and 134b are connected to adjacent separately processing module 132a and 132b via another side in the two sides that are perpendicular to one another respectively in the middle of each.The wafer that lives through handling in processing module 132a is transferred conveying mechanism 135a in the 134a of chamber and is sent to conveying mechanism 135b in the conveying chamber 134b adjacent with conveying chamber 134a.
The flat shape of middle conveying chamber is not limited to the shape of general square shape.For example, can adopt such as various flat shapes such as circles. Middle conveying chamber 134a and 134b among Figure 13 are connected to each other via gate valve.In addition, these two middle conveying chamber 134a are connected to different processing module 132a and 132b via direction another gate valve different with the direction of above-mentioned gate valve respectively with 134b.
Utilize this structure, as shown in figure 13, load chamber 131 and relief chamber 133 can be configured to make the position of load chamber 131 and the position alignment of relief chamber 133.The factory of actual use wafer conveyance device is divided into a plurality of clean rooms of various particle levels.Wafer conveyance device can be oriented to cross over the plural clean room of varying level.For example, load chamber 131 and relief chamber 133 can be configured in the clean room 136 that particle density is about 10ppm, and other conveying chamber and processing module can be configured in the clean room 137 that particle density is 1000ppm.In this case, if aim at the position of load chamber and the position of relief chamber as illustrated in fig. 13, then can be convenient from the viewpoint of the layout of factory.In this, the structural table of wafer conveyance device 130 reveals more favourable effect.In addition, if showing, wafer conveyance device 130 comprises the even number processing module then the effect of the minimum that takes up room.
The 4th execution mode
Figure 14 shows the plane graph of another execution mode at the line style wafer conveyance device of the present invention.Wafer conveyance device 140 has following structure: the structure of wafer conveyance device of the present invention 50 shown in Figure 5 is deformed into further can handle two wafers simultaneously.As schematically, wafer conveyance device 140 comprises two load chamber 141a and 141b and two 143a of relief chamber and 143b.Processing module 52a in the wafer conveyance device 50 is divided into a pair of processing module 142a and the 142e that can handle independently among Figure 14.The conveying chamber 144a that is connected to load chamber 141a and 141b has two sides, and conveying chamber 144a is connected to two processing module 142a and 142e via these two sides at the opposition side of load chamber 141a and 141b.The conveying chamber 144e that is connected to 143a of relief chamber and 143b also has similar structure.Remaining conveying chamber, be conveying chamber 144b to 144d for example have as shown in figure 14 when observing, be the flat shape of general square shape from the top, and have four sides.
Processing module 142a is constructed such that a side in two the adjacent sides that are connected to gate valve of processing module 142a is connected to the side of being positioned at of a conveying chamber 144a side opposite with load chamber place side via gate valve.The another side of processing module 142a is connected to the side that is positioned at the load chamber side of next conveying chamber 144b via gate valve.As schematically, 142a is similar with processing module, and processing module 142e also is connected to the side of being positioned at of a conveying chamber 144a side opposite with load chamber place side and the side that is positioned at the load chamber side of conveying chamber 144b.
As schematically, other processing module 142b to 142d also is connected similarly with 142f to 142h and conveying chamber 144b to 144d.
In wafer conveyance device 140, conveying chamber 144a can have three sides, and conveying chamber 144a is connected to load chamber 141a and 141b, processing module 142a and processing module 142e respectively via these three sides.Also can construct conveying chamber 144e similarly.As schematically, other conveying chamber 144b to 144d is configured to have the flat shape of general square shape and has four sides, and conveying chamber 144b to 144d is connected to four adjacent processing modules respectively via these four sides.These conveying chambers 144b to 144d also can have for example flat shape of general square shape.Construct each parts as described above, can not stay as shown in figure 14 to connect these parts with gap, and can reduce taking up room of wafer conveyance device 140.
The flat shape of each processing module and conveying chamber is not limited to square configuration.Can adopt such as various flat shapes such as circles.In this case, for example, a gate valve in two gate valves all being perpendicular to one another via direction of processing module 142a and 142e is connected to the first end conveying chamber 144a that is arranged in the place ahead and is connected to the middle conveying chamber 144b that is positioned at the rear via another gate valves of above-mentioned two gate valves.A gate valve in two gate valves that processing module 142b and 142f all are perpendicular to one another via direction is connected to the middle conveying chamber 144b that is arranged in the place ahead and is connected to the middle conveying chamber 144c that is positioned at the rear via another gate valves of above-mentioned two gate valves.
Utilize wafer conveyance device 140, can handle two wafers simultaneously.In Figure 14 A, two the load chamber 141a and the 141b that are configured in the left end of device are used to pile up the wafer that is untreated, and are configured in two 143a of relief chamber of right-hand member of device and 143b and are used to pile up and handle the back wafer.When using wafer conveyance device 140 to handle two wafers simultaneously, shown in Figure 14 A, can manage throughout and handle this two wafers in the module respectively by transferring two wafers in the mode of straight line, perhaps as shown in Figure 14B, can handle this two wafers by transfer two wafers in the mode of Z font.
In Figure 14 A, the wafer from load chamber 141a input wafer conveyance device 140 is transferred in turn by being positioned at above-listed processing module 142a to 142d and continuously through being subject to processing, being output from the 143a of relief chamber then.When the wafer that has lived through handling in processing module 142a is transplanted on next processing module 142b by middle conveying chamber 144b, the wafer that is untreated is transplanted on processing module 142a and processed among this processing module 142a by the first end conveying chamber 144a from load chamber 141a, therefore, can handle a large amount of wafers at high speed.In addition, when the wafer that has lived through handling in processing module 142b (first wafer) is transplanted on next processing module 142c by middle conveying chamber 144c, the wafer that lives through handling in processing module 142a (second wafer) is transplanted on next processing module 142b and processed in this processing module 142b by middle conveying chamber 144b, and the wafer that is untreated (the 3rd wafer) is transported to processing module 142a and processed among this processing module 142a by the first end conveying chamber 144a from load chamber 141a.As mentioned above, in the present embodiment, can therefore, can improve throughput by a plurality of wafers are sent into process chamber in turn and handled a plurality of wafers simultaneously.According to processing, the wafer that also first can be untreated is transplanted on load chamber 141a, and in processing module 142a, 142b, 142c and 142d, handle this wafer, after this wafer is outputed to the 143a of relief chamber, second wafer that is untreated is input to load chamber 141a, and in processing module, handles this wafer.
Similarly, in Figure 14 A, the wafer that is transfused to the wafer conveyance device 140 from load chamber 141b is being arranged in following processing module 142e to 142h continuously through being subject to processing, and is output from the 143b of relief chamber.In this case, the wafer that in processing module 142e, has lived through handling be transplanted on next processing module 142f by middle conveying chamber 144b and in this processing module 142f processed in, the wafer that is untreated is transplanted on processing module 142e and processed among this processing module 142e by the first end conveying chamber 144a from load chamber 141b, therefore, can handle a large amount of wafers at high speed.
Processing sequence according to expectation disposes each chamber.By wafer conveyance device 140 being configured such that wafer conveyance device 140 comprises a plurality of different processing modules, can form film by stacked different film on the wafer of being transferred by wafer conveyance device 140.When the processing sequence of wafer fixedly the time, shown in the example of Figure 14 A, can carry out high speed processing by in wafer conveyance device 140, transferring wafer in the mode of straight line.
As shown in Figure 14B, the wafer conveyance device in the present embodiment 140 can be constructed such that from load chamber 141a be input to wafer the device with predefined order (be not only limit to above-listed or following) by processing module and after being subject to processing, be output from 143a of relief chamber or 143b.Present embodiment shows following effect: because the processing module that can at random construct wafer and passed through, so increased the degree of freedom of handling.For example, can on two wafers that are handled simultaneously, form stacked film with different structure.
For example, under the situation of the processing sequence shown in the solid arrow in Figure 14, the wafer that in processing module 142a, has lived through handling be transplanted on next processing module 142f by middle conveying chamber 144b and in this processing module 142f processed in, the wafer that is untreated is transplanted on processing module 142a and processed among this processing module 142a by the first end conveying chamber 144a from load chamber 141b, therefore, can a large amount of wafer of high speed processing.
Figure 15 shows the plane graph of another configuration example of the wafer conveyance device in the present embodiment.Wafer conveyance device 150 has following structure: the linear structure of the wafer conveyance device 140 among Figure 14 is bent.Insert surge chamber 158 and replace a certain processing module.Different with processing module, reciprocal two sides that surge chamber 158 is constructed such that surge chamber 158 are connected to conveying chamber 154a and the 154b adjacent with surge chamber 158 respectively via gate valve.This structure can realize warp architecture as shown in figure 15.The wafer that uses the conveying mechanism 155a in the conveying chamber 154a to have lived through handling in processing module 152a or 152b is transplanted on surge chamber 158.The conveying mechanism 155b that this wafer is transferred in the 154b of chamber further is transplanted on processing module 152c or 152d and processed this processing module from surge chamber 158.Surge chamber 158 also can be configured to for example make the position or the directed chamber of aiming at or wafer being carried out heat treated or cooling processing of wafer.Processing module needn't have square flat shape, but can have for example identical with 152e pentagonal flat shape.In this case, as in the present embodiment, can keep as far as possible for a short time by wafer conveyance device 150 being configured such that processing module and adjacent two conveying chambers do not stay to contact with gap and will take up room.
When the quantity of the processing that wafer is carried out increased, the length of wafer conveyance device 140 shown in Figure 14 also increased.Yet, have following situation: the space that can not guarantee in factory, to install device with this linear structure.Utilize the execution mode among Figure 15, can easily realize having wafer conveyance device by more than one surge chamber being inserted in the device with the corresponding structure of shape of installation site.
Figure 16 shows the plane graph of another configuration example of the wafer conveyance device in the present embodiment.This structure is the structure that the wafer conveyance device 140 among Figure 14 is become the U font, and in this U font structure, two load chamber 161a and 161b and two unloading 163a and 163b are set at both ends.In Figure 16, conveying chamber 164a is connected to load chamber 161a and 161b, and two surge chamber 168a and 168b are connected to conveying chamber 164a.These two surge chambers are connected to two sides that are positioned at the load chamber side of next conveying chamber 164b respectively.To be untreated wafer by conveying chamber 164a after load chamber 161a or 161b are transplanted on surge chamber 168a or 168b, and this wafer that is untreated is transferred chamber 164b and is input to processing module 162a or 162b and processed in processing module 162a or 162b.As described in above-mentioned other execution mode, also can adopt the load chamber 141a that comprises as shown in figure 14 and the structure of 141b, conveying chamber 144a to replace load chamber 161a and 161b, conveying chamber 164a, surge chamber 168a and 168b and conveying chamber 164b.
The conveying chamber 164d that enlarges has the buffer part 168c and the 168d of conveying mechanism 165d that is positioned at substantial middle portion and the both sides that are positioned at conveying mechanism 165d.Wafer is placed among the buffer part 168c by the conveying chamber 164c adjacent with the conveying chamber 164d that enlarges, and be transferred the buffer part 168d that the 165d of mechanism is transplanted on opposition side, and the quilt conveying chamber 164e adjacent with the conveying chamber 164d that enlarges further is transplanted on processing module subsequently.
In wafer conveyance device 160, because the U font structure of wafer conveyance device 160, can dispose load chamber 161a, 161b and the 163a of relief chamber, 163d in the mode of the position alignment of the position of load chamber 161a, 161b and the 163a of relief chamber, 163d.Therefore, wafer conveyance device 160 has following feature: the same with the wafer conveyance device 130 among Figure 13, wafer conveyance device 160 can easily be positioned to cross over two clean rooms 166 and 167 of varying level.In addition, have the conveying chamber 164d of the expansion of different shape by utilization, can realize neatly having the structure corresponding with the layout of installing space at the line style wafer conveyance device.
Figure 17 shows and uses wafer conveyance device 170 to carry out the mode of actual treatment, wherein, this wafer conveyance device 170 have with present embodiment shown in Figure 14 in the structure of similar of wafer conveyance device.Suppose on wafer, to be formed for semiconductor device such as dielectric films such as LaHfOx and LaAlOx.
At first, the wafer that will be untreated from the outside (atmospheric side) of load chamber 171 is input to the load chamber 171, uses exhaust gear (not schematically showing) that load chamber 171 is carried out exhaust then.Then, the first wafer holding member 175a that use to constitute the conveying mechanism in the first end conveying chamber 174a wafer that will be untreated is input among the first processing module 172a, and to wafer outgas processing (degassing processing) or pre-clean processes.Then, in the second processing module 172b, sputter on the wafer by RF and to form such as film such as LaHfOx and LaAlOx or comprise LaHfOx and the stacked film of LaAlOx.For example, the second processing module 172b comprises the cathode electrode that keeps target material LaHfOx or LaAlOx in inside.When for example argon (Ar) gas is directed to the second processing module 172b and when cathode electrode applies RF electric power, produces plasma in the second processing module 172b via gas introduction port (not schematically showing).Argon particle of drawing from plasma etc. and target collision, thus expectation film on wafer, formed as sputtering particle.In the 3rd processing module 172c, wafer is carried out UHV annealing, in addition, manage everywhere the as required and carry out predetermined process in the module 172d, then, from the processed wafer of relief chamber's 173 last outputs.As schematically, each conveying chamber can have the arm structure that comprises two arms.
Figure 18 shows and is being situation of carrying out actual treatment in the middle of the line style wafer conveyance device increases the 5th processing module 182e, the 6th processing module 182f and after the conveying chamber shown in Figure 17.What suppose is to be used to form the flow process of distribution with the Al film, wherein this Al film comprises that the through hole that is used in storage device buries (via hole embedment) underground, and membrane structure is designed to for example Ti (20nm)/TiN (60nm)/Seed-Al (200nm)/Fill-Al (450nm).
At first, the wafer that will be untreated from outside (atmospheric side) is input to load chamber 181, and load chamber 181 is carried out exhaust.Then, after the wafer that will be untreated is input among the first processing module 182a, in the second processing module 182b, wafer is outgased and handle and carry out the precleaning of crystal column surface.Then, wafer is input among the 3rd processing module 182c, and form in turn the Ti film (for example, 20nm) and the TiN film (for example, 60nm).Then, wafer being input to the from the 3rd processing module 182c manages module 182d everywhere and forms the Seed-Al film (for example, 200nm).Then, wafer being managed module 182d everywhere from the is conveyed into the 5th processing module 182e and forms the Fill-Al film (for example, 450nm).Then, wafer is input to the 6th processing module 182f from the 5th processing module 182e, after cool wafers, wafer is outputed to outside (atmospheric side) from relief chamber 183.In Figure 18, forming thickness in 182c is the Ti film of 20nm, forming thickness in 182d is the Seed-Al film of 200nm, yet, by preparing two processing module 182c, also can form thickness and be the Ti film of 10nm in first processing module 182c and form thickness in second processing module 182c is the Ti film of 10nm, so forming gross thickness is the Ti film of 20nm.For example, if the film among the 182c form to need two minutes and 182d in film form and need one minute, then by preparing two processing module 182c, wafer can wait pending, the result can improve throughput.
Figure 19 shows and is being situation of carrying out actual treatment in the middle of the line style wafer conveyance device increases the 5th processing module 192e, the 6th processing module 192f and after the conveying chamber shown in Figure 17.The processing of supposing is to form continuous processing not making stacked magnetic film be exposed under the situation of atmosphere after this stacked magnetic film of etching the processing/film that forms coverlay by CVD.For example, treat that etched membrane structure is PR/Ta/TMR.The wafer that is untreated is imported into load chamber 191.At first, as required, in the first processing module 192a, carry out the finishing of resist (resist), in the second processing module 192b, use resist to utilize CF as mask
4Be that gas carries out reactive ion etching (RIE) to the Ta film.In addition, in order to peel off resist, in same processing module 192b, remove resist.After wafer is shifted into the 3rd processing module 192c, at CH
3OH carries out RIE to the stacked magnetic film with TMR structure in handling.Wafer further is transplanted on and is managed module 192d everywhere, and is utilizing CH
3OH carries out after the RIE, carries out ion beam milling (IBE), with the clean surface.After the wafer that lives through IBE is transferred in a vacuum continuously, in the 5th processing module 192e, form nitride film, oxide-film or carbonized film etc. by carrying out plasma CVD or remote plasma cvd.After in the 6th processing module 192f, carrying out predetermined process, from relief chamber's 193 output wafers.
Figure 20 shows and uses wafer conveyance device 200 to carry out the situation of actual treatment, and this wafer conveyance device 200 has following structure: in the middle of four processing modules and two conveying chamber further be increased to as shown in figure 18 at the line style wafer conveyance device.What suppose is the flow process that is used for forming in the memory cell portion of magnetic resistance random access memory (MRAM) the TMR stacked film.Membrane structure is designed to for example Ta (20nm)/Ru (5nm)/IrMn (7nm)/CoFe (2.5nm)/Ru (0.9nm)/CoFeB (3nm)/MgO (1nm)/CoFeB (3nm)/Ta (2nm)/Ru (10nm)/Ta (30nm).
After in the first processing module 202a, carrying out etch processes, in the second processing module 202b, (for example form the Ta film respectively by the DC sputter, 20nm), in the 3rd processing module 202c, (for example form the Ru film, 5nm), manage everywhere among the module 202d the and (for example form the IrMn film, 7nm) and the CoFe film (for example, 2.5nm), in the 5th processing module 202e, form the Ru film (for example, 0.9nm)/the CoFeB film (for example, 3nm).In addition, sputter among the 6th processing module 202f by RF respectively and (for example form the MgO film, 1nm), sputter among the 7th processing module 202g by DC and (for example form the CoFeB film, 3nm) and the Ta film (for example, 2nm), in the 8th processing module 202h, (for example form the Ru film, 10nm), in the 9th processing module 202i, form the Ta film (for example, 30nm).In addition, in the tenth processing module 202j, carry out predetermined process.In above-mentioned processing, form the MgO film by the RF sputter.In Figure 20, forming thickness in 202b is the Ta film of 20nm, forming thickness in 202c is the Ru film of 5nm, yet, by preparing two processing module 202b, also can form thickness and be the Ta film of 10nm in first processing module 202b and form thickness in second processing module 202b is the Ta film of 10nm, so forming gross thickness is the Ta film of 20nm.For example, if the film among the 202b form to need two minutes and 202c in film form and need one minute, then by preparing two processing module 202b, wafer can wait pending, the result can improve throughput.
Figure 21 shows the situation of similarly carrying out actual treatment with Figure 20 at line style wafer conveyance device 210 of using.What suppose is the flow process that is used for forming the TMR stacked film in the memory cell portion of MRAM.Membrane structure is designed to for example Ta (20nm)/Ru (5nm)/IrMn (7nm)/CoFe (2.5nm)/Ru (0.9nm)/CoFeB (3nm)/MgO (1nm)/CoFeB (3nm)/Ta (2nm)/Ru (10nm)/Ta (30nm).
After in the first processing module 212a, carrying out etch processes, in the second processing module 212b, (for example form the Ta film, 20nm), in the 3rd processing module 212c, (for example form the Ru film, 5nm), manage everywhere among the module 212d the and (for example to form the IrMn film, 7nm) and the CoFe film (for example, 2.5nm), in the 5th processing module 212e, form the Ru film (for example, 0.9nm) and the CoFeB film (for example, 3nm), in the 6th processing module 212f, form the Mg film (for example, 1nm), and in the 7th processing module 212g this Mg film of oxidation.In addition, forming the CoFeB film in the 8th processing module 212h (for example, 3nm) (for example, 2nm), forms the Ru film and (for example, 10nm), forms the Ta film (for example, 30nm) in the tenth processing module 212j with the Ta film in the 9th processing module 212i.In above-mentioned processing, after forming the Mg film, form the MgO film by this Mg film of oxidation by the DC sputter.The first processing module 212a is an etch module, and the 7th processing module 212g is the oxidation module.In Figure 21, forming thickness in 212b is the Ta film of 20nm, forming thickness in 212c is the Ru film of 5nm, yet, by preparing two processing module 212b, can form the Ta film of thickness 10nm in first processing module 212b and form thickness in second processing module 212b is the Ta film of 10nm, is the Ta film of 20nm thereby form gross thickness.For example, if the film among the 212b form to need two minutes and 212c in film form and need one minute, then by preparing two processing module 212b, wafer can wait pending, the result can improve throughput.
Figure 22 shows the situation of similarly carrying out actual treatment with Figure 20 at line style wafer conveyance device 220 of using.What suppose is the flow process that is used to form CrOx/AlOx stacked film, CrOx monofilm or AlOx monofilm, and wherein, CrOx/AlOx stacked film, CrOx monofilm or AlOx monofilm are the dielectric films that is used in the semiconductor device.In the second processing module 222b, form after the Cr film, in the 3rd processing module 222c, form the CrOx film by oxidation processes.The formation of AlOx film is same, just, forms in the 6th processing module 222f after the Al film, forms AlOx by oxidation processes in the 7th processing module 222g.Film thickness as required, prepare many group Cr films form modules (222b, 222d) and the oxidation module (222c 222e) (does not schematically show), and need not to return to carry and just can form the CrOx film.Film thickness as required, prepare many group Al films form modules (222f, 222h) and the oxidation module (222g 222i) (does not schematically show), and need not to return to carry and just can form the AlOx film.After the formation of finishing the CrOx/AlOx stacked film of expectation, CrOx monofilm or AlOx monofilm, in the tenth processing module 222j, carry out annealing in process.In Figure 22, the first processing module 222a is a degassing module, and the 3rd processing module 222c, the 5th processing module 222e, the 7th processing module 222g and the 9th processing module 222i all are oxidation modules, and the tenth processing module 232j is the annealing module.
Figure 23 shows the situation of similarly carrying out actual treatment with Figure 20 at line style wafer conveyance device 230 of using.What suppose is the flow process that is used to form CrOx/AlOx stacked film, CrOx monofilm or AlOx monofilm, and wherein, CrOx/AlOx stacked film, CrOx monofilm or AlOx monofilm are the dielectric films that is used in the semiconductor device.In the second processing module 232b, form after the Cr film, in the 3rd processing module 232c, form the CrOx film by oxidation processes.The formation of AlOx film is identical, just, forms in the 6th processing module 232f after the Al film, forms AlOx by oxidation processes in the 7th processing module 232g.Film thickness as required, (232b, 232d) (232c 232e) (does not schematically show), and utilizes to return to carry and repeat film formation and oxidation with the oxidation module to prepare many group Cr films formation modules.When formation thickness was the CrOx film of 20nm, after formation thickness was the Cr film of 1nm, forming thickness in the oxidation module was the CrOx film of 2nm, forms CrOx film (20nm) for ten times by repeating above-mentioned task.The formation of AlOx film is identical.After the formation of finishing the CrOx/AlOx stacked film of expectation, CrOx monofilm or AlOx monofilm, in the tenth processing module 232j, carry out annealing in process.In Figure 23, the first processing module 232a also is a degassing module, and the 3rd processing module 232c, the 5th processing module 232e, the 7th processing module 232g and the 9th processing module 232i also all are oxidation modules, and the tenth processing module 232j also is the annealing module.
Figure 24 shows the situation of similarly carrying out actual treatment with Figure 20 at line style wafer conveyance device 240.What suppose is the flow process that is used to form the LaAlOx film, and wherein, the LaAlOx film is the dielectric film that is used in the semiconductor device.After the co-sputtered formation LaAl alloy film by La and Al in the second processing module 242b, in the 3rd processing module 242c, form the LaAlOx film by oxidation processes.In addition, manage everywhere among the module 242d after co-sputtered by La and Al forms the LaAl film, in the 5th processing module 242e, form the LaAlOx film by oxidation processes the.Similarly, repeat film and form (the 6th processing module 242f) and oxidation (the 7th processing module 242g), film formation (the 8th processing module 242h) and oxidation (the 9th processing module 242i).Repeat above-mentioned processing, to form the LaAlOx film of expectation.
In Figure 24, the first processing module 242a also is a degassing module, and the 3rd processing module 242c, the 5th processing module 242e, the 7th processing module 242g and the 9th processing module 242i also all are oxidation modules, and the tenth processing module 242j also is the annealing module.
Figure 25 show use have a structure identical with structure shown in Figure 14 carry out the situation of actual treatment at line style wafer conveyance device 250.What suppose is to be used to form the flow process of distribution with the Al film, and wherein this distribution comprises that with the Al film through hole that is used in the storage system device buries underground.Membrane structure is designed to for example Ti (20nm)/TiN (60nm)/Seed-Al (200nm)/Fill-Al (450nm)/TiN (100nm).At first, the wafer that will be untreated is input to load chamber 251 from outside (atmospheric side), and exhaust is carried out in the inside of load chamber 251.Then, after the wafer that is untreated is imported among the first processing module 252a,, then, in the second processing module 252b, carry out the precleaning of crystal column surface to the wafer processing that outgases.Then, wafer is imported among the 3rd processing module 252c, and form in turn the Ti film (for example, 20nm) and the TiN film (for example, 60nm).Then, wafer is input to the and is managed module 252d everywhere from the 3rd processing module 252c, and forms the Seed-Al film (for example, 200nm).Then, wafer is managed module 252d everywhere from the and is input to the 5th processing module 252e, and forms the Fill-Al film (for example, 450nm).Then, wafer is input to the 6th processing module 252f from the 5th processing module 252e, and cool wafers.After this, in the 7th processing module 252g or the 8th processing module 252h, form the ARC Cap film of TiN, and wafer outputs to outside (atmospheric side) from relief chamber 253 after will handling.
In Figure 25, the first processing module 252a is a degassing module, and the second processing module 252b is the precleaning module, and the 6th processing module 252f is a refrigerating module.In Figure 25, forming thickness in 252c is the Ti film of 20nm, forming thickness in 252d is the Seed-Al film of 200nm, yet, by preparing two processing module 252c, also can form thickness and be the Ti film of 10nm in first processing module 252c and form thickness in second module 252c is the Ti film of 10nm, is the Ti film of 20nm so form gross thickness.For example, if the film among the 252c form to need two minutes and 252d in film form and need one minute, then by preparing two processing module 252c, wafer can wait pending, the result can improve throughput.
To execution mode shown in Figure 24, is that example schematically show each processing module with the arm structure at Figure 17, yet, also can use the single armed structure.
Claims (1)
1. one kind at the line style wafer conveyance device, describedly comprises at the line style wafer conveyance device:
Load chamber, described load chamber are used for from outside input wafer;
Relief chamber, described relief chamber is used for wafer is outputed to the outside; And
A plurality of conveying chambers and a plurality of processing module, described conveying chamber and described processing module are connected in series between described load chamber and described relief chamber, wherein:
Described conveying chamber alternately is connected with described processing module;
Described a plurality of conveying chamber comprises the first end conveying chamber that is connected to described load chamber, the second end conveying chamber that is connected to described relief chamber and other one or more middle conveying chamber;
The described first end conveying chamber is transported to the initial treatment module with wafer from described load chamber, conveying chamber was being carried wafer in the middle of each was described between the processing module in its place ahead and the processing module at its rear, and the described second end conveying chamber is transported to described relief chamber with wafer from last processing module;
Described processing module and described conveying chamber have the flat shape of general square shape;
Each processing module is divided into first processing module and second processing module that all can handle independently;
Described first processing module and described second processing module have two adjacent sides respectively, a side in described two sides of described first processing module is connected to a side of the side of the conveying chamber that is arranged in described first processing module the place ahead via gate valve, another side in described two sides of described first processing module is connected to a side of the side of the conveying chamber that is arranged in the described first processing module rear via gate valve, a side in described two sides of described second processing module is connected to another side of the side of the conveying chamber that is arranged in described second processing module the place ahead via gate valve, another side in described two sides of described second processing module is connected to another side of the side of the conveying chamber that is arranged in the described second processing module rear via gate valve; And
In at least one processing module in described processing module, arrange that surge chamber replaces at least one side in described first processing module and described second processing module, and described surge chamber is configured to be connected to via reciprocal two gate valves of direction the conveying chamber and the conveying chamber that is positioned at the rear of described surge chamber in the place ahead that is positioned at described surge chamber.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011102325396A CN102280399B (en) | 2007-11-09 | 2007-11-09 | Online wafer conveying device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011102325396A CN102280399B (en) | 2007-11-09 | 2007-11-09 | Online wafer conveying device |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2007801014404A Division CN101849285B (en) | 2007-11-09 | 2007-11-09 | Inline-type wafer conveyance device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102280399A true CN102280399A (en) | 2011-12-14 |
| CN102280399B CN102280399B (en) | 2013-11-13 |
Family
ID=45105761
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011102325396A Active CN102280399B (en) | 2007-11-09 | 2007-11-09 | Online wafer conveying device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102280399B (en) |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0799224A (en) * | 1993-09-28 | 1995-04-11 | Hitachi Ltd | Multiple-chamber type semiconductor manufacturing apparatus |
| JPH07230942A (en) * | 1994-02-18 | 1995-08-29 | Hitachi Ltd | Multichamber system and its control method |
| JP2645750B2 (en) * | 1989-07-31 | 1997-08-25 | 東京エレクトロン株式会社 | Substrate processing equipment |
| US5695564A (en) * | 1994-08-19 | 1997-12-09 | Tokyo Electron Limited | Semiconductor processing system |
| US20050006230A1 (en) * | 2001-08-31 | 2005-01-13 | Masaki Narushima | Semiconductor processing system |
| CN1613147A (en) * | 2002-01-08 | 2005-05-04 | 东京毅力科创株式会社 | Semiconductor processing system and semiconductor carrying mechanism |
-
2007
- 2007-11-09 CN CN2011102325396A patent/CN102280399B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2645750B2 (en) * | 1989-07-31 | 1997-08-25 | 東京エレクトロン株式会社 | Substrate processing equipment |
| JPH0799224A (en) * | 1993-09-28 | 1995-04-11 | Hitachi Ltd | Multiple-chamber type semiconductor manufacturing apparatus |
| JPH07230942A (en) * | 1994-02-18 | 1995-08-29 | Hitachi Ltd | Multichamber system and its control method |
| US5695564A (en) * | 1994-08-19 | 1997-12-09 | Tokyo Electron Limited | Semiconductor processing system |
| US20050006230A1 (en) * | 2001-08-31 | 2005-01-13 | Masaki Narushima | Semiconductor processing system |
| CN1613147A (en) * | 2002-01-08 | 2005-05-04 | 东京毅力科创株式会社 | Semiconductor processing system and semiconductor carrying mechanism |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102280399B (en) | 2013-11-13 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101849285B (en) | Inline-type wafer conveyance device | |
| CN101855717B (en) | Inline-type wafer conveyance device | |
| KR101522992B1 (en) | Manufacturing apparatus | |
| TWI631645B (en) | Substrate processing device | |
| US20070297884A1 (en) | Wafer receptacle in semiconductor device fabrication equipment | |
| JP7507693B2 (en) | Magnetic tunnel junction structure and method of manufacturing same | |
| WO2013179574A1 (en) | Method for manufacturing layered film and vacuum-processing apparatus | |
| KR102445327B1 (en) | Magnetic tunnel junctions and methods of manufacturing the same | |
| JP4417734B2 (en) | In-line vacuum processing equipment | |
| CN102280399B (en) | Online wafer conveying device | |
| TWI811334B (en) | Magnetic tunnel junctions with coupling – pinning layer lattice matching | |
| US20210043432A1 (en) | Substrate support system | |
| JP2016063166A (en) | Substrate processing device | |
| KR100781083B1 (en) | Substrate transfer equipment and substrate processing system using the same | |
| US11339467B2 (en) | Sputtering apparatus and method for fabricating semiconductor device using the same | |
| KR20100001118A (en) | Substrate heat treatment system | |
| JP2020119942A (en) | Vacuum processing device | |
| CN114959604A (en) | Apparatus and method for performing sputtering process |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |