CN102279768B - Simulation apparatus and simulation method - Google Patents
Simulation apparatus and simulation method Download PDFInfo
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- CN102279768B CN102279768B CN201110155067.9A CN201110155067A CN102279768B CN 102279768 B CN102279768 B CN 102279768B CN 201110155067 A CN201110155067 A CN 201110155067A CN 102279768 B CN102279768 B CN 102279768B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
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- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
- G06F9/45504—Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
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Abstract
The present invention provides a simulation apparatus which can realize high speed while representing a elapsed time and timing of a physical device. The simulation apparatus includes a HW model execution unit that executes a HW model, a SW model execution unit that executes a SW model, a simulation time management unit that sets a first simulation time indicating a total elapsed time of a simulation time of the HW model, ahead by the simulation time of which the HW model notified, and sets the second simulation time indicating a total elapsed time of a simulation time of the SW model, ahead by the simulation time of which the SW model notified, and a scheduler that compares the first simulation time with the second simulation time, causes the SW model or the HW model to be executed based on the comparison result, and causes only the hardware model to be executed instead of execution of an idle loop when the SW model awaits an interrupt from the HW model.
Description
Technical field
Embodiments of the present invention relate to the emulation technology of virtually equipment being made up of software and hardware being simulated.
background technology
In the past, the known simulator that has the equipment to bring into play function by hardware and software collaborative work to carry out emulation.Such simulator has: HW (Hardware, the hardware) model that hardware handles is simulated; With SW (Software, the software) model that processing is simulated to software.Simulator utilizes these HW models, SW model to carry out emulation.In addition, this simulator is realized the action arranged side by side of hardware configuration and the software configuration of simulation object equipment (hereinafter referred to as physical device) by the successively processing of HW model and SW model.
In addition, simulator due to the time of reproducing physical device through, regularly, so keep and manage " simulation time " such temporal information according to each HW model, SW model.
And, disclose following technology.
Prior art document:
Patent documentation:
Patent documentation 1: TOHKEMY 2004-234528 communique
Patent documentation 2: TOHKEMY 2005-293219 communique
Patent documentation 3: TOHKEMY 2006-023852 communique
Patent documentation 4: TOHKEMY 2009-26113 communique
Patent documentation 5: TOHKEMY 2006-163983 communique
Non-patent literature:
Non-patent literature 1: " the high speed technology System-C exploitation STARC based on hard-soft cooperation checking " Nikkei micro element, in January, 2005 number, P.106-107
summary of the invention
At this, simulation time is described and due to the computing institute elapsed time in simulator with reference to Figure 10.Figure 10 (A) is the figure of an example of each processing time of spending when physical device real-world operation is shown (or, each imagination time of the processing in the situation that of the design phase).Figure 10 (B) is the figure that an example of the simulation time on simulator is shown.In addition, Figure 10 (C) is the figure that is illustrated in simulator the time (hereinafter referred to as the real time) that when emulation is carried out in the each processing to physical device, reality spends.
Suppose that the processing time in physical device is for example as shown in Figure 10 (A), processing A is 1ms, and treatments B is 2ms, and processing C is 1ms, and processing D is 1ms.In the simulator of simulation time, manage the time of the each processing in this physical device as simulation time having considered.,, as shown in Figure 10 (A), Figure 10 (B), the processing time in physical device and simulation time are equivalent.
While each processing of physical device being carried out to emulation in simulator, the processing time of the control of the hardware resource of generation based on simulator and the processing time based on software control.Therefore, as shown in Figure 10 (C), the real time can not fall into the processing time of physical device, but produces and postpone in each is processed.
In the prior art, at SW model, in the time waiting for the state from the interruption of HW model, simulator will be carried out standby and process with circulation (hereinafter referred to as dallying).That is to say, the simulator of carrying out emulation must distribute hardware resource for the processing relevant to the idling conditions of SW model.Its result, exists and causes the execution speed of emulation such problem that declines.
In addition, in previous methods, the execution of the busy circulation in the idle running of OS (Operating System, operating system) is distributed to the resource of principal computer.Principal computer, during waiting for through the simulation time till interrupting generation, consumes necessary above hardware resource, makes emulated execution hydraulic performance decline.
About the problem points of the conventional art, describe with reference to Figure 11.Transformation when Figure 11 illustrates simulation engine on one side according to the SW model in the idle running of emulation on one side of simulation time switching executable unit and HW model.
In these emulation modes, by wait for simulation time through with HW model side time of reproducing simulation object identical time (carrying out idle running) of the simulation time of process through, regularly., in these emulation modes, owing to carrying out at any time the idle running of SW model side, so there is the such problem of resource that consumes necessary above host CPU (Central Processing Unit, CPU (central processing unit)).In addition, in these emulation modes, there is the such problem of expense that produces simulation engine in order to switch executable unit.The resource consumption of these host CPUs and the switching of executable unit are all the main causes that makes emulated execution hydraulic performance decline.
In addition, in the emulation mode in the past of information with simulation time, pass through executable unit's simulation time identical with the executable unit of HW model of SW model while carry out concurrent activity.SW model also need to be carried out emulation with the identical time of needed simulation time till making middle generation disconnected with HW model.But, now, in SW model side, there is no the task of will moving beyond idle running, so idle running can be carried out useless circular treatment and wait for the process of simulation time.
In the emulation of idling conditions, as the method for principal computer not being brought useless load, there is the method (OS emulation mode in real time) that alleviates the load that the OS (Operating System, operating system) when becoming idling conditions brings by handoff process relative time timer function and real time timer function.But the method need to be carried out emulation idling conditions by the resource of principal computer, need to pass through the real time.
Embodiments of the present invention are made in order to address the above problem a little, its object is to provide a kind of resource that does not use principal computer in the emulation of idling conditions, and shorten the time of carrying out in simulator, the load that not only can alleviate main OS is provided thus, and the time that can not make physical device passes through, the playback accuracy of timing is deteriorated, and can make the technology of emulated execution performance high speed.
The simulator of embodiment is in the time that identifying object carries out the processing of hardware and the processing of software, by simulation time being managed to the simulator of execution timing of each processing of reproducing identifying object, described simulation time is carried out these and processes the information of institute's elapsed times for identifying object.And, this simulator has hardware model enforcement division, this hardware model enforcement division is carried out hardware model, and this hardware model is simulated the processing of the hardware that is installed on identifying object, and notifies the simulation time of the process due to the processing of hardware model for each processing.And, simulator has software model enforcement division, this software model enforcement division executive software model, this software model is simulated the processing of the software that is installed on described identifying object, and notifies the simulation time of the process due to the processing of software model for each processing.The simulator of embodiment has simulation time management department, store the first simulation time and the second simulation time, and obtain the simulation time of being notified by hardware model, make the first simulation time pass through obtained simulation time, obtain the simulation time of being notified by software model, make the second simulation time pass through obtained simulation time, total elapsed time of the simulation time that described the first simulation time is hardware model, total elapsed time of the simulation time that described the second simulation time is software model.And simulator has execution instruction unit, relatively the first simulation time and the second simulation time, in the time that the first simulation time is longer than the second simulation time, executive software model, in the time that the second simulation time is longer than the first simulation time, carries out hardware model.And simulator has interrupt management portion, store the current information that whether has the interrupt notification from hardware model to software model.The execution instruction unit of the simulator of embodiment and then have or not interrupt notification to interrupt management portion inquiry, in the time having interrupt notification, the interrupt handling routine of executive software model.On the other hand, in the time there is no interrupt notification, execution instruction unit makes the tasks carrying of software model.And, carry out instruction unit in the time that software model is waited for from the interruption of hardware model, replace the idle running of executive software model and only carry out hardware model, until there is the interruption from hardware model.Carry out instruction unit in the time having there is interruption from hardware model, make the second simulation time advance to the first simulation time.
Brief description of the drawings
Fig. 1 is the module map of an example of the functional structure of the simulator that illustrates that the first embodiment relates to.
Fig. 2 is the figure that an example of the table that the corresponding relation of Model Identification information and simulation time is managed is shown.
Fig. 3 is the figure of an example of the transformation of the emulated execution that illustrates that the first embodiment relates to.
Fig. 4 is the process flow diagram (its 1) of an example of the action of the simulator that illustrates that the first embodiment relates to.
Fig. 5 is the process flow diagram (its 2) of an example of the action of the simulator that illustrates that the first embodiment relates to.
Fig. 6 is the module map of an example of the functional structure of the simulator that illustrates that the second embodiment relates to.
Fig. 7 is the figure of an example of the transformation of the emulated execution that illustrates that the second embodiment relates to.
Fig. 8 is the module map of an example of the functional structure of the simulator that illustrates that the 4th embodiment relates to.
Fig. 9 is the process flow diagram (corresponding with Fig. 5) of an example of the action of the simulator that illustrates that the 4th embodiment relates to.
Figure 10 is the figure for simulation time and real time are described.
Figure 11 is the figure that an example of the transformation of emulated execution is in the past shown.
(symbol description)
1,1A, 1B: simulator; 10,10B: simulation engine; 11: simulation time management department; 12: interrupt emulate management department; 13,13B: scheduler; 14: extraneous model communication control unit; 15: in the free time, indicate; 20,20A, 20B:SW model enforcement division; 21A, 21B: task; 22: idle running; 23: interrupt handling routine; 24: task dispatcher; 25:CPU model; 26,26A:SW model; 27: driver; 30,30B:HW model enforcement division; 31A, 31B:HW model; 32: interruptable controller; 40: extraneous model; 50: equipment.
Embodiment
(the first embodiment)
The simulator of the first embodiment, in the time becoming idling conditions, is not carried out the busy circular treatment of SW model, but the time that simulation time is advanced till occurring from the interruption of HW model next time.Thus, the simulator of the first embodiment does not use the resource of principal computer, and makes emulated execution high speed
An example of the functional block of the simulator that shown in Fig. 1, the first embodiment relates to.In addition, simulator 1 is the computing machine that possesses the hardware resource of Nonvolatile memory devices such as CPU, main storage means and hard disk drive or flash memory etc.
Simulator 1 possesses simulation engine 10, SW model enforcement division 20, HW model enforcement division 30.These each functional blocks are that the program being installed in advance in Nonvolatile memory devices is loaded into main storage means and is carried out to realize by CPU computing.
SW model enforcement division 20 is to simulation object equipment (simulator 1 this digital camera in the time for example digital camera being carried out to emulation.With similarly above-mentioned, simulation object equipment is called to physical device.) software processing carry out emulation.SW model enforcement division 20 possesses the CPU model 25 that carrys out the CPU on artificial actual equipment by software processing.SW model enforcement division 20 is carried out SW model 26, to move on CPU model 25.
HW model enforcement division 30 is simulated the action of the hardware of physical device by execution HW model 31A, 31B, interruptable controller 32. HW model 31A, 31B are to be the program that the action separately of hardware in the physical device such as open and close controlling portion, CCD (Charge Coupled Device, charge-coupled image sensor) imageing sensor of the shutter in the situation of digital camera is simulated to for example physical device.HW model 31A, 31B, for each processing, notify the simulation time of the process due to performed processing to the simulation time management department 11 of simulation engine 10 by upgrading parts with simulation time.In the actual installation of HW model 31A, 31B, use the system level description language that C language has been carried out to expansion.In addition, HW model 31A, 31B export interrupt request as required.
In addition, in Fig. 1, be that simulation engine 10 is managed the executable unit controlling by the module of dotted line.These modules are moved side by side.
Simulation time, HW model 31A, the 31B simulation time separately of simulation time management department 11 to SW model 26 upgrades processing.Simulation time management department 11, for each HW model 31A, 31B, stores total elapsed time of simulation time (following, to be called as required the first simulation time) into main storage means.And simulation time management department 11 stores total elapsed time of the simulation time of SW model 26 (following, to be called as required the second simulation time) into main storage means.And simulation time management department 11 obtains the simulation time of being notified respectively by HW model 31A, 31B, the first simulation time is added obtained simulation time and makes its process.Simulation time management department 11 obtains the simulation time that SW model 26 is notified, and the second simulation time is added obtained simulation time and makes its process.
Simulation time management department 11 manages the second simulation time of each SW model in the time there is multiple SW model.In the time there is multiple HW model, similarly, simulation time management department 11 is for each HW model management the first simulation time.Simulation time management department 11 makes main storage means storage SW model, the identifying information of HW model and the corresponding relation (table) between total elapsed time of simulation time in simulator 1.Simulation time management department 11 manages the simulation time of each SW model, HW model by upgrading this table.Fig. 2 is an example of table that the corresponding relation of Model Identification information and simulation time is managed.
Interrupt emulate management department 12 obtains the interrupt notification from HW model enforcement division 30, by making the current information that whether has the interrupt notification from which model to which model of main storage means storage of simulator 1, having or not of management interrupt thus.
In addition, scheduler 13 is inquired having or not of interrupt notification to interrupt emulate management department 12, and in the time having interrupt notification, instruction SW model enforcement division 20 is to carry out the interrupt handling routine 23 of SW model 26.On the other hand, in the time not interrupting, scheduler 13 is indicated SW model enforcement division 20 so that task 21A, the 21B of SW model 26 or idle running 22 are carried out.
Beyond above-mentioned, simulation engine 10 also has mark 15 in the free time, stores the current information whether having from HW model 31A, 31B to the interrupt notification of SW model 26 in this free time in mark 15.In free time, mark 15 is stored in main storage means or Nonvolatile memory devices, is the mark that the scheduler 13 in simulation engine 10 is managed, and is used to determine whether and dallies.In addition, there is mark 15 in the free time for each SW model 26.In addition, about the setting position of mark 15 in the free time, can consider various forms, for example, also can be included in the structure in interrupt emulate management department 12.And, also can for example, carry out the writing control, read control of mark 15 in the free time, management by other unit (interrupt emulate management department 12).
Then, the interrupt notification from HW model enforcement division 30 to SW model enforcement division 20 in simulator 1 is described.
HW model 31A or 31B ask the interruption to SW model 26 to interruptable controller 32.Which HW model interruptable controller 32 notifies which SW model to have carried out interrupt request to the interrupt emulate management department 12 of simulation engine 10.Interrupt emulate management department 12, via the CPU model 25 of SW model enforcement division 20, interrupts SW model 26.The task dispatcher 24 of SW model 26, in the time interrupting occurring, interrupts and execution interrupt handling routine 23 execution of the task of current running.When the processing of interrupt handling routine 23 finishes, reopen the task or the scheduler 24 of executing the task that interrupt occurring execution before, the hand-off process of executing the task.
In addition, when the task 21A of SW model 26 or 21B calling task scheduler 24 are abandoned right of execution, task dispatcher 24 gives right of execution to carrying out the highest task of relative importance value in this moment.In the time not there is not should carrying out of task, task dispatcher 24 22 gives right of execution to dallying.
Then, describe simulation time in detail and upgrade parts.In SW model 26 and HW model 31A, 31B, embed and have simulation time to upgrade parts (waitfor function), notify simulation time process to simulation engine 10.The waitfor function that upgrades parts as simulation time is described.Waitfor (t) function is the function that upgrades simulation time.In addition, waitfor (t) function is to notify to simulation time management department 11 function that adds independent variable t with the total simulation time to the source of calling (total of current simulation time).For example, in the time that SW model 26 has called waitfor (t), simulation time management department 11 adds independent variable t to total simulation time of SW model 26.When HW model 31A, 31B have called waitfor (t) similarly, simulation time management department 11 to HW model 31A, 31B respectively corresponding total simulation time add independent variable t.
The scheduler 13 of simulation engine 10 is made as the executable unit that has issued waitfor (t) to carry out waiting status until through simulation time t, if through simulation time t, this executable unit is made as to executable state.
Fig. 3 represents the transformation of the executable unit based on simulator 1.In SW model 26, replace as shown in Figure 11 and 22 carry out circular treatment by dallying, make through until interrupt the simulation time occurring.Then, simulator 1 is until only make HW model carry out through the simulation time of HW model side.So, useless circular treatment disappears, and the switching of executable unit is minimum, and useless switching disappears.
Then,, with reference to Fig. 4, the process flow diagram of Fig. 5 illustrates the action of simulator 1.
Be SW model 26 at (S1 when waiting for from the interruption of HW model 31A, 31B and to dally as the executable unit of SW model enforcement division 20, be), represent it is the meaning of idle running to scheduler 13 notices, mark 15 in the free time is made as to ON (S2).If while idle running (S1, no), process and enter step S3.SW model 26, for t that simulation time is advanced, calls the waitfor function (S3) that upgrades parts as simulation time.
In addition, on the other hand, as (the S4 that is HW model 31A, 31B when the interruption key element existing for SW model 26 of the executable unit of HW model enforcement division 30, be), interrupt key element (S5) to interrupt emulate management department 12 notices, make scheduler 13 that mark 15 in the free time is made as to OFF.At this, be set as if be still in S2 the state (ON state) (S6 is) that in the free time, mark 15 is ON, HW model 31A, 31B notify mark 15 in the free time to change to OFF (S7) from ON to simulation time management department 11.In free time, mark 15 becomes the state (S8) of OFF.On the other hand, when in the free time, mark 15 is OFF (S6, no), the state (S8) of the OFF maintaining the statusquo.
In addition, on the other hand, in the time of the interruption key element less than for SW model 26 (S4, no), process and enter S9.HW model 31A, 31B, for t that simulation time is advanced, call the waitfor function (S9) that upgrades parts as simulation time.
The source of calling (S10) of waitfor function is distinguished by simulation time management department 11.At this, when the source of calling is SW model 26 (S10, SW model), simulation time management department 11 passes through the total simulation time T under the current time of SW model 26
sWadd that t upgrades (S11).On the other hand, while in the source of calling being HW model 31A, 31B (S10, HW model), simulation time management department 11 is by the current total simulation time T to HW model 31A, 31B
hWadd that t upgrades the simulation time of HW model (S12).In addition,, when mark 15 does not change the notice for OFF from ON from HW model 31A, 31B receive the free time (S13, no), process and enter S15 in simulation time management department 11.On the other hand, when in simulation time management department 11 receives the free time, mark 15 changes for the notice of OFF from ON (S13 is), simulation time management department 11 is by current total simulation time T of SW model 26
sWbe made as the total simulation time T under the current time of HW model 31A, 31B
hW(S14).
Description of step S14.In idle running, owing to only carrying out HW model 31A, 31B (with reference to S25), so total simulation time T of SW model 26
sWbe not updated.Under this state, the only total simulation time T to HW model 31A, 31B
hWupgrade, cause obtaining synchronizeing of SW model 26 and HW model 31A, 31B.Therefore, as described above, use total simulation time T of HW model 31A, 31B
hW, make total simulation time T of SW model 26
sWthe setting of advancing.
At this, while not interrupting key element (S20, no), carry out task 21A, 21B or idle running 22 (S22) of SW model 26.While having the key element of interruption (S20 is), carry out interrupt handling routine 23 (S21).After step S21, step S22, process and turn back to step S1.
By the processing of distinguishing of step S16, when in the free time, mark 15 is ON (S16, no), scheduler 13 is distinguished at T
hWin whether have the HW model (S23) that should move.At this, in the time of the HW model that should not move (S23, no), scheduler 13 makes T
hWadvance (S24) till total simulation time of the HW model that moves as of late, afterwards, HW model is carried out to instruction (S25).And, at T
hWin while having the HW model that should move (S23 is), process and enter into step S25.
Fig. 4, in the action case shown in Fig. 5, is when more than 3 to be also same processing at model number.In addition, in the determination processing of step S18, which result of determination to give equal sign taking scheduler actual installation strategy as foundation to, no matter which kind of can.
In addition, the waitfor function shown in the first embodiment is the example that simulation time upgrades parts, is the function utilizing while having described HW model, SW model with the system level description language that SystemC, SpecC etc. have carried out expanding to C language.Therefore, upgrade parts for the simulation time in the first embodiment and be not limited to waitfor function.
Like this, simulation time being managed, is only to carry out HW model in the free time time at SW model, and useless circular treatment disappears thus, and the switching of executable unit is minimum.And, do not make playback accuracy deteriorated, and the time that can reproduce physical device through, regularly.
(the second embodiment)
In the equipment (physical device) of the object that simulator is simulated, there is driver software hardware to be carried out poll and come the equipment of the variation of the state of monitoring hardware.In the second embodiment, the simulator that the equipment to adopting such driver software is simulated is described.
Fig. 6 is the figure of an example of the structure of the simulator that illustrates that the second embodiment relates to.Simulator 1A has SW model 26A, and this SW model 26A has task 21A, task 21B, task dispatcher 24.In addition, simulator 1A has driver 27, and this driver 27 carries out poll to HW model 31A, 31B, and monitors the state variation of HW model 31A, 31B.In Fig. 6, due to identical with the first embodiment with the unit of Fig. 1 same-sign, so description thereof is omitted.
Fig. 7 is the figure that an example of the transformation of the emulated execution in the second embodiment is shown.In the moment that driver 27 finishes in the processing of HW model 31A, 31B, HW model is carried out to poll. HW model 31A, 31B carry out the processing of asking from driver 27 and the state notifying processing for the poll from driver 27.Simulator 1A, except processing at the last generation poll of processing, is the action same with the simulator 1 of the first embodiment.
(the 3rd embodiment)
In the 3rd embodiment, the situation of physical device without OS is described.When physical device comprises OS, the busy circular treatment of the idle running task of OS becomes the object that improves of high speed.In the 3rd embodiment, the example of realizing high speed at physical device during without OS is described.
In software without OS, when carrying out waiting for the elapsed time with outside timing adjustment, there is the situation of carrying out busy circulation.In the 3rd embodiment, carry out the simulating high-speed of this busy circular treatment.
The circular treatment of applying in embodiment need to be to the outer circular treatment of being free from side effects that circulates.In the time starting this circular treatment, the idle running of carrying out in the first embodiment starts notice.
When will extracting the source code of the circular treatment of being free from side effects circulating and inserting idle running beginning notifier processes, also can utilize the pretreater of program compiler among identifying object software.But, because the cyclic part as comparing long-time circulation is generally few, so can be also the method for from outside, simulator being indicated this part.
For example, the busy circulation of the idle running task of OS is that the situation of a part of identifying object software is more, certainly need not be by program Automatic Extraction.
(the 4th embodiment)
In the first embodiment, in the time for example digital dock being simulated, in simulator, carry out following processing.
1. wait for the elapsed time (idle running).
2. the time interrupts through there is later timer.
3. the renewal of the time showing under software control.
At this, the HW model (being timer in this example) that should not move in 1., so in the first embodiment, advances to by the time of HW model the time that HW model should move recently, and carries out immediately 2..In this case, clock is carried out to time renewal continuously.High-speed simulation can be realized by this action, and expected emulation can be realized.
In addition, on the other hand, in the time of analog calculator for example, be following processing: the key input (action in simulator outside (external world)) occurring arbitrarily becomes the part of taking charge, in the time having carried out key input, calculate and show result.At this, when under to the state that there is no key input, power supply is simulated with regard to the counter of closing during through certain hour, even in the example of the first embodiment power connection also immediately power supply be closed, so cannot expect desired emulation.
In the simulator of the 4th embodiment, in the time that SW model becomes idling conditions, if there is the HW model that should move, do not carry out the busy circular treatment of SW model, but only carry out HW model until there is the interruption from HW model next time.Thus, can not use for useless busy circular treatment the resource of principal computer, and emulated execution high speed.
An example of the functional block of the simulator that shown in Fig. 8, the 4th embodiment relates to.In addition, simulator 1B is the computing machine that possesses the hardware resource of Nonvolatile memory devices such as CPU, main storage means and hard disk drive or flash memory etc.
The difference of the 4th embodiment and the first embodiment is mainly to comprise extraneous model 40 and extraneous model communication control unit 14 and equipment 50.In Fig. 8, identical with the first embodiment with the unit of Fig. 1 same-sign.
Simulator 1B has simulation engine 10B, SW model enforcement division 20B, HW model enforcement division 30B, extraneous model 40.These each functional blocks are that the program being installed in advance in Nonvolatile memory devices is loaded into main storage means and carries out computing by CPU and carry out to realize.
SW model enforcement division 20B and HW model enforcement division 30B move under the control of simulation engine 10B, and on the other hand, independently, 10B moves side by side with simulation engine for extraneous model 40 and simulation engine 10B.Extraneous model 40 carries out interactive communication via the extraneous model communication control unit 14 of simulation engine 10B with HW model.
Extraneous model 40 be with simulator 1B inner is connected or the equipment 50 of outside connection (for example, CPU board, touch-screen, display, keyboard, mouse, camera, hard disk, USB connect memory storage etc.) carry out input and output, and the program communicating with simulation engine 10B.Extraneous model 40 is by the directly actuated program module of the CPU on principal computer.
Extraneous model communication control unit 14 is to two-way between HW model 31A, 31B and extraneous model 40 or program module that one-way communication is controlled.
If send to extraneous model communication control unit 14 notification datas the request receiving from extraneous model 40, the data that extraneous model communication control unit 14 is carried out HW model 31A or 31B to scheduler 13B instruction send reception & disposal.Scheduler 13B does not rely on the scheduling time information that simulation time management department 11 has, and carries out the data transmission reception & disposal of HW model 31A or 31B.Thus, the establishment of communicating by letter of HW model and extraneous model 40.
In the time sending from HW model 31A or 31B to extraneous model communication control unit 14 notification datas the request receiving, extraneous model communication control unit 14 carries out data communication with extraneous model 40 by communication between routine processes.Thus, the communication process of HW model and extraneous model 40 is set up.
Then, with reference to the action of the flowchart text simulator 1B of Fig. 9.Fig. 9 is the process flow diagram corresponding with Fig. 5 of explanation in the first embodiment.Each processing shown in simulator 1B execution graph 4, afterwards, each processing of execution graph 9.Simulator 1B, after each processing of carrying out Fig. 9, turns back to the processing shown in Fig. 4.In addition, due to identical with the first embodiment with the processing of the process flow diagram same-sign of Fig. 4, Fig. 5, so step different from the first embodiment is mainly described at this.
At this, in the time having the HW model that should move (S23 is), scheduler 13B makes HW model carry out (S25), processes and turns back to step S4.In the time of the HW model that should not move (S23, no), mark 15 in the free time is reset to OFF (S24A) by scheduler 13B, continues common dispatch deal (entering S17).In the first embodiment, do not judge that the HW model that should move is recently at simulation time T
hWin whether should move, the HW model action that just makes should to move recently, if or at simulation time T
hWin the HW model that should not move, by T
hWadvancing to the time that nearest HW model should move carries out HW model.This processing is different from the 4th embodiment.The HW model that should not move means does not have the HW of executable state model.
Not comprising in the simulator of extraneous model, when SW model is carried out idle running in order to wait for from the interruption of HW model, the HW model that certain existence should be moved recently.If there is no, the idle running of SW model is disengaged never.Simulator this means in HW model or SW model and implies and have defect, so in the time not there is not the HW model that should move recently, also can be judged as the defects detection of identifying object SW model, HW model, thereby stops emulation.
On the other hand, in the simulator that comprises extraneous model, in the time that SW model is carried out idle running in order to wait for from the interruption of HW model, even if there is not the HW model of executable state in this moment, the time through after also can occur from the communication of extraneous model and HW model becomes executable state.Therefore, need to proceed emulated execution.
According to the 4th embodiment, in the time that SW model is carried out idle running in order to wait for from the interruption of HW model, if the HW model that should not move, can make the busy circular treatment of idle running through waiting for that HW model occurs becomes the event of executable state on one side with the emulation unit interval on one side.In addition, in the time there is the HW model that should move, by only making HW model carry out, useless circular treatment disappears thus, and then the switching of executable unit is minimum.In addition, do not make precision deteriorated, the time that just can reproduce physical device through, regularly.
When target processor is while supporting the processor of idle pulley (also can be called sleep pattern), OS not by the idle running circulation of doing, but switches to idle pulley by processor in the time transferring to idling conditions.The processor that becomes idle pulley receives while interrupting from hardware, switches to normal mode.
Embodiment also goes for the situation of target processor support idle pulley, can make emulated execution performance high speed.Replace processor is switched to idle pulley, can realize through the time till interrupting from HW model next time by the simulation time that makes SW model.
As described above, following simulator 1 is disclosed in the first embodiment: in the time that identifying object carries out the processing of hardware and the processing of software, by identifying object is carried out to these processing, the information of institute's elapsed time is that simulation time manages, and reproduces the execution timing of each processing of identifying object.Simulator 1 has: HW model enforcement division 30, carry out hardware model, and this hardware model is simulated the processing that is installed on the hardware in identifying object, and this hardware model is for the simulation time of each processing notice process due to the processing of hardware model; SW model enforcement division 20, executive software model, this software model is simulated the processing that is installed on the software in identifying object, and this software model is for the simulation time of each processing notice process due to the processing of software model.
In addition, the simulator 1 of the first embodiment has: simulation time management department 11, total elapsed time of the simulation time to hardware model is to be that the second simulation time is stored in total elapsed time of the simulation time of the first simulation time and software model, and obtain the simulation time that hardware model is notified, make the first simulation time pass through obtained simulation time, obtain the simulation time that software model is notified, make the second simulation time pass through obtained simulation time; Scheduler 13, compares the first simulation time and the second simulation time, and in the time that the first simulation time is longer than the second simulation time, executive software model, in the time that the second simulation time is longer than the first simulation time, carries out hardware model; And interrupt emulate management department 12, the current information that whether has the interrupt notification from hardware model to software model is stored.
In addition, the scheduler 13 of the first embodiment has or not interrupt notification to 12 inquiries of interrupt emulate management department, in the time having interrupt notification, and the interrupt handling routine of executive software model, in the time there is no interrupt notification, the task of executive software model.
In addition, in the first embodiment disclosed simulator 1 in the time that software model is waited for from the interruption of hardware model (, processing from from the "Yes" of step S1 to step S2), replace the idle running of executive software model and only make hardware model carry out until there is the interruption from hardware model.,, in step S16, if mark 15 is ON in the free time, only carry out HW model, and, there is to interrupt key element from the "Yes" of step S4 to the processing of step S5, afterwards until in the free time mark 15 become OFF, do not carry out SW model (=idle running), and only carry out HW model.
In addition, simulator 1 (, the processing that step S4 is "Yes") in the time having there is interruption from hardware model, advances to above-mentioned the first simulation time by above-mentioned the second simulation time., the processing of execution step S14.
In the 4th embodiment, disclosed simulator 1B carries out input and output with the equipment that is connected in simulator 1B, and carries out and the program of communicating by letter of simulation engine, has: extraneous model 40, directly moves by the CPU of simulator 1B; Extraneous model communication control unit 14, controls two-way or unidirectional the communicating by letter between hardware model and extraneous model 40.
In addition, in the 4th embodiment disclosed simulator 1B in the time that software model is waited for from the interruption of hardware model (, processing from the "Yes" of step S1 to step S2), if have movable hardware model (, step S23 is "Yes"), replace the idle running of executive software model and only make movable hardware model carry out until there is the interruption from hardware model.,, in the situation that step S23 is "Yes", only carry out HW model.
In addition, in the 4th embodiment in disclosed simulator 1B, if there is no movable hardware model, carry out idle running until hardware model becomes can move.,, in the situation that step S23 is "No", carry out SW model (idle running 22).When idle running 22 execution continues, in step S24A, be temporarily reset to mark 15 in free time of OFF and again in step S2, become ON.
In the 4th embodiment in disclosed simulator 1B, if hardware model becomes and can move (being that step S23 is "Yes"), replace the idle running of executive software model and only make movable hardware model carry out (, the processing of step S25), in the time having there is interruption from hardware model (, step S4 is "Yes"), the second simulation time is advanced to the first simulation time (, the processing of execution step S14).
In addition, can provide the simulated program of being carried out the each action shown in process flow diagram, the step illustrating in the above-described embodiment by computing machine.This program is recorded in the medium that can be read by computing machine, movable-type storage medium, the databases such as such as CD-ROM, floppy disk, DVD dish, photomagneto disk, IC-card, and carried out by computing machine.
According to embodiment described above, useless circular treatment disappears, and the switching of executable unit is minimum.Therefore, can make the time shorten carried out in simulator, the time of deteriorated physical device just can not realized the high speed of emulation through the playback accuracy of, timing.
Some embodiments of the present invention are illustrated, but these embodiments are prompted as an example, are not intended for limiting scope of invention.These new embodiments can be implemented in other various modes, in the scope of purport that does not depart from invention, can carry out various omissions, displacement, change.These embodiments and distortion thereof are included in scope of invention, purport, and are included in the invention and its equivalency range of recording in claims.
Claims (5)
1. a simulator, in the time that identifying object carries out the processing of hardware and the processing of software, by simulation time being managed to the execution timing of each processing of reproducing described identifying object, described simulation time is carried out these and processes the information of institute elapsed times for described identifying object, this simulator is characterised in that, comprising:
Hardware model enforcement division, carries out hardware model, and this hardware model is simulated the processing of the hardware that is installed on identifying object, and notifies the simulation time of the process due to the processing of this hardware model for each processing;
Software model enforcement division, executive software model, this software model is simulated the processing of the software that is installed on described identifying object, and notifies the simulation time of the process due to the processing of this software model for each processing;
Simulation time management department, store the first simulation time and the second simulation time, and obtain the simulation time of being notified by described hardware model, make described the first simulation time pass through obtained simulation time, obtain the simulation time of being notified by described software model, make described the second simulation time pass through obtained simulation time, total elapsed time of the simulation time that described the first simulation time is hardware model, total elapsed time of the simulation time that described the second simulation time is software model;
Carry out instruction unit; more described the first simulation time and described the second simulation time, in the time that described the first simulation time is longer than described the second simulation time, carry out described software model; in the time that described the second simulation time is longer than described the first simulation time, carry out described hardware model; And
Interrupt management portion, stores the current information that whether has the interrupt notification from described hardware model to described software model,
Described execution instruction unit has or not interrupt notification to the inquiry of described interrupt management portion, in the time having interrupt notification, carry out the interrupt handling routine of described software model, in the time there is no interrupt notification, carry out the task of described software model, in the time that software model is waited for from the interruption of hardware model, replace the idle running of executive software model and only carry out hardware model until there is the interruption from hardware model, in the time having there is interruption from hardware model, make described the second simulation time advance to described the first simulation time, the simulation time while shortening idling conditions.
2. simulator according to claim 1, is characterized in that,
In the time that described software model is waited for the interruption from hardware model, if the hardware model that should not move in first simulation time in its moment makes hardware model action after further making the first simulation time advance to the time that nearest hardware model should move.
3. an emulation mode, carry out simulation process, in this simulation process, in the time that identifying object carries out the processing of hardware and the processing of software, reproduce the execution timing of each processing of described identifying object by management simulation time, described simulation time is the information that described identifying object is carried out these processing institute elapsed times, wherein, and described emulation mode:
Carry out hardware model, this hardware model is simulated the processing of the hardware that is installed on identifying object, and this hardware model is for the simulation time of each processing notice process due to the processing of this hardware model,
Executive software model, this software model is simulated the processing of the software that is installed on described identifying object, and this software model is notified the simulation time of the process due to the processing of this software model for each processing,
Store the first simulation time and the second simulation time into memory storage, and obtain the simulation time of being notified by described hardware model, make described the first simulation time pass through obtained simulation time, obtain the simulation time of being notified by described software model, make described the second simulation time pass through obtained simulation time, total elapsed time of the simulation time that described the first simulation time is hardware model, total elapsed time of the simulation time that described the second simulation time is software model
More described the first simulation time and described the second simulation time, in the time that described the first simulation time is longer than described the second simulation time, carry out described software model, in the time that described the second simulation time is longer than described the first simulation time, carries out described hardware model,
And then, in the time carrying out described software model, interrupt management portion inquiry to the current information that whether has the interrupt notification from described hardware model to described software model of storage has or not interrupt notification, in the time having interrupt notification, carry out the interrupt handling routine of described software model, in the time there is no interrupt notification, carry out the task of described software model
In the time that software model is waited for from the interruption of hardware model, replace the idle running of executive software model and only carry out hardware model until there is the interruption from hardware model, in the time having there is interruption from hardware model, make described the second simulation time advance to described the first simulation time, the simulation time while shortening idling conditions.
4. emulation mode according to claim 3, is characterized in that,
In the time that described software model is waited for the interruption from hardware model, if the hardware model that should not move makes hardware model action after further making the first simulation time advance to the time that hardware model should move.
5. a simulator, in the time that identifying object carries out the processing of hardware and the processing of software, by simulation time being managed to the execution timing of each processing of reproducing described identifying object, described simulation time is carried out these and processes the information of institute elapsed times for described identifying object, this simulator is characterised in that, comprising:
Hardware model enforcement division, carries out hardware model, and this hardware model is simulated the processing of the hardware that is installed on identifying object, for the simulation time of each processing notice process due to the processing of this hardware model;
Software model enforcement division, executive software model, this software model is simulated the processing of the software that is installed on described identifying object, for the simulation time of each processing notice process due to the processing of this software model;
Simulation time management department, store the first simulation time and the second simulation time, and obtain the simulation time of being notified by described hardware model, make described the first simulation time pass through obtained simulation time, obtain the simulation time of being notified by described software model, make described the second simulation time pass through obtained simulation time, total elapsed time of the simulation time that described the first simulation time is hardware model, total elapsed time of the simulation time that described the second simulation time is software model;
Carry out instruction unit; more described the first simulation time and described the second simulation time, in the time that described the first simulation time is longer than described the second simulation time, carry out described software model; in the time that described the second simulation time is longer than described the first simulation time, carry out described hardware model;
Interrupt management portion, stores the current information that whether has the interrupt notification from described hardware model to described software model;
Extraneous model, is to carry out input and output with the equipment that is connected in described simulator, and carries out and the module of communicating by letter of simulation engine, and this external world's model is by the CPU direct action of described simulator; And
Extraneous model communication control unit, controls two-way or unidirectional the communicating by letter between described hardware model and described extraneous model,
Described execution instruction unit has or not interrupt notification to the inquiry of described interrupt management portion, in the time having interrupt notification, carry out the interrupt handling routine of described software model, in the time there is no interrupt notification, carry out the task of described software model, in the time that software model is waited for from the interruption of hardware model, if there is the hardware model that can move, replace the idle running of executive software model and only carry out the hardware model that can move until there is the interruption from hardware model, if there is no the hardware model that can move, carry out idle running until hardware model becomes can move, if becoming, hardware model can move, replace the idle running of executive software model and only carry out the hardware model that can move, in the time having there is interruption from hardware model, make the second simulation time advance to the first simulation time, simulation time while shortening idling conditions.
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| JP2010132770A JP5450271B2 (en) | 2010-06-10 | 2010-06-10 | Simulation apparatus, simulation program and method |
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| US (1) | US8744831B2 (en) |
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| JP5625714B2 (en) * | 2010-10-07 | 2014-11-19 | 富士通セミコンダクター株式会社 | Simulation apparatus, program, storage medium, and method |
| WO2013179439A1 (en) * | 2012-05-31 | 2013-12-05 | 三菱電機株式会社 | Data processing device, data processing system, simulation method, and program |
| JP5985460B2 (en) | 2013-11-27 | 2016-09-06 | 京セラドキュメントソリューションズ株式会社 | Simulation system |
| JP6249827B2 (en) * | 2014-03-06 | 2017-12-20 | 三菱電機株式会社 | Simulation apparatus and simulation program |
| JP6496278B2 (en) * | 2016-06-27 | 2019-04-03 | ファナック株式会社 | Simulation system |
| JP6751231B2 (en) * | 2016-07-07 | 2020-09-02 | 富士通株式会社 | Job scheduler test program, job scheduler test method, and parallel processing device |
| KR102007881B1 (en) * | 2017-04-27 | 2019-08-06 | 국방과학연구소 | Method and system for fast and accurate cycle estimation through hybrid instruction set simulation |
| US10963036B2 (en) | 2018-04-16 | 2021-03-30 | Nxp Usa, Inc. | Idle loop detection and control for processors |
| CN114428722A (en) * | 2020-10-29 | 2022-05-03 | 上海阵量智能科技有限公司 | Hardware simulation method, device, equipment and storage medium |
| CN115292102B (en) * | 2022-05-20 | 2024-05-28 | 芯华章科技股份有限公司 | Simulation method, electronic device, and readable storage medium |
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| US8744831B2 (en) | 2014-06-03 |
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| JP2011258045A (en) | 2011-12-22 |
| US20110307236A1 (en) | 2011-12-15 |
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