CN102255621B - Radio frequency front end circuit for software radio transceiver - Google Patents
Radio frequency front end circuit for software radio transceiver Download PDFInfo
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Abstract
The invention discloses a radio frequency front end circuit of a software radio transceiver, which belongs to the technical field of wireless communication and has the following connection relation that a band-gap reference source circuit is respectively connected with a reconfigurable receiver radio frequency front end circuit and a reconfigurable transmitter radio frequency front end circuit; and a four-line serial synchronous interface circuit is respectively connected with the reconfigurable receiver radio frequency front end circuit, the reconfigurable transmitter radio frequency front end circuit and the band-gap reference source circuit. The radio frequency front end circuit of the software radio transceiver has the beneficial effects that: 1, the radio frequency front end circuit of the software radio transceiver supports a time division duplex (TDD) working mode and a frequency division duplex (FDD) working mode and has flexible configurability, the performance of the radio frequency front end circuit of the transceiver can be configured by the four-line serial synchronous interface circuit, and the requirements of different communication standards are met; 2, the performance indexes can be flexibly configured and the average power consumption of the completed transceiver is effectively reduced; and 3, a great amount of calibration circuits are integrated, so that thetransceiver meets the requirements of the communication standard.
Description
Technical field
The invention belongs to wireless communication technology field, particularly a kind of radio frequency front end circuit for software radio transceiver.
Background technology
In information age today, people are with the transmission of information with alternately as the necessary component of social life.Wherein, radio communication is a part the most active in the communications field, all is widely used in all fields.In order to satisfy consumer's different demands, international telecommunication unit's different communication standard that released one after another.In the face of miscellaneous standard, the consumer more wishes only just can support different communication services by an electronic equipment.
Software radio (SDR) technology is the wireless communication system architecture that proposed in recent years, the earliest by the military communication technical development, its basic thought is to come configure hardware by software, realize flexibly restructural characteristic, one of key technology difficult point wherein is exactly the Transceiver RF Front-End circuit.
The effect of software radio transceiver is to satisfy the operating state that radio frequency transceiver is configured to any pattern existing and be about to the distinct communication standards requirement that occurs.These communication standards mainly comprise cellular communications system (2G-2.5G-3G etc.), wireless lan communication system (802.11a/b/g/n etc.), wireless personal local area network communication system (Bluetooth, Zigbee etc.), broadcast communication system (DAB, DVB, DMB etc.) and navigation communication system (GPS, Galileo, GLONASS, the Big Dipper) etc.Obviously, each communication standard has different separately centre frequencies, channel width, noise objective, linearity index, transmitting power etc.Therefore radio frequency front end circuit for software radio transceiver must have the configurability of great dynamic range simultaneously, satisfies again the performance index requirement of distinct communication standards.
In addition, software radio transceiver not only has flexibly restructural characteristics, and it also has very large potentiality in the low-power consumption application.Traditional wireless communication transceiver need to satisfy the harshest requirement of communication system when design, therefore will inevitably pay the cost of power consumption.The indexs such as the linearity, filtering performance, noiseproof feature, bandwidth and gain such as the Transceiver RF Front-End circuit all exist trade-off relation with power consumption.And software radio transceiver can dispose its performance index neatly according to its different applied environment, under the requirement of satisfying the practical communication index, reduces the average power consumption of whole transceiver.
At present domestic only have a few patents achievement to occur, software radio OFDM transceiver (such as Chinese publication number CN1964339A) has comprised radio-frequency (RF) front-end circuit and base band control system, but only can support the communication standard of OFDM, although possessed the restructural characteristics of software radio, do not possessed the ability of compatible distinct communication standards; Multiple carrier software radio transceiver (such as Chinese publication number CN1175609C) has proposed the calibration steps of many standard transceivers radio-frequency front-end and baseband circuit and smart antenna, can support GSM, several mobile communication standards of CDMA and WCDMA, do not support other communication service type, lack the calibration function of transceiver i/q signal, DC maladjustment and IIP2; Many standard softwares radio baseband algorithm (such as Chinese publication number CN1275480C) proposes the wireless baseband processing method of a kind of many standard softwares, adopt the structure control baseband hardware platform of software database, can satisfy software wireless transceiver Base-Band Processing.
Summing up the present Research of domestic software wireless set can find, breaks through although the base band algorithm has been obtained some at present, and radio-frequency (RF) front-end circuit still is the design bottleneck of transceiver.The configurable Transceiver RF Front-End circuit of some many standards occurs at present, but only can realize that part is configurable, supported the part communication standard, lacked simultaneously necessary calibration function.
Summary of the invention
The present invention is directed to defects and disclose a kind of radio frequency front end circuit for software radio transceiver.Its annexation is as follows: band-gap reference source circuit is connected with restructural transmitter radio-frequency (RF) front-end circuit with restructural receiver radio frequency front-end circuit respectively, and 4 line serial synchronous interface circuits are connected with band-gap reference source circuit with restructural receiver radio frequency front-end circuit, restructural transmitter radio-frequency (RF) front-end circuit respectively.
Described restructural receiver radio frequency front-end circuit is made of configurable low noise amplifier, configurable low-converter, the first configurable low pass filter, the first variable-gain amplification circuit and output driving circuit series connection; Restructural receiver radio frequency front-end circuit comprises I, Q two passages with same structure;
Configurable low noise amplifier amplifies after radiofrequency signal is received, then send into configurable low-converter radiofrequency signal is carried out down-conversion, then i/q signal is sent into successively the first configurable low pass filter and the first variable-gain amplification circuit and carried out filtering and amplify processing, last output driving circuit is sent i/q signal into external baseband signal processor.
Described restructural transmitter radio-frequency (RF) front-end circuit is comprised of emission owner's branch road and transmitter time branch road;
Configurable Pre-power amplifier connects the common node of the first upconverter and the second upconverter, and the second configurable low pass filter connects the 3rd configurable low pass filter;
Described emission owner branch road is made of the second configurable low pass filter, the second variable-gain amplification circuit, gain buffer, the first upconverter and the series connection of configurable Pre-power amplifier; Baseband signal is undertaken sending into the second variable-gain amplification circuit after filtering is processed by the second configurable low pass filter and is amplified processing, gain buffer is in the input load that drives the first upconverter, signal after processing is sent into the first upconverter carry out up-conversion, last configurable Pre-power amplifier is sent into antenna transmission after radiofrequency signal is amplified;
Described transmitter time route the 3rd a configurable low pass filter, the second upconverter and the series connection of configurable Pre-power amplifier consist of; Baseband signal is undertaken sending into the second upconverter after filtering is processed by the 3rd configurable low pass filter and is carried out up-conversion, then sends into and sends into antenna transmission after configurable Pre-power amplifier amplifies radiofrequency signal.
Described 4 line serial synchronous interface circuits pass through interface: SDI, SDO, SCLK and SCS are connected with the baseband controller of outside, the mode of operation of the inner modules circuit of control chip.
Described band-gap reference source circuit produces reference voltage and reference current simultaneously.
The working frequency range of described configurable low noise amplifier is 100MHz-6GHz, and its gain is switched between 20dB, 10dB and 0dB;
The annexation of described configurable low-converter is as follows: trsanscondutance amplifier connects the common node of two passive frequency mixers, second order input section calibration circuit, passive frequency mixer and trans-impedance amplifier are cascaded, the DC maladjustment calibration circuit is connected in parallel between passive frequency mixer and the trans-impedance amplifier, and 25% duty ratio squarer connects respectively two passive frequency mixers;
Trsanscondutance amplifier is converted into electric current with radiofrequency signal, be down-converted to electric current of intermediate frequency through passive frequency mixer, by trans-impedance amplifier electric current is converted into voltage again, the difference local oscillation signal produces the signal that drives passive frequency mixer by 25% duty ratio square-wave signal generator, passive frequency mixer improves its second order input section performance by second order input section calibration circuit, and the DC maladjustment calibration circuit is used for eliminating the DC maladjustment component of I/Q two-way;
The described first configurable low pass filter can switch between three rank and five rank, and the 1dB band width configuration is 5MHz, 10MHz, 20MHz, 30MHz, 40MHz or 50MHz; In addition, the first configurable low pass filter has zero offset capability on the sheet;
The annexation of described the first variable-gain amplification circuit is as follows: the first partiting dc circuit, first order variable gain amplifier, the second partiting dc circuit and the series connection of second level variable gain amplifier, and the DC maladjustment compensating circuit is in parallel with second level variable gain amplifier;
The first partiting dc circuit is sent into first order variable gain amplifier after the DC maladjustment of prime is eliminated, send into second level variable gain amplifier after then eliminating DC component by the second partiting dc circuit, the DC maladjustment amount of this grade introducing is offset by the input that the DC maladjustment compensating circuit feeds back to second level variable gain amplifier again;
Described output driving circuit is comprised of I path, Q channel and 4 adjustable resistances; Wherein the I path annexation as follows: two adjustable resistors of the input of differential operational amplifier access, be parallel with two fixed resistances between the input of differential operational amplifier and output, the circuit structure of Q channel is identical with the I path, at two adjustable resistances of right-hand member access of the adjustable resistor of the left end of the adjustable resistor of I path and Q channel, at two adjustable resistances of left end access of the adjustable resistor of the right-hand member of the adjustable resistor of I path and Q channel; Adjustable resistor is realized the amplitude calibration of i/q signal with fixed resistance, and adjustable resistance is realized the phase alignment of i/q signal with fixed resistance; Wherein, the scope of amplitude calibration is ± 3dB that stepping is 0.2dB; The scope of phase alignment is ± 6 °, and stepping is 0.2 °.
Described trsanscondutance amplifier realizes that by array switch 7 grades of transconductance value are configurable, and trans-impedance amplifier realizes that by array switch bandwidth and transimpedance gain 15 grades are configurable;
Described first order variable gain amplifier and second level variable gain amplifier provide the gain of 34dB together, and both variation steppings are 2dB;
Described the first partiting dc circuit and the second partiting dc circuit high pass by frequency all at 5KHz, 10KHz, 20KHz, 30KHz switches between 40KHz and the 1MHz.
The described second configurable low pass filter is 3 stage structures, and its 1dB band width configuration is 5MHz, 10MHz, 20MHz, 30MHz, 40MHz or 50MHz.In addition, configurable low pass filter has zero offset capability on the sheet, and the second configurable low pass filter has added the circuit structure identical with the DC maladjustment calibration circuit;
The gain of described the second variable-gain amplification circuit is between 0-30dB, and its stepping is 2dB, and the employing i/q signal calibration circuit structure identical with output driving circuit;
The circuit structure that described the first upconverter employing is identical with 25% duty ratio square-wave signal generator with passive frequency mixer.
The operating frequency of described configurable Pre-power amplifier is 100MHz-6GHz, and its gain is regulated between-20dB-8dB;
The described the 3rd configurable low pass filter has three rank filtering characteristics, and its 1dB bandwidth can be configured to 5MHz, 10MHz, 20MHz, 30MHz, 40MHz or 50MHz;
Described the second upconverter is identical with the circuit structure of the first upconverter.
Beneficial effect of the present invention is:
1) radio frequency front end circuit for software radio transceiver disclosed by the invention adopts Direct-conversion and Direct conversion system architecture, its Receiver And Transmitter adopts respectively independently outside intrinsic signals source, can support the mode of operation of time division multiplexing (TDD) and frequency division multiplexing (FDD), the radiofrequency signal centre frequency covers 100MHz-6GHz, bandwidth is supported 5MHz, 10MHz, 20MHz, 30MHz, 40MHz and 50MHz, be applicable to LTE, GSM, WiMAX, DVB-H/T, the various wireless communication standards such as WLAN.Have flexibly configurability, can dispose the Transceiver RF Front-End circuit performance by 4 line serial synchronous interface circuits, satisfy the requirement of distinct communication standards.
2) radio frequency front end circuit for software radio transceiver disclosed by the invention satisfies the application of low-power consumption, can dispose neatly performance index according to different applied environments, under the requirement of satisfying the practical communication index, reduces the average power consumption of whole transceiver.
3) radio frequency front end circuit for software radio transceiver disclosed by the invention is integrated a large amount of calibration circuits comprise that IIP2 calibration circuit, i/q signal amplitude/phase mismatch calibration circuit and DC maladjustment eliminate circuit, make transceiver satisfy the requirement of communication standard.
Description of drawings
Fig. 1: circuit structure diagram of the present invention;
Fig. 2: time division multiplexing of the present invention (TDD) embodiment schematic diagram;
Fig. 3: frequency division multiplexing of the present invention (FDD) embodiment schematic diagram;
Fig. 4: configurable down-converter circuit structure chart;
Fig. 5: the first variable-gain amplification circuit structure chart;
Fig. 6: output driving circuit structure chart.
Embodiment
The invention will be further described below in conjunction with accompanying drawing:
As shown in Figure 1, a kind of annexation of radio frequency front end circuit for software radio transceiver is as follows: band-gap reference source circuit 310 is connected with restructural transmitter radio-frequency (RF) front-end circuit with restructural receiver radio frequency front-end circuit respectively, and 4 line serial synchronous interface circuits 320 are connected with band-gap reference source circuit with restructural receiver radio frequency front-end circuit, restructural transmitter radio-frequency (RF) front-end circuit respectively and are connected.
Restructural receiver radio frequency front-end circuit is made of configurable low noise amplifier 110, configurable low-converter 120, the first configurable low pass filter 130, the first variable-gain amplification circuit 140 and output driving circuit 150 series connection; Restructural receiver radio frequency front-end circuit comprises I, Q two passages with same structure;
Configurable low noise amplifier 110 amplifies after radiofrequency signal is received, then send into configurable low-converter 120 radiofrequency signal is carried out down-conversion, then i/q signal is sent into successively the first configurable low pass filter 130 and the first variable-gain amplification circuit 140 and carried out filtering and amplify processing, last output driving circuit 150 is sent i/q signal into external baseband signal processor.
The working frequency range of configurable low noise amplifier 110 is 100MHz-6GHz, and its gain is regulated between 20dB, 10dB and 0dB, guarantees that configurable low noise amplifier 110 can satisfy the receiver performance index under different reception environments.
Restructural transmitter radio-frequency (RF) front-end circuit is comprised of the transmitter time branch road of the emission owner branch road with active if architectures and passive if architectures; When the large dynamic gain scope of needs situation, adopt emission owner branch road, when needs high linearity situation, adopt transmitter time branch road.
Configurable Pre-power amplifier 250 connects the common node of the first upconverter 240 and the second upconverter 270, and the second configurable low pass filter 210 connects the 3rd configurable low pass filter 260;
Emission owner branch road is made of the second configurable low pass filter 210, the second variable-gain amplification circuit 220, gain buffer 230, the first upconverter 240 and 250 series connection of configurable Pre-power amplifier; Baseband signal is undertaken sending into the second variable-gain amplification circuit 220 after filtering is processed by the second configurable low pass filter 210 and is amplified processing, gain buffer 230 drives the input load of the first upconverter 240 on the one hand, avoids reducing owing to this load is excessive the performance of the second variable-gain amplification circuit 220; Signal after will processing is on the other hand sent into the first upconverter 240 and is carried out up-conversion, and last configurable Pre-power amplifier 250 is sent into antenna transmission after radiofrequency signal is amplified;
Transmitter time route the 3rd a configurable low pass filter 260, the second upconverter 270 and 250 series connection of configurable Pre-power amplifier consist of; Baseband signal is undertaken sending into the second upconverter 270 after filtering is processed by the 3rd configurable low pass filter 260 and is carried out up-conversion, then sends into and sends into antenna transmission after configurable Pre-power amplifier 250 amplifies radiofrequency signal.
The second configurable low pass filter 210 is 3 stage structures, and its 1dB band width configuration is 5MHz, 10MHz, 20MHz, 30MHz, 40MHz or 50MHz.In addition, configurable low pass filter 210 has zero offset capability on the sheet, and the center frequency point that can cause for the factor such as temperature and process deviation in the practical application and the variation of bandwidth are calibrated, and improve its reliability.For the DC maladjustment of calibration transmitter master branch road, the second configurable low pass filter 210 has added the circuit structure identical with DC maladjustment calibration circuit 126;
The gain of the second variable-gain amplification circuit 220 is between 0-30dB, and its stepping is 2dB, for amplitude difference and the phase difference of calibrating i/q signal, adopts the i/q signal calibration circuit structure identical with output driving circuit 150;
The first upconverter 240 adopts the circuit structure identical with 25% duty ratio square-wave signal generator 124 with passive frequency mixer 122;
The operating frequency of configurable Pre-power amplifier 250 is 100MHz-6GHz, and its gain is regulated between-20dB-8dB;
The 3rd configurable low pass filter 260 has three rank filtering characteristics, and its 1dB bandwidth can be configured to 5MHz, 10MHz, 20MHz, 30MHz, 40MHz or 50MHz;
The second upconverter 270 is identical with the circuit structure of the first upconverter 240.
4 line serial synchronous interface circuits 320 pass through interface: SDI, SDO, SCLK and SCS are connected with the baseband controller of outside, the mode of operation of the inner modules circuit of control chip.
Band-gap reference source circuit 310 produces reference voltage and reference current simultaneously, can suppress because the deviation that the factors such as temperature, supply voltage and process corner fluctuation cause, for radio frequency front end circuit for software radio transceiver provides fiducial reference source.
As shown in Figure 4, the annexation of configurable low-converter 120 is as follows: trsanscondutance amplifier 121 connects the common node of two passive frequency mixers 122, second order input section calibration circuit 125, passive frequency mixer 122 and trans-impedance amplifier 123 are cascaded, DC maladjustment calibration circuit 126 is connected in parallel between passive frequency mixer 122 and the trans- impedance amplifier 123, and 25% duty ratio squarer 124 connects respectively two passive frequency mixers 122.
The first configurable low pass filter 130 can switch between three rank and five rank, and the 1dB band width configuration is 5MHz, 10MHz, 20MHz, 30MHz, 40MHz or 50MHz; In addition, the first configurable low pass filter 130 has zero offset capability on the sheet, and the center frequency point that can cause for the factor such as temperature and process deviation in the practical application and the variation of bandwidth are calibrated, and improve its reliability.
As shown in Figure 5, the annexation of the first variable-gain amplification circuit 140 is as follows: the first partiting dc circuit 141, first order variable gain amplifier 142, the second partiting dc circuit 143 and 144 series connection of second level variable gain amplifier, and DC maladjustment compensating circuit 145 is in parallel with second level variable gain amplifier 144;
The first partiting dc circuit 141 is sent into first order variable gain amplifier 142 after the DC maladjustment of prime is eliminated, send into second level variable gain amplifier 144 after then eliminating DC component by the second partiting dc circuit 143, the DC maladjustment amount of this grade introducing is offset by the input that DC maladjustment compensating circuit 145 feeds back to second level variable gain amplifier 144 again; First order variable gain amplifier 142 and second level variable gain amplifier 144 provide the gain of 34dB together, and both variation steppings are 2dB; The first partiting dc circuit 141 and the second partiting dc circuit 143 high passes by frequency all at 5KHz, 10KHz, 20KHz, 30KHz switches between 40KHz and the 1MHz.
As shown in Figure 6, output driving circuit 150 is comprised of I path, Q channel and 4 adjustable resistances 152; Wherein the I path annexation as follows: two adjustable resistors 151 of the input of differential operational amplifier 154 access, be parallel with two fixed resistances 153 between the input of differential operational amplifier 154 and output, the circuit structure of Q channel is identical with the I path, at two adjustable resistances 152 of right-hand member access of the adjustable resistor 151 of the left end of the adjustable resistor 151 of I path and Q channel, at two adjustable resistances 152 of left end access of the adjustable resistor 151 of the right-hand member of the adjustable resistor 151 of I path and Q channel; The bandwidth 150 of output driving circuit is flexible configuration as required, and adjustable resistor 151 is realized the amplitude calibration of i/q signal with fixed resistance 153, and adjustable resistance 152 is realized the phase alignment of i/q signal with fixed resistance 153; Wherein, the scope of amplitude calibration is ± 3dB that stepping is 0.2dB; The scope of phase alignment is ± 6 °, and stepping is 0.2 °.
As shown in Figure 2, first embodiment of radio frequency front end circuit for software radio transceiver disclosed by the invention is the mode of operation of time division multiplexing (TDD), receives signal and transmits in different time sections work, realizes switching by duplexer 410.When operation of receiver, antenna reception to radiofrequency signal send into the reception path by duplexer 410, through sending into radio frequency front end circuit for software radio transceiver behind the outer high reject signal of radio frequency band filter 420 filtering bands, the intrinsic signals that the first external frequency synthesizer 440 is sent into is sent into the first external analog to digital converter 470 through filtering with after amplify processing after with the radiofrequency signal down-conversion, and the quantification digital signal of its output is finally sent into base band and processed.When transmitter is worked, base band is transformed to analog signal with digital signal by the first digital to analog converter 480 and sends into radio frequency front end circuit for software radio transceiver, the local oscillation signal that the second external frequency synthesizer 450 is sent into will be through the baseband signal up-conversion after filtering and the amplification processing, again by going out by antenna transmission behind the first isolator 430 and the duplexer 410.
As shown in Figure 3, the mode of operation that second embodiment of radio frequency front end circuit for software radio transceiver disclosed by the invention is frequency division multiplexing (FDD) receives signal and works in different frequencies with transmitting, and isolates by duplexer 510.When receiving signal, antenna reception to radiofrequency signal send into radio frequency front end circuit for software radio transceiver by duplexer 510, the intrinsic signals that the 3rd external frequency synthesizer 530 is sent into is sent into the second external analog to digital converter 560 through filtering with after amplify processing after with the radiofrequency signal down-conversion, and the quantification digital signal of its output is finally sent into base band and processed.When transmitting, base band is transformed to analog signal with digital signal by the second digital to analog converter 570 and sends into radio frequency front end circuit for software radio transceiver, the puts local oscillation signal that frequency synthesizer 540 sends into all round will and amplify baseband signal up-conversion after processing through filtering, again by going out by antenna transmission behind the second isolator 520 and the duplexer 510.
Claims (6)
1. radio frequency front end circuit for software radio transceiver, it is characterized in that, its annexation is as follows: band-gap reference source circuit (310) is connected with restructural transmitter radio-frequency (RF) front-end circuit with restructural receiver radio frequency front-end circuit respectively, and 4 line serial synchronous interface circuits (320) are connected 310 with restructural receiver radio frequency front-end circuit, restructural transmitter radio-frequency (RF) front-end circuit with band-gap reference source circuit respectively) be connected;
Described restructural receiver radio frequency front-end circuit is made of configurable low noise amplifier (110), configurable low-converter (120), the first configurable low pass filter (130), the first variable-gain amplification circuit (140) and output driving circuit (150) series connection; Restructural receiver radio frequency front-end circuit comprises I, Q two passages with same structure;
Configurable low noise amplifier (110) amplifies after radiofrequency signal is received, then send into configurable low-converter (120) radiofrequency signal is carried out down-conversion, then i/q signal is sent into successively the first configurable low pass filter (130) and the first variable-gain amplification circuit (140) and carried out filtering and amplify processing, last output driving circuit (150) is sent i/q signal into external baseband signal processor;
Described restructural transmitter radio-frequency (RF) front-end circuit is comprised of emission owner's branch road and transmitter time branch road;
Configurable Pre-power amplifier (250) connects the common node of the first upconverter (240) and the second upconverter (270), and the second configurable low pass filter (210) connects the 3rd configurable low pass filter (260);
Described emission owner branch road is made of the second configurable low pass filter (210), the second variable-gain amplification circuit (220), gain buffer (230), the first upconverter (240) and configurable Pre-power amplifier (250) series connection; Baseband signal is undertaken sending into the second variable-gain amplification circuit (220) after filtering is processed by the second configurable low pass filter (210) and is amplified processing, gain buffer (230) is in the input load that drives the first upconverter (240), signal after processing is sent into the first upconverter (240) carry out up-conversion, last configurable Pre-power amplifier (250) is sent into antenna transmission after radiofrequency signal is amplified;
Described transmitter time route the 3rd a configurable low pass filter (260), the second upconverter (270) and configurable Pre-power amplifier (250) series connection consist of; Baseband signal is undertaken sending into the second upconverter (270) after filtering is processed by the 3rd configurable low pass filter (260) and is carried out up-conversion, then sends into and sends into antenna transmission after configurable Pre-power amplifier (250) amplifies radiofrequency signal.
2. a kind of radio frequency front end circuit for software radio transceiver according to claim 1, it is characterized in that, described 4 line serial synchronous interface circuits (320) pass through interface: SDI, SDO, SCLK and SCS and are connected the mode of operation of the inner modules circuit of control chip with the baseband controller of outside.
3. a kind of radio frequency front end circuit for software radio transceiver according to claim 1 is characterized in that, described band-gap reference source circuit (310) produces reference voltage and reference current simultaneously.
4. a kind of radio frequency front end circuit for software radio transceiver according to claim 1 is characterized in that, the working frequency range of described configurable low noise amplifier (110) is 100MHz-6GHz, and its gain is switched between 20dB, 10dB and 0dB;
The annexation of described configurable low-converter (120) is as follows: trsanscondutance amplifier (121) connects the common node of two passive frequency mixers (122), second order input section calibration circuit (125), passive frequency mixer (122) and trans-impedance amplifier (123) are cascaded, DC maladjustment calibration circuit (126) is connected in parallel between passive frequency mixer (122) and the trans-impedance amplifier (123), and 25% duty ratio squarer (124) connects respectively two passive frequency mixers (122);
Trsanscondutance amplifier (121) is converted into electric current with radiofrequency signal, be down-converted to electric current of intermediate frequency through passive frequency mixer (122), by trans-impedance amplifier (123) electric current is converted into voltage again, the difference local oscillation signal produces the signal that drives passive frequency mixer (122) by 25% duty ratio square-wave signal generator (124), passive frequency mixer (122) improves its second order input section performance by second order input section calibration circuit (125), and DC maladjustment calibration circuit (126) is used for eliminating the DC maladjustment component of I/Q two-way;
The described first configurable low pass filter (130) can switch between three rank and five rank, and the 1dB band width configuration is 5MHz, 10MHz, 20MHz, 30MHz, 40MHz or 50MHz; In addition, the first configurable low pass filter (130) has zero offset capability on the sheet;
The annexation of described the first variable-gain amplification circuit (140) is as follows: the first partiting dc circuit (141), first order variable gain amplifier (142), the second partiting dc circuit (143) and second level variable gain amplifier (144) series connection, and DC maladjustment compensating circuit (145) is in parallel with second level variable gain amplifier (144);
The first partiting dc circuit (141) is sent into first order variable gain amplifier (142) after the DC maladjustment of prime is eliminated, then by sending into second level variable gain amplifier (144) after the second partiting dc circuit (143) elimination DC component, the DC maladjustment amount of this grade introducing is offset by the input that DC maladjustment compensating circuit (145) feeds back to second level variable gain amplifier (144) again;
Described output driving circuit (150) is comprised of I path, Q channel and 4 adjustable resistances (152); Wherein the I path annexation as follows: the input of differential operational amplifier (154) access two adjustable resistors (151), be parallel with two fixed resistances (153) between the input of differential operational amplifier (154) and output, the circuit structure of Q channel is identical with the I path, at right-hand member access two adjustable resistances (152) of the adjustable resistor (151) of the left end of the adjustable resistor (151) of I path and Q channel, at left end access two adjustable resistances (152) of the adjustable resistor (151) of the right-hand member of the adjustable resistor (151) of I path and Q channel; Adjustable resistor (151) is realized the amplitude calibration of i/q signal with fixed resistance (153), and adjustable resistance (152) is realized the phase alignment of i/q signal with fixed resistance (153); Wherein, the scope of amplitude calibration is ± 3dB that stepping is 0.2dB; The scope of phase alignment is ± 6 °, and stepping is 0.2 °.
5. a kind of radio frequency front end circuit for software radio transceiver according to claim 4, it is characterized in that, described trsanscondutance amplifier (121) realizes that by array switch 7 grades of transconductance value are configurable, and trans-impedance amplifier (123) realizes that by array switch bandwidth and transimpedance gain 15 grades are configurable;
Described first order variable gain amplifier (142) and second level variable gain amplifier (144) provide the gain of 34dB together, and both variation steppings are 2dB;
Described the first partiting dc circuit (141) and the second partiting dc circuit (143) high pass by frequency all at 5KHz, 10KHz, 20KHz, 30KHz switches between 40KHz and the 1MHz.
6. a kind of radio frequency front end circuit for software radio transceiver according to claim 1, it is characterized in that, the described second configurable low pass filter (210) is 3 stage structures, and its 1dB band width configuration is 5MHz, 10MHz, 20MHz, 30MHz, 40MHz or 50MHz; In addition, configurable low pass filter (210) has zero offset capability on the sheet, and the second configurable low pass filter (210) has added the circuit structure identical with DC maladjustment calibration circuit (126);
The gain of described the second variable-gain amplification circuit (220) is between 0-30dB, and its stepping is 2dB, and the employing i/q signal calibration circuit structure identical with output driving circuit (150);
Described the first upconverter (240) adopts the circuit structure identical with 25% duty ratio square-wave signal generator (124) with passive frequency mixer (122);
The operating frequency of described configurable Pre-power amplifier (250) is 100MHz-6GHz, and its gain is regulated between-20dB-8dB;
The described the 3rd configurable low pass filter (260) has three rank filtering characteristics, and its 1dB bandwidth can be configured to 5MHz, 10MHz, 20MHz, 30MHz, 40MHz or 50MHz;
Described the second upconverter (270) is identical with the circuit structure of the first upconverter (240).
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| CN107645300B (en) * | 2017-10-16 | 2020-04-10 | 中国科学院上海高等研究院 | Current multiplexing low-power consumption radio frequency receiver |
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