CN102237050B - Grid driving circuit, grid voltage regulating method and liquid crystal display - Google Patents
Grid driving circuit, grid voltage regulating method and liquid crystal display Download PDFInfo
- Publication number
- CN102237050B CN102237050B CN 201010157453 CN201010157453A CN102237050B CN 102237050 B CN102237050 B CN 102237050B CN 201010157453 CN201010157453 CN 201010157453 CN 201010157453 A CN201010157453 A CN 201010157453A CN 102237050 B CN102237050 B CN 102237050B
- Authority
- CN
- China
- Prior art keywords
- turn
- voltage output
- voltage
- output module
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 40
- 238000000034 method Methods 0.000 title claims abstract description 36
- 230000001105 regulatory effect Effects 0.000 title description 13
- 239000000758 substrate Substances 0.000 claims description 5
- 238000012545 processing Methods 0.000 claims description 2
- 230000007547 defect Effects 0.000 abstract description 3
- 230000008569 process Effects 0.000 description 16
- 238000005520 cutting process Methods 0.000 description 10
- 238000010586 diagram Methods 0.000 description 10
- 230000008859 change Effects 0.000 description 6
- 230000000694 effects Effects 0.000 description 6
- 238000012360 testing method Methods 0.000 description 6
- 238000004458 analytical method Methods 0.000 description 4
- 239000013078 crystal Substances 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 239000012530 fluid Substances 0.000 description 4
- 230000006872 improvement Effects 0.000 description 2
- 230000009191 jumping Effects 0.000 description 2
- 239000012528 membrane Substances 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 206010052143 Ocular discomfort Diseases 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
Images
Landscapes
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
本发明公开了一种栅极驱动电路、栅极电压调节方法以及液晶显示器。栅极驱动电路包括开启电压输出模块和关闭电压输出模块，开启电压输出模块和关闭电压输出模块分别与栅线连接，开启电压输出模块输出到栅线的开启电压以及关闭电压输出模块输出到栅线的关闭电压均为可调的。本发明通过对栅极驱动电路中的开启电压输出模块输出的开启电压以及关闭电压输出模块输出的关闭电压进行调节，使得存在Mura不良的液晶面板的显示画面尽可能地均匀，从而提高存在Mura不良的液晶面板的画面显示品质。
The invention discloses a grid drive circuit, a grid voltage regulation method and a liquid crystal display. The gate drive circuit includes a turn-on voltage output module and a turn-off voltage output module, the turn-on voltage output module and the turn-off voltage output module are respectively connected to the gate line, the turn-on voltage output by the turn-on voltage output module to the gate line and the turn-on voltage output by the turn-off voltage output module to the gate line The shutdown voltage is adjustable. The present invention adjusts the turn-on voltage output by the turn-on voltage output module in the gate drive circuit and the turn-off voltage output by the turn-off voltage output module, so that the display screen of the liquid crystal panel with mura defect is as uniform as possible, thereby improving the quality of the mura defect. The screen display quality of the LCD panel.
Description
Technical field
The present invention relates to lcd technology, relate in particular to a kind of gate driver circuit, grid voltage control method and LCD.
Background technology
LCD is a flat-panel monitor commonly used at present, and wherein Thin Film Transistor-LCD (ThinFilm Transistor Liquid Crystal Display is called for short TFT-LCD) is the main product in the LCD.
Mura is bad to be the common defects of vision of a class among the TFT-LCD, and its contrast that shows as the liquid crystal panel picture is lower, luminance area is inhomogeneous, and edge fog, causes whole image inhomogeneous.The Mura defective region is usually greater than a pixel, and therefore, the bad meeting of Mura brings visual discomfort to the observer.Mura is bad generally to be caused by some link in the production of liquid crystal displays technology, for example the fluctuation of exposure or etch process.Bad in order to improve Mura, improve the product drawing quality, prior art is constantly improved aspect technology stability, avoids technological fluctuation as far as possible.Therefore, prior art only reduces the bad incidence of Mura as far as possible from technological process, but for the bad liquid crystal panel of Mura occurring, can't improve picture quality.
Summary of the invention
The invention provides a kind of gate driver circuit, grid voltage control method and LCD.
The invention provides a kind of gate driver circuit, comprise: cut-in voltage output module and close the voltage output module, described cut-in voltage output module with close the voltage output module and be connected with grid line respectively, described cut-in voltage output module outputs to the cut-in voltage of described grid line and describedly cuts out the voltage of cutting out that the voltage output module outputs to described grid line and be adjustable.
The invention provides a kind of LCD, comprise liquid crystal panel, described liquid crystal panel is formed box by array base palte and color membrane substrates, is filled with liquid crystal layer therebetween, and horizontal indulging intersected to form many grid lines and data line on the described array base palte; Described LCD also comprises gate driver circuit and data drive circuit, described gate driver circuit comprises the cut-in voltage output module and closes the voltage output module, and described cut-in voltage output module outputs to the cut-in voltage of described grid line and describedly cuts out the voltage of cutting out that the voltage output module outputs to described grid line and be adjustable.
The invention provides a kind of grid voltage control method, comprising:
Regulate the cut-in voltage of cut-in voltage output module output in the gate driver circuit, up to the gray difference of the normal viewing area of display frame and improper viewing area less than first preset value;
Regulate the voltage of closing of closing the output of voltage output module in the gate driver circuit, up to the gray difference of the normal viewing area of display frame and improper viewing area less than second preset value.
Gate driver circuit provided by the invention, grid voltage control method and LCD, regulate by cut-in voltage that the cut-in voltage output module in the gate driver circuit is exported and the voltage of closing of closing the output of voltage output module, make to exist the display frame of the bad liquid crystal panel of Mura even as much as possible, thereby improve the picture display quality that has the bad liquid crystal panel of Mura.
Description of drawings
Fig. 1 is the TFT characteristic test result schematic diagram of the pixel of Mura zone and normal viewing area;
Fig. 2 is the electrical block diagram of cut-in voltage output module among the gate driver circuit embodiment one of the present invention;
Fig. 3 is for closing the electrical block diagram of voltage output module among the gate driver circuit embodiment one of the present invention;
Fig. 4 is the electrical block diagram of cut-in voltage output module among the gate driver circuit embodiment two of the present invention;
Fig. 5 is the process flow diagram of grid voltage control method embodiment of the present invention.
Embodiment
For the purpose, technical scheme and the advantage that make the embodiment of the invention clearer, below in conjunction with the accompanying drawing in the embodiment of the invention, technical scheme in the embodiment of the invention is clearly and completely described, obviously, described embodiment is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making the every other embodiment that is obtained under the creative work prerequisite.
In the prior art, the basic reason that causes the bad generation of Mura is that to be distributed in the channel characteristic of TFT of each pixel inhomogeneous.At this reason, the inventor is to the normal viewing area and the improper viewing area of display frame, and promptly the TFT characteristic of the pixel in Mura zone is tested.Fig. 1 is the TFT characteristic test result schematic diagram of the pixel of Mura zone and normal viewing area, as shown in Figure 1, grid voltage Vg is greater than 0 corresponding grid line opening, grid voltage Vg is less than 0 corresponding grid line closed condition, and the change curve of the TFT channel current of Mura zone and normal viewing area is different.Specifically, greater than 0 o'clock, the charging current of the TFT raceway groove of normal viewing area was always greater than the Mura zone at grid voltage Vg, therefore, open in the process of pixel charging at grid, in the identical duration of charging, the Mura zone is undercharge with respect to normal viewing area; Less than 0 o'clock, the leakage current of the TFT raceway groove in Mura zone also was different with the leakage current of the TFT raceway groove of normal viewing area under identical grid voltage Vg at grid voltage Vg.Therefore, in the change procedure of whole grid voltage Vg, the Mura zone is different with the change curve of the TFT channel current of normal viewing area, just because of the change curve difference, the Mura zone is different with the voltage at the liquid crystal two ends of normal viewing area, thereby causes the gray scale in normal viewing area and Mura zone there are differences.At the specificity analysis of above-mentioned Mura zone with the TFT channel current of normal viewing area, the inventor discovers, output to the cut-in voltage of grid line and close voltage by adjusting gate driver circuit, can be so that normal viewing area and Mura zone be identical with channel current under closing voltage at cut-in voltage, thereby reduce the gray difference in normal viewing area and Mura zone, improve quality of display pictures.
Correspondingly, gate driver circuit of the present invention can comprise: cut-in voltage output module and close the voltage output module, described cut-in voltage output module with close the voltage output module and be connected with grid line respectively, described cut-in voltage output module outputs to the cut-in voltage of described grid line and describedly cuts out the voltage of cutting out that the voltage output module outputs to described grid line and be adjustable.
Specifically, the cut-in voltage output module in the gate driver circuit of the present invention is used for to each bar grid line input cut-in voltage Von, and the voltage output module of cutting out in the gate driver circuit is used for cutting out voltage Voff to each bar grid line input.In the prior art, Von and Voff are uncontrollable, therefore, exist on the bad liquid crystal panel of Mura, can't regulate for normal viewing area and the uneven degree of Mura viewing area display frame, and the present invention just is being based on the specificity analysis of the TFT channel current of above-mentioned Mura zone and normal viewing area, Von and Voff are set to adjustable, thereby can regulate the Mura zone and the TFT channel current of normal viewing area, reduce normal viewing area and the uneven degree of Mura viewing area display frame, and then the bad liquid crystal panel quality of display pictures of Mura has appearred in improvement.
Below be elaborated by the technical scheme of embodiment to above-mentioned gate driver circuit.Need to prove, following embodiment has only provided the circuit and the circuit of closing the voltage output module of cut-in voltage output module in the gate driver circuit respectively, and cut-in voltage output module and cut out the voltage output module and concrete connection of grid line can adopt any connected mode of the prior art repeats no more herein.
Embodiment one
It is adjustable for Von and Voff are, among the gate driver circuit embodiment one of the present invention, cut-in voltage output module and close the voltage output module and can comprise adjustable resistance respectively, described cut-in voltage output module and close the voltage output module and adjust described cut-in voltage and close voltage by described adjustable resistance respectively.
Fig. 2 is the electrical block diagram of cut-in voltage output module among the gate driver circuit embodiment one of the present invention, and as shown in Figure 2, R1 is an adjustable resistance, and Vgh is a default high level signal, and Von is a cut-in voltage.Present embodiment can be shunted Vgh by regulating R1, thereby changes Von, promptly changes the cut-in voltage of grid line.In the present embodiment, the range of adjustment of this adjustable resistance R1 can be 1 kilo-ohm to 10 kilo-ohms, and the range of adjustment of cut-in voltage Von can be 18 volts to 26 volts.
Fig. 3 is for closing the electrical block diagram of voltage output module among the gate driver circuit embodiment one of the present invention, as shown in Figure 3, R2 also is an adjustable resistance, and Voff1 is a low level signal of presetting also, and Voff is for closing voltage.Present embodiment can be shunted Voff1 by regulating R2, thereby changes Voff, promptly changes the voltage of closing of grid line.In the present embodiment, the range of adjustment of this adjustable resistance R2 can be 1 kilo-ohm to 10 kilo-ohms, and the range of adjustment of closing voltage can be negative 4 volts to negative 12 volts.
Need to prove; in the present embodiment; Fig. 2 and Fig. 3 have only provided the cut-in voltage output module and have closed a kind of implementation structure of voltage output module; it will be understood by those skilled in the art that; the present invention is not limited to Fig. 2 and two kinds of implementation structures of Fig. 3; as long as can realize to cut-in voltage Von and close the circuit that voltage Voff regulates, all within the protection domain of technical solution of the present invention.
Specifically, present embodiment can but be not limited to be applied in the module assembling process.For the bad liquid crystal panel of Mura occurring, can the cut-in voltage Von of cut-in voltage output module output be regulated with the voltage Voff that closes that closes the output of voltage output module.For the process of regulating Von, Von can change between range of adjustment 18V～26V, and under the Von of this scope, charging current Ion can guarantee greater than 5 * 10
-5A by the adjusting to adjustable resistance R1, can carry out homogenising to the display frame of liquid crystal panel and handle, till display frame reaches effect of uniform.This adjustment process can adopt the gray scale of each position on the densitometer test fluid crystal panel display image, and till each locational gray difference was less than certain threshold value, then display frame this moment can reach effect of uniform.For the process of regulating Voff, Voff can range of adjustment for-4V～-change between the 12V, under the Voff of this scope, the leakage current Ioff of TFT raceway groove can guarantee less than 10
-12A by regulating adjustable resistance R2, can carry out homogenising to the display frame of liquid crystal panel and handle, till display frame reaches effect of uniform.This adjustment process also can adopt the gray scale of each position on the densitometer test fluid crystal panel display image, and till each locational gray difference was less than certain threshold value, then display frame this moment can reach effect of uniform.Present embodiment can adopt adjusting knob or regulate the button realization when the cut-in voltage output module regulates with the adjustable resistance of cutting out the voltage output module.And the cut-in voltage output module of present embodiment and cut out the voltage output module compared with prior art only need be provided with several adjustable resistances, and need not to take very large tracts of land on printed circuit board (PCB).
In the present embodiment, Von after the adjusting of cut-in voltage output module output and close the adjusting of voltage output module output after Voff all can be input to the grid line driver module, this grid line driver module can synthesize the final grid line drive signal of formation to the level signal of Von and Voff.This gate drive signal can be input to each grid line, thus the opening and closing of driven grid line.Need to prove that after the level signal that present embodiment does not limit Von and Voff was input to the grid line driver module, the grid line driver module carried out compound process to two kinds of level signals.
In the gate driver circuit of present embodiment, cut-in voltage output module and close in the voltage output module and be provided with adjustable resistance, by regulating adjustable resistance, make cut-in voltage Von and close voltage Voff and all can be adjusted, thereby make to exist the display frame of the bad liquid crystal panel of Mura even as much as possible, thereby improve the picture display quality that has the bad liquid crystal panel of Mura.Present embodiment only need be provided with adjustable resistance on printed circuit board (PCB), implementation is simple.
Embodiment two
Gate driver circuit embodiment two of the present invention is with the difference of gate driver circuit embodiment one of the present invention, the cut-in voltage output module can comprise grid voltage output unit and multistage grid (Multi-LevelGate, hereinafter to be referred as: MLG) voltage output unit, wherein, the grid voltage of grid voltage output unit output is adjustable, the multistage grid voltage of the grid voltage of grid voltage output unit output and the output of multistage grid voltage output unit is input to superpositing unit, superpositing unit carries out overlap-add procedure to described grid voltage and multistage grid voltage, generates described cut-in voltage.
Specifically, cause scintillation to take place in order to prevent the pixel voltage saltus step, present embodiment adopts the MLG method to make that jumping voltage is as far as possible little down.Its specific implementation is: by allowing grid cut-in voltage Von descend at the gate turn-off time stage, reduce last shut off differential pressure, thereby make that jumping voltage is less down, it is reduced the influence that shows.Therefore, present embodiment can adopt MLG voltage output unit output MLG voltage, then this MLG voltage and adjustable grid voltage is superposeed, thereby generates cut-in voltage, and also promptly this cut-in voltage is adjustable.
Fig. 4 is the electrical block diagram of cut-in voltage output module among the gate driver circuit embodiment two of the present invention, as shown in Figure 4, cut-in voltage output module in the present embodiment is compared with cut-in voltage output module shown in Figure 2, added MLG voltage, this MLG voltage and the acting in conjunction of adjustable Vgh voltage, generate cut-in voltage Von, therefore, this cut-in voltage Von can either prevent that the pixel voltage saltus step from being again adjustable.
The gate driver circuit of present embodiment is on the basis of gate driver circuit embodiment one of the present invention, further, the cut-in voltage Von of cut-in voltage output module output can either make that to have the display frame of the bad liquid crystal panel of Mura even as far as possible, improve the picture display quality there is the bad liquid crystal panel of Mura, can prevent the pixel voltage saltus step again and cause scintillation to take place.
Based on the description of above-mentioned gate driver circuit, an embodiment to the LCD that has this gate driver circuit is described below.
LCD in the present embodiment comprises liquid crystal panel, and described liquid crystal panel is formed box by array base palte and color membrane substrates, is filled with liquid crystal layer therebetween, and horizontal indulging intersected to form many grid lines and data line on the described array base palte; Described LCD also comprises gate driver circuit and data drive circuit, described gate driver circuit comprises the cut-in voltage output module and closes the voltage output module, and described cut-in voltage output module outputs to the cut-in voltage of described grid line and describedly cuts out the voltage of cutting out that the voltage output module outputs to described grid line and be adjustable.
Wherein, the cut-in voltage output module in the gate driver circuit can but be not limited to adopt above-mentioned Fig. 2 or circuit structure shown in Figure 4, close the voltage output module can but be not limited to adopt circuit structure shown in Figure 3.It realizes that principle is similar, repeats no more.
Specifically, the LCD of present embodiment is that with the difference of LCD of the prior art the gate driver circuit of laying is different on the printed circuit board (PCB) of liquid crystal panel.In the LCD of present embodiment, the cut-in voltage output module in the gate driver circuit is used for to each bar grid line input cut-in voltage Von, and the voltage output module of cutting out in the gate driver circuit is used for cutting out voltage Voff to each bar grid line input.In the prior art, Von and Voff are uncontrollable, therefore, exist on the bad liquid crystal panel of Mura, can't regulate for normal viewing area and the uneven degree of Mura viewing area display frame, and present embodiment just is being based on the specificity analysis of the TFT channel current of above-mentioned Mura zone and normal viewing area, Von and Voff are set to adjustable, thereby can regulate the Mura zone and the TFT channel current of normal viewing area, reduce normal viewing area and the uneven degree of Mura viewing area display frame, and then improve the quality that the bad liquid crystal display displays picture of Mura occurred.
Fig. 5 is the process flow diagram of grid voltage control method embodiment of the present invention, and as shown in Figure 5, the method for present embodiment can comprise:
Step 101, regulate the cut-in voltage of cut-in voltage output module output in the gate driver circuit, up to the gray difference of the normal viewing area of display frame and improper viewing area less than first preset value.
Step 102, regulate the voltage of closing of closing the output of voltage output module in the gate driver circuit, up to the gray difference of the normal viewing area of display frame and improper viewing area less than second preset value.
Need to prove that the execution sequence of step 101 and step 102 also can be put upside down.
Specifically, in the prior art, Von and Voff are uncontrollable, therefore, exist on the bad liquid crystal panel of Mura, can't regulate for normal viewing area and the uneven degree of Mura viewing area display frame, and present embodiment just is being based on the specificity analysis of the TFT channel current of above-mentioned Mura zone and normal viewing area, Von and Voff are set to adjustable on circuit structure, thereby can adopt the method for present embodiment that the Mura zone and the TFT channel current of normal viewing area are regulated, reduce normal viewing area and the uneven degree of Mura viewing area display frame, and then the bad liquid crystal panel quality of display pictures of Mura has appearred in improvement.
The method of present embodiment can but be not limited to be applied in the module assembling process.For the bad liquid crystal panel of Mura occurring, can the cut-in voltage Von of cut-in voltage output module output be regulated with the voltage Voff that closes that closes the output of voltage output module.For the process of regulating Von, Von can change between range of adjustment 18V～26V, and under the Von of this scope, charging current Ion can guarantee greater than 5 * 10
-5A, by adjusting to adjustable resistance R1, can carry out homogenising to the display frame of liquid crystal panel handles, in this process, present embodiment can adopt the gray scale of each position on the densitometer test fluid crystal panel display image, till each locational gray difference was less than first threshold, then display frame this moment can reach effect of uniform.For the process of regulating Voff, Voff can range of adjustment for-4V～-change between the 12V, under the Voff of this scope, the leakage current Ioff of TFT raceway groove can guarantee less than 10
-12A by regulating adjustable resistance R2, can carry out homogenising to the display frame of liquid crystal panel and handle.This process also can adopt the gray scale of each position on the densitometer test fluid crystal panel display image, and till each locational gray difference was less than second threshold value, then display frame this moment can reach effect of uniform.Need to prove, those skilled in the art can be rule of thumb or the experiment simulation result first threshold and second threshold value are preset processing.Present embodiment can adopt adjusting knob or regulate the button realization when the cut-in voltage output module regulates with the adjustable resistance of cutting out the voltage output module.
In the method for present embodiment, by to the cut-in voltage of cut-in voltage output module output and close the output of voltage output module close voltage adjustment, make to exist the display frame of the bad liquid crystal panel of Mura even as much as possible, thereby improve the picture display quality that has the bad liquid crystal panel of Mura.
One of ordinary skill in the art will appreciate that: all or part of step that realizes said method embodiment can be finished by the relevant hardware of programmed instruction, aforesaid program can be stored in the computer read/write memory medium, this program is carried out the step that comprises said method embodiment when carrying out; And aforesaid storage medium comprises: various media that can be program code stored such as ROM, RAM, magnetic disc or CD.
It should be noted that at last: above embodiment only in order to technical scheme of the present invention to be described, is not intended to limit; Although with reference to previous embodiment the present invention is had been described in detail, those of ordinary skill in the art is to be understood that: it still can be made amendment to the technical scheme that aforementioned each embodiment put down in writing, and perhaps part technical characterictic wherein is equal to replacement; And these modifications or replacement do not make the essence of appropriate technical solution break away from the spirit and scope of various embodiments of the present invention technical scheme.
Claims (9)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201010157453 CN102237050B (en) | 2010-04-27 | 2010-04-27 | Grid driving circuit, grid voltage regulating method and liquid crystal display |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201010157453 CN102237050B (en) | 2010-04-27 | 2010-04-27 | Grid driving circuit, grid voltage regulating method and liquid crystal display |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102237050A CN102237050A (en) | 2011-11-09 |
| CN102237050B true CN102237050B (en) | 2013-07-31 |
Family
ID=44887647
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201010157453 Expired - Fee Related CN102237050B (en) | 2010-04-27 | 2010-04-27 | Grid driving circuit, grid voltage regulating method and liquid crystal display |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102237050B (en) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103578434B (en) * | 2012-07-25 | 2016-01-13 | 群康科技(深圳)有限公司 | Display device and common voltage circuit module thereof |
| CN104658463A (en) * | 2015-03-09 | 2015-05-27 | 合肥京东方光电科技有限公司 | Setting method and setting system for display panel |
| KR102348666B1 (en) | 2015-06-30 | 2022-01-07 | 엘지디스플레이 주식회사 | Display device and mobile terminal using the same |
| CN105489181B (en) * | 2016-01-04 | 2019-03-12 | 京东方科技集团股份有限公司 | Cut-in voltage supply circuit, method, defect analysis method and display device |
| CN105590609B (en) * | 2016-03-11 | 2019-01-22 | 深圳市华星光电技术有限公司 | Driving method for liquid crystal display panel and liquid crystal display panel drive system |
| CN106647072A (en) * | 2016-10-20 | 2017-05-10 | 深圳市华星光电技术有限公司 | Array substrate, liquid crystal displayer and display device |
| CN106782408B (en) * | 2017-02-16 | 2019-10-15 | 京东方科技集团股份有限公司 | Display panel, GOA circuit and its driving capability regulating device |
| CN106920528B (en) * | 2017-05-05 | 2018-07-06 | 惠科股份有限公司 | Method and device for adjusting grid turn-off voltage and display equipment |
| CN107316620B (en) * | 2017-08-24 | 2020-01-31 | 京东方科技集团股份有限公司 | display panel, display device and method for adjusting crosstalk of display panel |
| CN108133685B (en) * | 2018-01-03 | 2021-03-26 | 京东方科技集团股份有限公司 | Amplitude control unit, voltage supply module, display device and amplitude control method |
| CN109581774B (en) * | 2019-01-03 | 2021-11-30 | 京东方科技集团股份有限公司 | Display driving method, gate driver and display device |
| CN112162586B (en) * | 2020-10-29 | 2021-08-10 | 上海大学 | Circuit for driving TFT |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001083945A (en) * | 1999-09-14 | 2001-03-30 | Sharp Corp | Liquid crystal display device |
| JP2007072162A (en) * | 2005-09-07 | 2007-03-22 | Mitsubishi Electric Corp | Display device |
| JP4346636B2 (en) * | 2006-11-16 | 2009-10-21 | 友達光電股▲ふん▼有限公司 | Liquid crystal display |
| CN101324715B (en) * | 2007-06-15 | 2011-04-20 | 群康科技(深圳)有限公司 | Liquid crystal display apparatus and drive method thereof |
-
2010
- 2010-04-27 CN CN 201010157453 patent/CN102237050B/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| CN102237050A (en) | 2011-11-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102237050B (en) | Grid driving circuit, grid voltage regulating method and liquid crystal display | |
| CN107450203B (en) | Light valve panel and liquid crystal display using the same | |
| US10109241B2 (en) | Light valve panel and liquid crystal display using the same | |
| US8928705B2 (en) | Liquid crystal display with crosstalk interference suppression based on gray-level variation of a frame to be displayed and related method | |
| CN101996591B (en) | Method for improving liquid crystal display image sticking and liquid crystal display driving device | |
| US9953561B2 (en) | Array substrate of display apparatus and driving method thereof and display apparatus | |
| KR102463226B1 (en) | Light valve panel and liquid crystal display device using the same | |
| CN102467862A (en) | Voltage regulation method and device of liquid crystal display panel | |
| CN102426816A (en) | Method for repairing bad display of active-matrix organic light-emitting display | |
| JP2010231205A (en) | Common electrode drive circuit and liquid crystal display | |
| JP2013148905A (en) | Driving method and display unit using the same | |
| CN101383130B (en) | Lcd | |
| CN104966498B (en) | A kind of voltage compensating circuit and the voltage compensating method based on voltage compensating circuit | |
| KR20080105595A (en) | Common voltage setting device and method | |
| WO2018072310A1 (en) | Array substrate, liquid crystal display, and display device | |
| CN102236188A (en) | Gate driving method and circuit and liquid crystal display (LCD) panel | |
| KR20160060136A (en) | Liquid crystal display apparatus and display control method therefor | |
| US20180114501A1 (en) | Chamfering circuit of adjustable chamfered waveform and adjust method of chamfered waveform | |
| CN206421807U (en) | The common electric voltage adjusting means and display device of display panel | |
| US20120169706A1 (en) | Gate drive method and gate drive device of liquid crystal display | |
| WO2017117950A1 (en) | Threshold voltage supply circuit, threshold voltage supply method, fault analysis method, and display apparatus | |
| KR102544140B1 (en) | Method of driving a liquid crystal display panel and liquid crystal display device employing the same | |
| WO2019085098A1 (en) | Array substrate, testing method and display device | |
| US20130293528A1 (en) | Display driving apparatus and method for driving display panel | |
| KR20180002967A (en) | Light valve panel and liquid crystal display device using the same |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: BEIJING BOE PHOTOELECTRICITY SCIENCE + TECHNOLOGY Effective date: 20150623 Owner name: JINGDONGFANG SCIENCE AND TECHNOLOGY GROUP CO., LTD Free format text: FORMER OWNER: BEIJING BOE PHOTOELECTRICITY SCIENCE + TECHNOLOGY CO., LTD. Effective date: 20150623 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20150623 Address after: 100015 Jiuxianqiao Road, Beijing, No. 10, No. Patentee after: BOE TECHNOLOGY GROUP Co.,Ltd. Patentee after: BEIJING BOE OPTOELECTRONICS TECHNOLOGY Co.,Ltd. Address before: 100176 Beijing economic and Technological Development Zone, West Central Road, No. 8 Patentee before: BEIJING BOE OPTOELECTRONICS TECHNOLOGY Co.,Ltd. |
|
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130731 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |