CN102208207A - System for sensing sink current based on sampled and maintained source cathode terminals - Google Patents
System for sensing sink current based on sampled and maintained source cathode terminals Download PDFInfo
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- CN102208207A CN102208207A CN2010101562563A CN201010156256A CN102208207A CN 102208207 A CN102208207 A CN 102208207A CN 2010101562563 A CN2010101562563 A CN 2010101562563A CN 201010156256 A CN201010156256 A CN 201010156256A CN 102208207 A CN102208207 A CN 102208207A
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Abstract
The described source cathode terminal sensing technology determines a data value stored in a memory cell based on the difference between a current read from a source cathode terminal of the memory cell and a sink current introduced from the read current. The sink current is introduced in response to the size of an operation voltage between a first node and a second node. In a first time interval, the operation voltage is set in response to the size of a reference current by a feedback path. In a second time interval after the first time interval, the operation voltage is maintained and is independent of the feedback path. The data value stored in the selected memory cell is determined based on the difference between the read current in the second time interval and the sink current.
Description
Technical field
The invention relates to the data sensing of memory storage, particularly about so preventing in the memory storage because the sense operation that noise caused interference.
Background technology
There are many nonvolatile memories that utilize the charge storage memory cells kenel now, comprise that the cell stores electric charge is between the passage and grid of a field effect transistor.Stored amount of charge has influenced transistorized critical voltage, and it can be sensed with the indication data.
A kind of charge storage memory cells of kenel is called as floating gate memory cell.In floating gate memory cell, electric charge is stored in an electrical conductive layer between the passage and grid of field effect transistor.The change of critical voltage stores or removes electric charge by applying a suitable voltage in the electrical since then conductive layer of this storage unit.The storage unit of another kind of kenel is called as charge capturing storage unit, and it uses a dielectric charge to catch layer replacement floating grid.
Reading or sensing when being stored in the operation of the data value in the storage unit, be apply suitable voltage with the drain electrode end inducing current of storage unit since then to source terminal.This electric current is to depend on transistorized critical voltage, and therefore indication is stored in data wherein.
The data value that is stored in the storage unit of decision can utilize a sensing amplifier to carry out, and its senses flow is through the electric current of this storage unit, and the electric current of this sensing and a suitable reference value are made comparisons.Fig. 1 shows the enforcement synoptic diagram of the sensing amplifier 170 of a known technology, and it can be stored in a data value of choosing in the storage unit 110 by sensing.
In the sense operation of storage unit 110, be to apply suitable voltage to character line 120 and bit line 132 to bring out and read electric current I
CELLFrom drain electrode terminal 114 to source terminal 112 and enter bit line 130.This reads electric current I
CELLBe provided to data line 150 via row selecting transistor 140.This reads electric current I
CELLSensing input 172 at this sensing amplifier 170 comes an equivalent load capacitance C
LOAD1Charging, cause the voltage of sensing input 172 to change being with this read operation in the time to read electric current I CELL relevant.This reads electric current I
CELLSize be relevant with the critical voltage of storage unit 110, have lower critical voltage and can cause a bigger electric current.Therefore, it is very fast that the voltage of sensing input 172 can change, if this storage unit 110 is in a lower critical conditions rather than in a higher critical conditions.
In this sense operation, use a reference current I
REFProvide in the sensing of sensing amplifier 170 input 172 with as the reference value.In this illustrative example, reference unit 210 is used to provide reference current I
REF
Suitable voltage is applied to character line 220 and bit line 232 these storage unit to bring out a reference current I
REFFrom drain electrode terminal 214 to source terminal 212 and enter bit line 230.This reference current I
REFBe provided to reference line 160 via row selecting transistor 142.This reference current I
REF Reference input 174 at this sensing amplifier 170 comes an equivalent load capacitance C
LOAD2Charging causes this reference current of the voltage transitions I with reference to input 174
REFIt is a reference voltage.
Fig. 2 be storage unit 110 during in sense operation sensing input 172 change and the time relation simplified diagram with voltage with reference to input 174.If it is voltage changes of sensing input 172 when hangs down critical conditions that curve 250 shows storage unit 110, and if curve 260 shows that storage unit 110 is voltage changes of sensing input 172 when a higher critical conditions.Difference between the curve 250 and 260 is to be between the low or sensing area on the sensing border of higher critical conditions in order to distinguish this storage unit when time T 1.In order to distinguish higher and low critical conditions reliably, must keep a big relatively sensing border.In the embodiment of multi-bit memory cell, it has and surpasses two critical conditionss, therebetween and have between sensing area.
This sensing amplifier 170 produces an output signal 176, and it has a numerical value is that voltage according to the input of sensing when time T 1 172 is to be greater than or less than with reference to the voltage of input 174 decide, therefore indicates to be stored in this and to choose data value in the storage unit 110.
Can have problems because sensing amplifier 170 is subjected to The noise easily in this detection process.Particularly, the noise in sense operation can influence the voltage difference between sensing input 172 and the reference input 174, and it can increase the complexity or the required time of sensing of sensing amplifier 170.
In example shown in Figure 1, storage unit 110 is to isolate with reference unit 210, and this reads electric current I
CELLWith reference current I
REFCan't rely on each other.Consequently, storage unit 110 can be exposed under the noise different with reference unit 210, and it can cause reading electric current I
CELLWith reference current I
REFThe change of different proportion.Consequently wider sensing input 172 with change with reference to the voltage difference between the input 174, its suppressed sensing amplifier 170 correctly sensing be stored in this and choose data value in the storage unit 110.
In the above-described embodiment, the sensing of sensing amplifier 170 input 172 is that source terminal 112 with storage unit 110 couples (source terminal sensing).Consequently, the voltage on the source terminal 112 also can increase by one with read electric current I
CELLRelevant quantity.Voltage increase on this source terminal 112 has reduced and drains to source voltage and increased the body effect of this storage unit 110, and therefore it can reduce by what storage unit 110 provided and read electric current I
CELL
Because the relation of the environmental turbulence of operation also can be because of the relation of material and process conditions change, the critical voltage of this storage unit can change between array 105.When can causing 105 of arrays to store identical data, this change reads electric current I
CELLChange, comprise because source voltage increases the electric current I that reads caused
CELLThe difference that changes.Therefore, has a quantity that source voltage increases and to read electric current I CELL relevant, the result can be voltage or wider distribution of electric current of the induction sensing input 172 of sensing amplifier 170, and it has increased complexity or the required time and the complexity of induction sensing circuit.A kind of solve operational issue that the change of this source voltage caused bring out an electric current through the source terminal drain terminal of storage unit so far from data line.This source terminal sensing circuit and method are proposed by Application No. 12/576466.
Therefore, need provide a kind of sensing circuit and method, it can solve the problem that is produced because of the source voltage change when operation, and has the higher ability to bear to noise.
Summary of the invention
The electric current that source terminal detection technology described herein is read according to cell source terminal since then and read the difference that sinks between the electric current that electric current imports from this and decide the data value that is stored in the storage unit.This sinks electric current be response by one between first and second node operating voltage size and import.In very first time interval, be the size of this reference current of response and use a feedback path it can be set apace between this first and second internodal this operating voltage.To utilize a capacitor be definite value to keep in this operating voltage second time interval basically for this feedback path of anergy and this operating voltage in one second time interval after this very first time interval.Consequently, one the noise that injects first and second node can cause producing similar change another person of first and second node, so in operating voltage second time interval be basically keep definite value and be muting therefore.Being stored in this, to be selected data value in the storage unit be according to this reads electric current and this difference that sinks between the electric current determines in second time interval.Therefore, the correctness of this difference can not influenced by the noise of first and second node basically.
Use is read electric current and is sinked difference between the electric current, rather than the whole electric current that reads, and can reduce the variation in voltage of cell source terminal when sense operation.Like this then reduce the change of reading electric current can between the storage unit in this array, carry out the source terminal sensing time.Consequently, the voltage of the sense node in the storage unit or distribution of current can become comparatively and to tighten between this array.
What memory storage described herein comprised that a storage array can be in this storage array one chooses storage unit and provides one to read current to a data line, one reference current source can provide a reference current, one sinks current source with this data line couples, this sink that current source can respond between a size of this first and second internodal this operating voltage and certainly this data line import one and sink electric current.This sinks current circuit and comprises that a feedback path is the size of this reference current of response and can be used to set between this first and second internodal this operating voltage, one capacitor is coupled between this first and second node to keep this operating voltage, reach a switching switch and can be used to this feedback path of activation in a very first time interval, and this feedback path of anergy in one second time interval after this very first time interval; And one sense amplifying circuits in response to this reads electric current and this and sinks difference between the electric current in this second time interval, be used to refer to and be stored in the output signal that this is selected the data value in the storage unit and produce one.
The method of sensing one storage unit described herein comprises and applies one and be biased into this storage unit and bring out one with this storage unit certainly and read current to a data line, provide a reference current from a reference current source, response one between the size of first and second internodal operating voltage and certainly this data line imports one and sinks electric current.Importing this sinks electric current and comprises and use a feedback path respond size of this reference current in a very first time interval and can be used to setting between this first and second internodal this operating voltage, and keep in one second time interval this very first time interval after between between this first and second node and this irrelevant operating voltage of this feedback path, according to this reads electric current and this and sinks a difference between the electric current and determine to be stored in a data value in this storage unit in this second time interval.
Description of drawings
Purpose of the present invention, feature, and embodiment can be described by the collocation accompanying drawing in the chapters and sections of following embodiment, wherein:
Fig. 1 shows the synoptic diagram of the conventional memory device of using source terminal sensing mechanism.
Fig. 2 is that the voltage of the sensing input of sensing amplifier changes and time relation figure.
Fig. 3 shows the concise and to the point block schematic diagram of an integrated circuit, comprises the current circuit that sinks of sampling that is used in the source terminal detection technology described in the invention and maintenance therein.
Fig. 4 shows that one in this storage array choose the method flow diagram that storage unit is carried out sense operation.
What Fig. 5 showed first embodiment of the invention is used in the sampling in the storage array and the simplified diagram that sinks current circuit of maintenance.
The sequential chart that sinks current circuit of sampling shown in Fig. 6 display operation Fig. 5 and maintenance.
What Fig. 7 showed second embodiment of the invention is used in the sampling in the storage array and the simplified diagram that sinks current circuit of maintenance.
What Fig. 8 showed third embodiment of the invention is used in the sampling in the storage array and the simplified diagram that sinks current circuit of maintenance.
What Fig. 9 showed fourth embodiment of the invention is used in the sampling in the storage array and the simplified diagram that sinks current circuit of maintenance.
Embodiment
The following Fig. 3 of embodiment of the invention collocation is described in detail to Fig. 9.
Fig. 3 shows the concise and to the point block schematic diagram of an integrated circuit 300, comprise therein described in the invention be used in sampling in the storage array 320 and maintenance sink current circuit 310, it can be used for sensing and be stored in data value in storage array 320 storage unit.
Can describe in more detail in following, when one of this storage array 320 was chosen storage unit and carried out a sense operation, suitable voltage was applied in to bring out and reads voltage I
CELLOne of storage array 320 source terminal of choosing storage unit data line 332 so far since then.Sink current circuit 310 and the data line 332 of this sampling and maintenance couple and import one with the size of the operating voltage of response between first node and Section Point and sink electric current I
SINKNoun as used herein " operating voltage " typically refers to one between the first node that sinks current circuit 310 of this sampling and maintenance and the voltage between the Section Point, and it has in order to respond reference current I
REFIf size change, and set up one change and sink electric current I
SINKThe voltage of size.
Below described sampling and maintenance sink current circuit 310, comprise that a feedback path can be used for responding reference current I
REFSize and the operating voltage of operating and setting between first node and Section Point.In a very first time interval (sampling range) of sense operation, this feedback path is enabled to set this operating voltage soon.In one second time interval of sense operation (keeping interval), this feedback path is by anergy, and one keeps capacitor to be coupled between first node and the Section Point so that to keep this operating voltage almost be a definite value and therefore do not have noise haply.
Among the described herein embodiment, this operating voltage is the voltage between a load transistor control terminal (for example gate terminal) in the current circuit 310 and the conducting terminal (for example drain electrode or source terminal) of sinking between this sampling and maintenance, sinks electric current I with derivation
SINKWith reference current I
REFThis keeps capacitor is to be used for applying the control of definite value-conducting terminal voltage (for example gate-to-drain or source voltage) load transistor so far roughly, almost is a definite value so the electric current of this load transistor can maintain in this retention time interval.
Between sinking electric current I
SINKWith reference current I
REFBetween difference provide sense amplifier in the block 330.This sense amplifier is to sink electric current I in response second time interval
SINKWith reference current I
REFBetween a difference to produce the output signal that indication is stored in the data value in the selected storage unit.
As shown in Figure 3, this sampling and maintenance sinks current circuit 310 and also can provide a reference voltage V when sense operation
TREFReference mode to the sense amplifier of block 330.
In Fig. 3, use the reference current I that reference unit produced in the referential array 340
REFOffer sampling and keep sink current circuit 310.Alternatively also can use other technology to produce reference current I
REFFor example, reference current IREF can be surpassed the reference current of more than one reference unit by basis.
The address is to provide to row decoder 326,342 and column decoder 322,344 by bus 350.Data is the data input structure that is sent to square 330 by the input/output end port on the integrated circuit 300 by data input line 352.In this illustrative embodiment, other circuit 360 is also included within this integrated circuit 300, for example general purpose processor or special purpose circuit, or the composite module supported of storage array is to provide the system-on-a-chip function thus.Data is by the sensing amplifier in the square 330, by data output line 354, is sent to input/output end port or other integrated circuit 300 interior or outer data destinations on the integrated circuit 300.
This integrated circuit 300 comprise controller 369 with sensing, programme and wipe reference unit in storage array 320 storage unit and the referential array 340.This controller 369 is that a bias voltage is adjusted state machine in this example, and control is by the bias voltage adjustment supply voltage that produces in the block 368 or reading to the block 368, programming or erasing voltage are provided.The application of this controller 369 can be used, and the known technology of industry is implemented as the specific purposes logical circuit.In another embodiment, this controller 369 comprises a general purpose processor, and it can be embodied on the identical integrated circuit, and it carries out a computer program to control the operation of this device.In another embodiment, the combination of a specific purposes logical circuit and a general purpose processor can be used to implement this controller 369.
Fig. 4 shows that one in this storage array 320 choose a method 400 process flow diagrams that storage unit is carried out sense operation, and it can be carried out by controller 369.
At square 410, apply one and read and be biased into this storage unit that is selected and bring out with the one source pole terminal of this storage unit that is selected certainly and read electric current I
CELLTo data line 332.
At square 420, provide a reference current I from a reference current source
REFIn the illustrative embodiments of Fig. 3, this reference current I
REFBe by apply suitable bias voltage to the referential array 340 reference unit and provide.
As described before, sinked electric current I from what data line 332 imported
SINKBe that response is between the first node that sinks current circuit 310 (square 430,440) of this sampling and maintenance and the operating voltage size between the Section Point.In a very first time interval (square 430), a sampling and a feedback path that sinks in the current circuit 310 that keeps can be used for responding reference current I
REFSize and the operating voltage of operating and setting between first node and Section Point.To describe in more detail in following, this feedback path can be set the operating point that sinks current circuit of this sampling and maintenance soon, comprises the operating voltage of setting soon between first node and Section Point.
In one second time interval (square 440) behind very first time interval, this operating voltage is maintained between first node and the Section Point and irrelevant with feedback path.
At square 450, according to reading electric current I
CELLSink electric current I with this
SINKBetween difference decision in second time interval be stored in this and be selected data value in the storage unit.
What Fig. 5 showed first embodiment of the invention is used in the sampling in the storage array 320 and the simplified diagram that sinks current circuit 310 of maintenance, and it can be used for sensing and be stored in data value in the storage array 320 selected storage unit 510.
The grid of character line 324a and selected storage unit 510 couples.Bit line 328a, 328b couple with the drain terminal 511 and the source terminal 512 of storage unit 510 respectively.
When a sense operation of this storage unit 510, suitable voltage is applied to character line 324a and bit line 328a reads electric current I to bring out
CELLFrom drain electrode terminal 511 to source terminal 512 and enter bit line 328b.This reads electric current I
CELLBe provided to data line 332a via row decoder 326.
In this illustrative example, the reference unit 560 of referential array 340 is used to provide reference current I
REFThe gate terminal of character line 345a and reference unit 560 couples.Bit line 343a, 343b couple with the drain terminal 561 and the source terminal 562 of reference unit 560 respectively.
Voltage is applied to character line 345a and bit line 343a to bring out a reference current I
REFFrom drain electrode terminal 561 to source terminal 562 and enter bit line 343b.This reference current I
REFBe provided to reference line 346a via row decoder 342.
The current circuit 310 that sinks of this sampling and maintenance comprises transistor 522, and it has drain terminal and reference line 346a couples to receive reference current I
REFGate terminal optionally couples with reference line 346a via change-over switch 526.Change-over switch 526 in this illustration is to use singlely to be had a grid by transistor and is coupled to control signal S1.Also can use other substitute technology to implement change-over switch 526.For example, change-over switch 526 can be used one group of complementation to have parallel guiding path by transistor and complementary grid control signal is provided.
When change-over switch 526 was closed, this transistor 522 was that diode-type connects to constitute a current mirror 520 with transistor 524, and transistor 524 is set up the operating point of this current mirror 520.Transistor 524 has drain terminal and data line 332a and couples to import this and sink electric current I
SINK, and this sinks electric current I
SINKIt is reference current I to have a size
REFOne funtcional relationship of size.For example, sink electric current I
SINKA size can be roughly and reference current I
REFSizableness.
In this illustrative example, current mirror 520 is to be implemented by transistor 522,524.Alternatively also can use other technology to implement current mirror 520.
Keeping capacitor C1 525 is to couple between the gate terminal and source terminal of transistor 522,524.When change-over switch 526 was opened, this bias voltage kept capacitor C1 525 to set up thus and maintains the gate terminal of transistor 522,524.This keeps the size of capacitor C1 525 enough can bias voltage to be maintained between the gate terminal and source terminal of transistor 522,524 in the maintenance interval of sense operation greatly, thus transistor 522,524 be held open, and between sinking electric current I
SINKWith reference current I
REFBetween electric current difference (if the words that have), roughly be definite value in interval maintenance of this retention time.
Be understandable that, by keeping capacitor C1 525 that bias voltage is maintained between the gate terminal of transistor 522,524 and the source terminal in the retention time interval perhaps and can change because of electric charge leaks and change-over switch 526 is opened transient noise.
The source terminal that load transistor 530 has a drain terminal and transistor 522,524 couples.Load transistor 530 has the one source pole terminal and a negative booster circuit 532 couples, and it provides a negative bias voltage.
Electric current by load transistor 530 is the reference current I at transistor 522
REFThe electric current I that sinks with transistor 524
SINKCombination.Electric current by load transistor 530 is to be got by the voltage transitions of load transistor 530 with the source terminal of transistor 522,524.
The sinking current circuit 310 and also can comprise an operational amplifier 540 of this sampling and maintenance.Service voltage VDD and negative booster circuit 532 provide bias voltage operational amplifier 540 so far.In this illustration, this operational amplifier 540 have negative input 544 with couple.This operational amplifier 540 has positive input 546 and couples with reference line 346a.Since the effect of this two input end 544 and 546 virtual grounds, the reference voltage V on the reference line 346a
TREF Operational amplifier 540 bias voltages are roughly earth potential thus.This noun " roughly " mainly is to be used for representing between two input ends 544 and 546 because the voltage difference that the non-zero input off-set voltage in the operational amplifier 540 is caused.
The output 542 of operational amplifier 540 is optionally coupled by the node 572a that change-over switch 570 is connected with load transistor gate.Change-over switch 570 in this illustration is to use singlely to be had a grid by transistor and is coupled to control signal S1.Also can use other substitute technology to implement change-over switch 570.For example, change-over switch 570 can be used one group of complementation to have parallel guiding path by transistor and complementary grid control signal is provided.
Close change-over switch 570 set up one since then the output 542 of operational amplifier 540 to the negative feedback path of positive input 546.When change-over switch 570 is closed, the voltage that is provided by the output 542 of operational amplifier 540 is biased to the grid of load transistor, it can set the operating voltage between node 572a, 572b soon in a sample time interval of sense operation.
This negative feedback path can be explained by following description.The voltage increase of operational amplifier 540 positive inputs 546 can cause exporting 542 voltage to be increased, and has therefore increased the voltage of load transistor 530 grids.So can cause of the voltage increase of load transistor 530 grids, and cause the voltage of load transistor 530 drain electrodes to reduce, and reduce the source voltage of transistor 522,524 subsequently to source electrode.So can cause the grid voltage of transistor 522,524 to reduce, it can be because have reduced the drain voltage of transistor 522 via the relation that is connected with change-over switch 526.Because the drain electrode of transistor 522 is connected with the positive input 546 of operational amplifier 540, so can cause the voltage of operational amplifier 540 positive inputs 546 to reduce again.So can be opposite with the direction that positive input 546 voltages of originally planning change.Thereby this feedback is born.
Keeping capacitor C2 574 is to couple between the gate terminal and the second conducting terminal of load transistor 530.When change-over switch 570 was opened, this feedback path was exported 542 from node 572a releasing connection by anergy.Operating voltage between node 572a and 572b is established, and therefore grid to the source terminal of load transistor 530 keeps capacitor C2 574 to set up thus.Change-over switch 570 is opened the output 542 that can prevent operational amplifier 540 in this retention time interval, produce noise because of the change of the voltage of node 572a.
This keeps the size of capacitor C2 574 enough can keep the interval that operating voltage is maintained between node 572a and the 572b greatly.This keeps capacitor C2 574 to apply certain grid basically to source voltage in load transistor 530, so be certain value by the electric current of load transistor 530 haply keeping interval the maintenance.Be understandable that the operating voltage between node 572a and the 572b reaches so the electric current of load transistor 530 perhaps can a little change because of the transient noise of electric charge leakage and change-over switch 526 unlatchings in the retention time interval.
The sensing amplifier 571 of block 330 has one and couples with reference line 346a with reference to input or node 595, and has sensing input or node 590 couples with data line 332a.As described before, reference voltage on the reference line 346a and reference input 595 are to be biased into V by operational amplifier 540
TREF, be to be earth potential in this example.
Current sensor I
SENSE, it is for reading electric current I
CELLSink electric current I with this
SINKBetween a difference, the sense node 590 to sensing amplifier 571 is provided.This current sensor I
SENSEBe by with equivalent load capacitance C in the retention time interval
Load1Charging and convert a voltage of sense node 590 to.Sensing amplifier 570 are response sensing inputs 590 with reference to the voltage difference between the input 595, and generation is used to refer to and is stored in this and chooses a output signal 576 in the storage unit 510, it is triggered by sensing enable signal SEN.
Sampling shown in Fig. 6 display operation Fig. 5 and maintenance sink current circuit 310, be stored in a sequential chart of the data value in this selected storage unit 510 with sensing.Be understandable that, the sequential chart among Fig. 6 be through simplification and not equal proportion illustrate.
In time T 0,1 signal 586 that discharges is issued with unlatching discharge transistor 584 and with reference line 346a and couples, and therefore will be with reference to input 595 ground connection.2 signals 582 that discharge are issued with unlatching discharge transistor 580 and with data line 332a and couple, and therefore sensing are imported 590 ground connection.
In time T 1, column decoder 322 response address signals and apply and read bias voltage V
WL-READTo the character line 324a that couples with these storage unit that is selected 510 grids, row decoder 326 response address signals and apply and read bias voltage V
BL-READTo the bit line 328a that couples with these storage unit that is selected 510 drain terminal 511, and bit line 328b and data line 332a are coupled.The bias voltage that is applied to character line 324a and bit line 328a brings out and reads electric current I CELL from draining terminal 511 to source terminal 512, and enters bit line 328b and data line 332a.
As shown in Figure 6, continue to open, and data line 332a and sensing input 590 continue to keep ground connection at the sampling range between time T 1 and T2 so 2 signals 582 that discharge continue to be issued discharge transistor 580.
1 signal 586 that discharges is closed discharge transistor 584, and control signal S1 is issued to close change-over switch 526 and 570.So can set up the operating point that sinks current circuit 310 of this sampling and maintenance, it comprises the operating voltage of setting between node 572a and 572b.
Closing change-over switch 526 can make the transistor 522 that diode-type connects in the current mirror 520 couple to receive reference current I with reference line 346a
REFTransistor 524 in the current mirror 520 imports this from data line 332a and sinks electric current I
SINKWith the reference current I in the response transistor 522
REFSize.
Close change-over switch 570 and can set up the negative feedback path of the output 542 of this operational amplifier 540 to positive input 546.The voltage that is provided by the output 542 of operational amplifier 540 is biased to node 572a, and to set the operating voltage between node 572a, 572b, it is to be connected between the gate terminal and source terminal of load transistor 530.
The operation of the feedback path of operational amplifier 540 is by the voltage difference of amplifying between positive input 546 and the negative input 544, and forces the voltage of positive input 546 roughly to equate to reduce its difference with the voltage of negative input 544.So allow the operating point that sinks current circuit 310 of this sampling and maintenance to set up soon.
Except the transistor 522 that diode-type connects, close change-over switch 526 by the grid that this transistor 522 is provided to the direct-path of drain terminal to reduce the loop reaction time of this feedback path.In addition, capacitor C1 525 provides a positive feed path between the AC signal of transistor 522,524 gate terminal to the second conducting terminals, and it also reduces the loop reaction time of this feedback path.
Change-over switch 570 and capacitor C1 525 and C2 574 also provide the stability of operational amplifier 540 feedback paths.The stability of this feedback path is with the pole location to transfer equation formula between the output 542 is relevant from positive input 546.Feedback path in Fig. 5 comprises three limits, and most important limit is in the output 542 of operational amplifier 540, and because the limit of capacitor C1 525 and change-over switch 526.Limit in operational amplifier 540 outputs 542 is the big relatively RC constant that big output resistance produced that the most important thing is because of operational amplifier 540, and because the grid capacitance of load transistor 530 and the big relatively equivalent capacity of capacitor C2 574.Capacitor C1 525 and change-over switch 526 also provide the forward feed path of AC signal of transistor 522 source electrodes to drain electrode, thus transistor 522 drain to the equivalent resistance of source electrode be relatively little.Consequently, the limit that capacitor C1 525 and change-over switch 526 cause is away from most important limit, and it has improved the stability of this loop.
In the case, in the stable high speed operation point that sinks current circuit 310 that can reach this sampling and maintenance from the sampling range of time T 1 to T2.
Once use this feedback path to set up after the operating point that sinks current circuit 310 of this sampling and maintenance, time T 2 this control signal S1 open change-over switch 526 and 570 and 2 signals 582 that discharge closed discharge transistor 580.
Open change-over switch 526 gate terminal of transistor 522,524 is removed connection from the drain terminal of transistor 526.Keep bias voltage that capacitor C1 525 maintains transistor 522,524 gate terminal with provide fixing basically grid to the source electrode bias voltage to transistor 522,524, so the maintenance interval of transistor 522,524 after time T 2 is held open.Be understandable that, perhaps can a little change by the bias voltage that keeps capacitor C1 525 to be maintained because of the transient noise of electric charge leakage and change-over switch 526 unlatchings in the retention time interval.
Open change-over switch 570 and will export 542 and remove connect from controlling node 572a, it can be with the feedback path anergy, and produces noises in output 542 can prevent that Control Node 572a voltage from changing the time.Operating voltage between node 572a, 572b is by keeping capacitor C2 574 to be kept.Keep capacitor C2 574 to apply fixing basically grid to a source electrode bias voltage and give load transistor 530, so the electric current of load transistor 530 is keeping interval the maintenance to fix basically.Be understandable that,, reach the therefore electric current of load transistor 530 by the operating voltage that Control Node 572a is maintained, perhaps can a little change in this retention time interval because of the transient noise of electric charge leakage and change-over switch 570 unlatchings.
Current sensor I
SENSE, it reads electric current I for this
CELLSink electric current I with this
SINKBetween a difference, provide to the sensing of sensing amplifier 571 input 590.
This current sensor I
SENSEBe by with equivalent load capacitance C
Load1Charging and convert a voltage of sensing input 590 to.If the voltage in the sensing input 590 can be along curve 600 this to be selected storage unit 510 be when low critical conditions, and if can be along curve 610 this to be selected storage unit 510 be when a higher critical conditions.
In time T 3, sensing amplifier 570 for respond and sensing input 590 with reference to input 595 voltage difference between the two, can produce and be used to refer to this data value of choosing in the storage unit 510 and get an output signal V
OUTIn Fig. 6, V
OUTIf be one first voltage 620 this to be selected storage unit 510 be when low critical conditions, if but one second voltage 630 this to be selected storage unit 510 be when a higher critical conditions.
Because sampling and keep sink the common mode structure that current circuit 310 is provided, so the noise that is present in negative stepup transformer 532 basically not can for sensing import 590 with reference to input 595 voltage ratio between the two any influence is arranged.Any noise that negative stepup transformer 532 is taken place can cause changing with like reference unit 560 both current capacities in storage unit 510, so read electric current I
CELLSink electric current I with this
SINKBetween a difference remain basically unchanged keeping interval basically.In addition, give transistor 522,524 and 530 because keep capacitor C1 525, C2 574 to apply fixing basically grid to a source electrode bias voltage, the noise of any injection source electrode like this can cause changing similarly at grid voltage, so the grid of transistor 522,524 and 530 to source electrode bias voltage remains definite value basically, and the change of drain voltage also is very little.Therefore, the correctness that has compared result of noise is not influence basically.
Because the voltage of the sensing of sensing amplifier 571 input 590 is and reads electric current I
CELLSink electric current I with this
SINKBetween difference rather than the whole electric current I that sinks
SINKRelevant, the variation in voltage of source terminal 512 can reduce in the selected storage unit 510.Like this then can when the storage unit in this array 320 is carried out the source terminal sensing, reduce and read electric current I
CELLChange.Consequently, can become in the voltage distribution of sensing input 590 and comparatively tighten.
In addition, use the current circuit 310 that sinks of sampling and maintenance to come bias voltage, rather than use reference current I with reference to input 595
REFWith equivalent load capacitance C
Load2Charging allows higher operating speed.When using reference current I
REFCome to the time with reference to input 595 chargings, arrive the required time of a reference voltage therewith the critical voltage of reference unit be associated.Therefore, sense operation must just be carried out after reference mode is obtained a period of time of reference voltage level.The current circuit 310 that sinks that uses sampling and keep comes the bias voltage reference mode, arrives the required time ratio of reference voltage and uses reference current I
REFCome coming soon with reference to input 595 chargings.
Fig. 7 shows the simplified diagram that sinks current circuit 310 of the sampling and the maintenance of second embodiment of the invention.In Fig. 7, load transistor 530 is to use the PMOS transistor to implement.The positive input 546 of operational amplifier 540 is to couple with ground, and negative input 544 is to couple with reference line 346a, so can set up a negative feedback path between output 542 and negative input 544.
Fig. 8 shows the simplified diagram that sinks current circuit 310 of the sampling and the maintenance of third embodiment of the invention.In Fig. 8, the gate terminal of transistor 522 optionally by change-over switch 526 with couple.Use change-over switch 526 with couple rather than the input 546 of operational amplifier 540 can reduce the reaction time that the electric capacity that couples with reference line 346a improves this loop.
Fig. 9 shows the simplified diagram that sinks current circuit 310 of the sampling and the maintenance of fourth embodiment of the invention, and it comprises one and switches circuit and be set at identical with the direct current effect of offsetting this operational amplifier 540 will import 546,544 voltage.Before carrying out sense operation, change- over switch 902 and 906 is opened by sending signal S2.Consequently, negative input 544 couples with ground and positive output 546 couples with node 908, and it sets voltage by capacitor C 3 900 with identical between the skew of importing between 546,544.This change-over switch 902 and 906 is closed then, and opens change-over switch 904.So node 908 and ground are coupled, it provides a path such as gradeizations via capacitor C 3, and therefore to import 544 voltage identical with the voltage of importing 546 in setting.
Though the present invention is described with reference to embodiment, right the present invention's creation is not subject to its detailed description.Substitute mode and to revise pattern be to advise in previous description, and other substitute mode and the modification pattern will be thought by the personage who has the knack of this technology and.Particularly, all have be same as in fact member of the present invention in conjunction with and reach the identical result in fact with the present invention, neither disengaging spiritual category of the present invention.Therefore, all these substitute modes and to revise pattern be to be intended to drop among claim scope of the present invention and the category that equipollent defined thereof.
Claims (10)
1. memory storage comprises:
One storage array has a data line and a reference current line;
One sinks current circuit, comprises a capacitor that couples via a switching switch and this data line; And
One sense amplifying circuits and this data line and this reference current line couple.
2. memory storage as claimed in claim 1, wherein this sinks current circuit and also comprises one second capacitor that optionally couples with this reference current line via one second change-over switch.
3. memory storage as claimed in claim 1 also comprises a reference current source arrangement providing a reference current to this reference current line, and wherein:
This storage array arrangement with provide one read electric current in this array one be selected storage unit to this data line;
This sink current circuit can respond one between the size of first and second internodal operating voltage and certainly this data line import one and sink electric current, this sinks current circuit and comprises that a feedback path is the size of this reference current of response and can be used to set between this first and second internodal this operating voltage, this capacitor is coupled between this first and second node to keep this operating voltage, reach this change-over switch and can be used to this feedback path of activation in a very first time interval, and this feedback path of anergy in one second time interval after this very first time interval; And
This sense amplifying circuits is in response to this reads electric current and this and sinks difference between the electric current in this second time interval, is used to refer to and is stored in the output signal that this is selected the data value in the storage unit and produce one.
4. memory storage as claimed in claim 3, wherein this sinks current source and comprises:
One current mirror, itself and this data line and this reference current source couple, this current mirror can receive this reference current from this reference current source, and can be in response to this reference current size that is received certainly this data line import this and sink electric current;
One load transistor, have first and second a conducting terminal and a control terminal, this first conducting terminal and this current mirror couples and can receive this reference current and this sinks electric current from this current mirror, wherein this capacitor is coupled between this control terminal and the second conducting terminal to keep this operating voltage in this second time interval on this load transistor; And
One operational amplifier, this operational amplifier have one first input and couple with a bias voltage, and one second input couples with this reference current source, and have an output selectivity ground and couple via this control terminal of this change-over switch and this load transistor.
5. memory storage as claimed in claim 4, wherein:
This current mirror comprises the first transistor and transistor seconds, and each has and comprises a control terminal and the first and second conducting terminals, this control terminal of this first transistor and this control terminal of this transistor seconds couple, this of this first transistor first conducting terminal and this reference current source couple, and this second conducting terminal of this first conducting terminal of this transistor seconds and this transistor seconds couples;
This second conducting terminal of this of this load transistor first conducting terminal and this first and this transistor seconds couples; And
This sink current circuit also comprise one second capacitor be coupled in this first and this second conducting terminal of this control terminal of this transistor seconds and this first and this transistor seconds between.
6. memory storage as claimed in claim 4, wherein this sink current circuit also comprise one second change-over switch can in this very first time interval, operate be used for this first and this control terminal of this transistor seconds be coupled to one second bias voltage, and can in this second time interval, operate be used for this first and this control terminal of this transistor seconds remove from this second bias voltage and couple.
7. memory storage as claimed in claim 6, wherein this first and this control terminal of this transistor seconds optionally couple via this second input of this second change-over switch and this operational amplifier.
8. the method for sensing one storage unit, this method comprises:
Applying one is biased into this storage unit and brings out one with this storage unit certainly and read current to a data line;
Provide a reference current from a reference current source;
Response one between the size of first and second internodal operating voltage and certainly this data line imports one and sinks electric current, comprising:
Use a feedback path in a very first time interval, to respond the size of this reference current and can be used to set between this first and second internodal this operating voltage; And
This operating voltage that maintenance has nothing to do with this feedback path between between this first and second node in one second time interval after this very first time interval; And
Reading electric current and this according to this sinks difference decision between the electric current be stored in a data value in this storage unit in this second time interval.
9. the method for sensing one storage unit as claimed in claim 8 also comprises:
Read electric current and this in this second time interval sinks this difference between the electric current and sets a voltage on this sense node according to this, and bias voltage one reference mode to a reference voltage, and wherein the difference that comprises according to this reference voltage of this voltage of this sense node and this reference mode of this decision step of being stored in this data value in this storage unit decides this stored data value.
10. memory storage comprises:
One storage array, can be in this storage array one choose storage unit and provide one to read current to a data line;
One reference current source can provide a reference current;
One sinks current circuit with this data line couples, this sinks current circuit can sink electric current from this data line importing one, this sinks current circuit and can be used to that activation one feedback path sinks electric current to set up this in a very first time interval, and this feedback path of anergy and keep this to sink electric current in one second time interval after this very first time interval; And
One sense amplifying circuits and this data line couple, this sense amplifying circuits is in response to this reads electric current and this and sinks a difference between the electric current in this second time interval, is used to refer to and is stored in the output signal that this is selected the data value in the storage unit and produce one.
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| CN 201010156256 CN102208207B (en) | 2010-03-30 | 2010-03-30 | System for sensing sink current based on sampled and maintained source cathode terminals |
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| CN 201010156256 CN102208207B (en) | 2010-03-30 | 2010-03-30 | System for sensing sink current based on sampled and maintained source cathode terminals |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103247328A (en) * | 2012-02-09 | 2013-08-14 | 北京兆易创新科技股份有限公司 | Identification method of memory cell and sense amplifier |
| CN113393882A (en) * | 2020-03-12 | 2021-09-14 | 力旺电子股份有限公司 | Differential sensing device with wide sensing margin |
| CN115236534A (en) * | 2022-07-29 | 2022-10-25 | 苏州浪潮智能科技有限公司 | Server RTC battery voltage detection device and detection method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1767057A (en) * | 2004-10-30 | 2006-05-03 | 海力士半导体有限公司 | Semiconductor memory device for low power condition |
| US7082058B2 (en) * | 2003-11-24 | 2006-07-25 | Samsung Electronics Co., Ltd. | Non-volatile semiconductor memory device having sense amplifier with increased speed |
| CN1949391A (en) * | 2005-10-13 | 2007-04-18 | 三星电子株式会社 | Semiconductor memory device having metal-insulator transition film resistor |
-
2010
- 2010-03-30 CN CN 201010156256 patent/CN102208207B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7082058B2 (en) * | 2003-11-24 | 2006-07-25 | Samsung Electronics Co., Ltd. | Non-volatile semiconductor memory device having sense amplifier with increased speed |
| CN1767057A (en) * | 2004-10-30 | 2006-05-03 | 海力士半导体有限公司 | Semiconductor memory device for low power condition |
| CN1949391A (en) * | 2005-10-13 | 2007-04-18 | 三星电子株式会社 | Semiconductor memory device having metal-insulator transition film resistor |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103247328A (en) * | 2012-02-09 | 2013-08-14 | 北京兆易创新科技股份有限公司 | Identification method of memory cell and sense amplifier |
| CN103247328B (en) * | 2012-02-09 | 2016-09-14 | 北京兆易创新科技股份有限公司 | The recognition methods of a kind of memory element and a kind of sense amplifier |
| CN113393882A (en) * | 2020-03-12 | 2021-09-14 | 力旺电子股份有限公司 | Differential sensing device with wide sensing margin |
| CN115236534A (en) * | 2022-07-29 | 2022-10-25 | 苏州浪潮智能科技有限公司 | Server RTC battery voltage detection device and detection method |
| CN115236534B (en) * | 2022-07-29 | 2023-11-14 | 苏州浪潮智能科技有限公司 | Device and method for detecting voltage of RTC battery of server |
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| CN102208207B (en) | 2013-11-06 |
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