CN102196201A - Signal readout circuit, module and method of image sensor - Google Patents
Signal readout circuit, module and method of image sensor Download PDFInfo
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- CN102196201A CN102196201A CN2011101724685A CN201110172468A CN102196201A CN 102196201 A CN102196201 A CN 102196201A CN 2011101724685 A CN2011101724685 A CN 2011101724685A CN 201110172468 A CN201110172468 A CN 201110172468A CN 102196201 A CN102196201 A CN 102196201A
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Abstract
The invention relates a signal readout module of an image sensor. The signal readout module comprises a reset transistor with two ends and one gate, and a reset signal adjusting module coupled with the gate, wherein one of the two ends is coupled to a floating diffusion point and the other of the two ends is coupled to a reset voltage; and the reset signal adjusting module is configured in such a manner that a higher gate voltage is provided to the gate within the predetermined time period for resetting the floating diffusion point, so that the difference between the gate voltage and the threshold voltage of the reset transistor is higher than or equal to the reset voltage.
Description
Technical field
The present invention relates to electronic circuit, and relate more specifically to signal read circuit, module and the method for imageing sensor.
Background technology
Along with development of semiconductor, imageing sensor has been widely used in the field that various needs carry out digital imagery, for example in the electronic product such as digital camera, Digital Video.According to the difference of opto-electronic conversion mode, imageing sensor can be divided into two classes usually: charge coupled device (Charge Coupled Device, CCD) imageing sensor and complementary metal oxide semiconductors (CMOS) (CMOS) imageing sensor.Wherein, cmos image sensor has advantages such as volume is little, low in energy consumption, production cost is low, therefore, cmos image sensor for example is easy to be integrated in the mancarried electronic aids such as mobile phone, notebook computer, panel computer, uses as the shooting module that the digital imagery function is provided.
The pixel cell of cmos image sensor adopts 3T structure and 4T structure usually, is used for producing the corresponding signal of telecommunication in response to the sensitization of pixel cell, and the signal that also promptly is used for imageing sensor is read.With the 4T structure is example, as shown in Figure 1, comprises 4 transistors in the pixel cell 10 of 4T structure, is respectively that transmission transistor 11, reset transistor 12, source are followed transistor 13 and gate transistor 14.In the starting stage that gate transistor 14 is opened (promptly the row at this pixel place is by gating), transmission transistor 11 is closed, and after sensitization after a while, photo-generated carrier is stored in the photodiode 15; Then, open reset transistor 12, the diffusion point 102 of floating is resetted, the variation of voltage follow grid voltage of the source end of transistor 13 is followed in the source, thereby circuit 10 is at reset level of output 103 outputs; Then, close reset transistor 12, open transmission transistor 11, photogenerated charge in the photodiode 15 is transferred on the diffusion point 102 of floating, thereby the level of the diffusion point 102 of floating changes, the variation of voltage follow grid voltage of the source end of transistor 13 is followed in the source, thereby circuit 10 is in signal level of output 103 outputs; The signal processing circuit (not shown) that is connected with these pixel cell 10 electricity promptly obtains photoelectricity and transforms the signal that produces operations such as this reset level and signal level compare.
In this process, the amplitude of signal is relevant with the height of diffusion point 102 reset levels that obtain of floating, and reset level is high more just to help obtaining bigger signal amplitude more.Yet,, therefore will cause the dynamic range of imageing sensor big inadequately because the intrinsic problems such as threshold value loss of reset transistor 12 in reseting procedure, can not be transferred to the diffusion point 102 of floating with the harmless lost territory of power level usually.
Summary of the invention
As seen, need provide a kind of signal read circuit of imageing sensor, this circuit can reset to sufficiently high level to the diffusion point of floating.
According to an aspect of the present invention, provide a kind of signal of imageing sensor to read module, comprise: reset transistor, comprise two ends and a grid, an end in described two ends is coupled to the diffusion point of floating, another end is coupled to resetting voltage, and reset signal adjusting module, be coupled to described grid, described reset signal adjusting module is configured to: in the scheduled time that the described diffusion point of floating is resetted, higher grid voltage is provided for described grid, makes the difference of threshold voltage of described grid voltage and described reset transistor be higher than or equal described resetting voltage.
Because in the scheduled time that the described diffusion point of floating is resetted, the difference of the threshold voltage of described grid voltage and described reset transistor is higher than or equals described resetting voltage, has therefore overcome owing to the threshold value loss makes to float to spread the defective that the level of putting can not be brought up to resetting voltage.
According to another aspect of the present invention, a kind of signal read circuit of imageing sensor is provided, comprise: reset transistor, comprise two ends and a grid, one in described two ends is coupled to the diffusion point of floating, and another is coupled to gating signal, described grid is coupled to reset signal, wherein, described gating signal is used for the pixel at the described reset transistor of gating place, and described reset signal is used for the described diffusion point of floating is resetted; And reset signal adjusting module, be used for described reset transistor is coupled to described reset signal, described reset signal adjusting module comprises: adjust transistor, comprise two ends and a grid, an end in described two ends is coupled to the described grid of described reset transistor, and the transistorized described grid of described adjustment is coupled to power supply; And handover module, thereby be configured to make: when the pixel at described reset transistor place during by gating in response to control signal, transistorized another end of described adjustment has been coupled to power supply, and when the signal charge of described pixel by when the described diffusion point of floating shifts, transistorized another end of described adjustment has been coupled to described reset signal.
Because when the pixel at described reset transistor place during by gating, gating signal by the parasitic capacitance feedthrough between reset transistor end and the grid to grid and be superimposed upon on the grid voltage of reset transistor before the gating, obtained the grid voltage that increases thus, and because transistorized another end of described adjustment has been coupled to power supply, therefore it is bigger to adjust transistorized conducting resistance, and then this adjustment transistor provides bigger RC to postpone, make the grid voltage that increases to keep, thereby the diffusion point of floating can be reset to the level roughly the same with gating signal.
According to still another embodiment of the invention, the method that provides a kind of signal that is used for image sensor pixel to read, comprise: floating of described image sensor pixel spread in the scheduled time that resets by reset transistor, higher grid voltage is provided for the grid of described reset transistor, makes the difference of threshold voltage of described grid voltage and described reset transistor be higher than or equal resetting voltage.
Description of drawings
Read following detailed description by the reference accompanying drawing, can more easily understand features, objects and advantages of the invention non-limiting example.Wherein, same or analogous Reference numeral is represented same or analogous device:
Fig. 1 shows a kind of basic structure of pixel cell of existing imageing sensor,
Fig. 2 shows the signal of imageing sensor according to an embodiment of the invention and reads module,
The signal that Fig. 3 shows Fig. 2 is read an exemplary operational mode of module,
The signal that Fig. 4 shows Fig. 2 is read another exemplary operational mode of module,
The signal that Fig. 5 shows Fig. 2 is read an exemplary implementation of module,
The signal that Fig. 6 shows Fig. 5 is read an exemplary operational mode of module,
The signal that Fig. 7 shows Fig. 5 is read an exemplary concrete formation of module,
The signal that Fig. 8 shows Fig. 5 is read another exemplary concrete formation of module,
Fig. 9 shows the signal of imageing sensor according to another embodiment of the invention and reads module,
The signal that Figure 10 shows Fig. 9 is read an exemplary operational mode of module,
The signal that Figure 11 shows Fig. 9 is read an exemplary formation of module,
The signal that Figure 12 shows Figure 11 is read an exemplary operational mode of module.
Embodiment
In the specific descriptions of following preferred embodiment, will be with reference to the appended accompanying drawing that constitutes a part of the present invention.The mode of appended accompanying drawing by example shows and can realize certain embodiments of the present invention.The embodiment of example is not intended to limit according to all embodiment of the present invention.Be appreciated that and under the prerequisite that does not depart from scope of the present invention, can utilize other embodiment, also can carry out the modification of structural or logicality.Therefore, following specific descriptions are also nonrestrictive, and scope of the present invention is limited by appended claim.
Cmos image sensor adopts the dot structure of 3T or 4T usually.The 3T dot structure is meant in each pixel of cmos image sensor pel array, except the photodiode that is used for sensitization, also comprises 3 transistors, is respectively that transistor and row selecting transistor are followed in reset transistor, source.The 4T dot structure has then further increased a transmission transistor on the basis of 3T dot structure.For signal processing circuit of the present invention and processing method, it both can be handled the signal of 3T dot structure imageing sensor, also can handle the signal of 4T dot structure imageing sensor, in the following embodiments, be that example describes only with the 4T dot structure, but the imageing sensor that it should be understood that the other types that comprise 3T dot structure or other dot structures also belongs to scope of the present invention.
According to one embodiment of present invention, the method that provides a kind of signal that is used for image sensor pixel to read, comprise: floating of this image sensor pixel spread in the scheduled time that resets by reset transistor, higher grid voltage is provided for the grid of this reset transistor, makes the difference of threshold voltage of this grid voltage and this reset transistor be higher than or equal resetting voltage.Because the difference of the threshold voltage of this grid voltage and this reset transistor is higher than or equals resetting voltage, resetting voltage can be transferred to this diffusion point of floating via the harmless lost territory of this reset transistor.Describe the signal of the imageing sensor can be used to implement this method below in conjunction with accompanying drawing and read module.
Fig. 2 shows the signal of imageing sensor according to an embodiment of the invention and reads module 20.The signal of this example is read module 20 and is comprised transmission transistor 21, reset transistor 22, and transistor 23 is followed in the source, gate transistor 24, photodiode 25, reset signal adjusting module 26.As shown in the figure, a termination of reset transistor 22 is recovered position voltage 201, for example V
DD, the other end is coupled to the diffusion point 202 of floating, and grid is coupled to reset signal 204 by reset signal adjusting module 26, and the signal of describing Fig. 2 below in conjunction with Fig. 3, Fig. 4 is read the course of work of module 20.
The signal that Fig. 3 shows Fig. 2 is read an exemplary operational mode of module 20.As shown in the figure, at moment t31, gating signal 206 is effective, read pixel that module 20 is associated by gating with signal, reset signal adjusting module 26 is given the level level that the grid of reset transistor 22 provides the reset signal 205 of adjustment and hold reset signal 205 is improving in time T 31 simultaneously, the variation of voltage follow grid voltage of the source end of transistor 23 is followed in the source, thereby circuit 20 is at reset level of output 203 outputs, at moment t32, the reset signal 205 of this adjustment becomes low level, promptly finishes the reset operation to the diffusion point 202 of floating; In period T32 from moment t33 to moment t34, transmission signals 207 is effective, signal charge in the photodiode 25 is transmitted towards the diffusion point 202 of floating, thereby the level of the diffusion point 202 of floating changes, the variation of voltage follow grid voltage of the source end of transistor 23 is followed in the source, thereby circuit 20 is in signal level of output 203 outputs; The signal processing circuit (not shown) that is connected with these circuit 20 electricity promptly obtains photoelectricity and transforms the signal that produces operations such as this reset level and signal level compare.Become low level in moment t35 gating signal 206, read the pixel that module 20 is associated with signal and be turned off.
As shown in the figure, owing to improve with respect to initial reset signal 204 through the reset signal of adjusting 205 in time T 31, resetting voltage 201 can be transferred to the diffusion point 202 of floating via reset transistor 22 harmless lost territories.Particularly, signal 205 is provided for the grid of reset transistor 22, and in to diffusion 202 times that reset of point of floating, higher grid voltage is provided for this grid, the difference of the threshold voltage of this grid voltage and reset transistor 22 is higher than or equals the resetting voltage that drain terminal received 201 of this reset transistor 22, therefore, when the level of the diffusion point 202 of floating was drawn high resetting voltage 201, reset transistor 22 can not end.
The signal that Fig. 4 shows Fig. 2 is read another exemplary operational mode of module 20.As shown in the figure, reset signal 204 and the reset signal of adjusting 205 are the pulse signals that are positioned at the valid period of gating signal 206, in the time T from moment t41 to moment t42 41, the diffusion point 202 of floating is resetted, the reset signal of adjusting at this moment 205 improves with respect to initial reset signal 204, and the difference of the level of the reset signal 205 of adjustment and the threshold voltage of reset transistor is higher than or equals resetting voltage 201.For example, resetting voltage 201 is 3.5V, the threshold voltage of reset transistor 22 is 0.7V, the level of the reset signal of adjusting 205 is higher than or equals 4.2V (for example 5V), thereby during the diffusion point 202 of floating was resetted, resetting voltage 201 can break-evenly be transferred to the diffusion point 202 of floating.
Need to prove that the reset signal 204 shown in Fig. 4 is identical with the pulse duration of the reset signal of adjusting 205.Those skilled in the art understands, the pulse duration of the reset signal of adjusting 205 can be different from the pulse duration of reset signal 204, the reset signal of adjusting 205 can have the skew of appropriateness with respect to reset signal 204, as long as meet the following conditions: to floating diffusion point in 202 scheduled times that reset, the difference of the level of the reset signal 205 of adjustment and the threshold voltage of reset transistor 22 is higher than or equals resetting voltage 201.Herein, " scheduled time " can be to floating diffusion 202 times that reset of point, for example T31 (Fig. 3), T41 (Fig. 4), or to the parts of 202 times that reset of diffusion point of floating, should " scheduled time " thereby long enough makes resetting voltage 201 the to be transferred to diffusion point 202 of floating.
The signal that Fig. 5 shows Fig. 2 is read an exemplary implementation of module.As shown in the figure, the resetting voltage 501 that the drain terminal of reset transistor 22 receives is reset voltage pulse, reset signal adjusting module 26 comprises adjusts transistor 51 and handover module 52, wherein, adjust transistor 51 and comprise end 511, end 512 and grid 513, end 511 is coupled to the grid of reset transistor 22, and the grid 513 of adjusting transistor 51 is coupled to power supply V
DD, another end 512 is coupled to power supply V by handover module 52
DDPerhaps reset signal 204.Be coupled to power supply V owing to adjust the grid 513 of transistor 51
DD, and to adjust transistor 51 be NMOS, adjustment transistor 51 is in opening always.
The signal that Fig. 6 shows Fig. 5 is read an exemplary operational mode of module 50.Be in operation, thereby handover module 52 makes in response to control signal 502: the end 512 at control signal 502 adjustment transistor 51 during for low level is coupled to power supply V
DD, the end 512 of adjusting transistor 51 in control signal 502 during for high level is coupled to reset signal 204; In the time that promptly illustrates in the drawings, before moment t63 and after the moment t64, the end 512 of adjusting transistor 51 is coupled to power supply V
DD, between moment t63 and moment t64, the end 512 of adjusting transistor 51 is coupled to reset signal 204.
Figure (b) shows the end 512 of adjusting transistor 51 and is coupled to power supply V
DDSituation, suppose V
DDBe 3.5V, the threshold voltage of adjusting transistor 51 is 0.7V, and the voltage of end 511 is about 2.8V so, and the initial voltage that also promptly is carried in the grid of reset transistor 22 is about 2.8V.Owing to the voltage of the end 512 of adjusting transistor 51 at this moment is identical with the voltage of grid 513, the conducting resistance of adjusting transistor 51 is very big, the end 511 of adjusting transistor 51 can be regarded as floats, when the end of reset transistor 22 receives reset voltage pulse 501, the gate leakage capacitance feedthrough of this pulse 501 by reset transistor 22 is to the grid of reset transistor 22 and be superimposed upon on the initial voltage 2.8V of grid, consequently, the voltage of the grid of reset transistor 22 is increased to about about 5V, the difference of the threshold voltage of this value and reset transistor 22 is higher than the high level 3.5V of reset pulse 501, and, because it is very big to adjust transistor 51 conducting resistance at this moment, the grid voltage of this raising can be held, and is transferred to the diffusion point 202 of floating thereby make 3.5V can can't harm the lost territory.
Figure (c) shows the situation that the end 512 of adjusting transistor 51 is coupled to reset signal 204.At moment t63 to t64 constantly, reset signal 604 is in low level, therefore, the gate source voltage of adjusting transistor 51 is bigger, because transistorized conducting resistance and gate source voltage are inversely proportional to, the conducting resistance of adjusting transistor 51 this moment is less, and the voltage of therefore adjusting the end 511 of transistor 51 can be pulled to low level within a short period of time, can be similar to and think that reset transistor 22 is closed at moment t63.Then, transmission transistor 21 is unlocked under the control of transmission signals 607, and the level of the diffusion point 202 of floating becomes signal level from reset level.
The essence of the exemplary operational mode of Fig. 6 is in the scheduled time that resets, between the grid of reset transistor and reset signal, provide a RC to postpone greater than first predetermined value, and an end at reset transistor provides reset voltage pulse, thereby the grid voltage that is improved at the grid of reset transistor and the grid voltage of this raising can be held; Behind the reset operation that finishes reset transistor, between the grid of reset transistor and reset signal, provide the 2nd RC that is lower than second predetermined value to postpone, thereby the grid voltage of reset transistor can be very fast the be pulled to low level to realize the shutoff of reset transistor.
Those skilled in the art will recognize that first predetermined value is big more, a RC between the grid of reset transistor and the reset signal postpones long more, thereby the grid voltage of reset transistor is can the maintained time long more; Second predetermined value is more little, and the 2nd RC between the grid of reset transistor and the reset signal postpones short more, thereby the grid voltage of reset transistor can be pulled to low level more quickly.This first predetermined value and second predetermined value can come to determine as required.
The signal that Fig. 7 shows Fig. 5 is read an exemplary concrete formation of module 50.Be simple and clear purpose, Fig. 7 only shows reset signal adjusting module and reset transistor.As shown in the figure, handover module 52 comprises the PMOS transistor 71 and second nmos pass transistor 72, and the end 711 of PMOS transistor 71 and the end 721 of nmos pass transistor 72 couple the end 512 of adjusting transistor 51 respectively, and the end 712 of PMOS transistor 71 couples power supply V
DD, the end 722 of nmos pass transistor 72 couples reset signal 204, and the grid 713 of PMOS transistor 71 and the grid 723 of nmos pass transistor 72 couple control signal 502 respectively.
Still with reference to figure 6, when control signal 502 was positioned at low level, PMOS transistor 71 was opened, and nmos pass transistor 72 is closed, and the end 512 of therefore adjusting transistor 51 is coupled to power supply V
DDWhen control signal 502 was positioned at high level, nmos pass transistor 72 was opened, and PMOS transistor 71 is closed, and the end of therefore adjusting transistor 52 is coupled to reset signal 204.
Need to prove that the handover module 52 of Fig. 5 can have different formations.Fig. 8 shows another exemplary formation of the handover module 52 of Fig. 5.Be simple and clear purpose, Fig. 8 only shows reset signal adjusting module and reset transistor.As shown in the figure, handover module 52 comprises PMOS transistor 71, second nmos pass transistor 72, and the 2nd PMOS transistor 81, the 2nd PMOS transistor 81 and 72 parallel connections of second nmos pass transistor, the grid 813 of the 2nd PMOS transistor 81 are coupled to the signal 801 anti-phase with control signal 502, and this signal 801 can pass through, for example, an inverter (not shown) in the handover module 52 obtains.
Still with reference to figure 6, when control signal 502 was positioned at low level, PMOS transistor 71 was opened, and nmos pass transistor 72 and PMOS transistor 81 are closed, and the end 512 of therefore adjusting transistor 51 is coupled to power supply V
DDWhen control signal 502 was positioned at high level, nmos pass transistor 72 and PMOS transistor 81 were opened, and PMOS transistor 71 is closed, and the end of therefore adjusting transistor 52 is coupled to reset signal 204.
An alternative as Fig. 2, the signal of Fig. 9 imageing sensor is according to another embodiment of the invention read module 90, as shown in the figure, the resetting voltage 901 that the end of reset transistor 92 receives is gating signal, and, as shown in Figure 9, this exemplary signal is read module 90 can not comprise gate transistor 24 among Fig. 2, and reset transistor 92 promptly plays the effect that gating is played in the effect that resets again in this example.
Figure 10 shows another example that signal shown in Figure 9 is read the running of module 90, describes the operation that signal is read module 90 below in conjunction with Figure 10.In this example, resetting voltage 901 comprises gating signal, be in operation, thereby handover module 962 makes in response to control signal 963: the end 972 at control signal 963 adjustment transistor 961 during for low level is coupled to power supply V
DD, the end 972 of adjusting transistor 961 in control signal 963 during for high level is coupled to reset signal 904; In the time period that promptly illustrates in the drawings, before moment t102 and after the moment t103, the end 972 of adjusting transistor 961 is coupled to power supply V
DD, between moment t102 and moment t103, the end 972 of adjusting transistor 961 is coupled to reset signal 604.
Figure (b) shows the end 972 of adjusting transistor 961 and is coupled to power supply V
DDSituation, suppose V
DDBe 3.5V, the threshold voltage of adjusting transistor 961 is 0.7V, and the voltage of end 971 is about 2.8V so, and the initial voltage that also promptly is carried in the grid of reset transistor 92 is about 2.8V.Owing to the voltage of the end 972 of adjusting transistor 961 at this moment is identical with the voltage of grid 973, the conducting resistance of adjusting transistor 961 is very big, the end 971 of adjusting transistor 961 can be regarded as floats, when the end of reset transistor 92 receives reset voltage pulse 901, the gate leakage capacitance feedthrough of this pulse 901 by reset transistor 92 is to the grid of reset transistor 92 and be superimposed upon on the initial voltage 2.8V of grid, consequently, the voltage of the grid of reset transistor 92 is increased to about about 5V, the difference of the threshold voltage of this value and reset transistor 92 is higher than the high level 3.5V of reset pulse 901, and, because it is very big to adjust transistor 961 conducting resistance at this moment, the grid voltage of this raising can be held, and is transferred to the diffusion point 902 of floating thereby make 3.5V can can't harm the lost territory.
Figure (c) shows the situation that the end 972 of adjusting transistor 961 is coupled to reset signal 904.At moment t102 to t103 constantly, reset signal 904 is in low level, therefore, the gate source voltage of adjusting transistor 961 is bigger, because transistorized conducting resistance and gate source voltage are inversely proportional to, the conducting resistance of adjusting transistor 961 this moment is less, and the voltage of therefore adjusting the end 971 of transistor 961 can be pulled to low level within a short period of time, can be similar to and think that reset transistor 92 is closed at moment t102.Then, transmission transistor 91 is unlocked under the control of transmission signals 907, and the level of the diffusion point 902 of floating becomes signal level from reset level.
As can be seen from the above description, signal shown in Figure 9 is read module 90 can spread point 902 so that the resetting voltage 901 that reset transistor 92 1 terminations are received can break-evenly be transferred to float, thereby reads the dynamic range that module 10 has improved imageing sensor with respect to the signal of Fig. 1.
Except above-mentioned advantage, signal shown in Figure 9 is read module 90 can not comprise gate transistor, is realized resetting and the function of gating by reset transistor 92, and therefore reading module 10 with respect to the signal of Fig. 1 has reduced the image element circuit area.
The handover module 962 that those skilled in the art will recognize that Fig. 9 can have multiple formation, and the circuit of Fig. 7 and handover module illustrated in fig. 8 52 constitutes the handover module 962 that also is applicable to Fig. 9.
The signal that Figure 11 shows Fig. 9 is read an exemplary formation of module 90.As shown in figure 11, signal read circuit 110 comprises reset signal adjusting module and reset transistor 111.Wherein, the reset signal adjusting module comprises adjusts transistor 111, and the handover module that constitutes by PMOS transistor 112, the 2nd PMOS transistor 113, second nmos pass transistor 114, wherein, the resetting voltage of the control signal of this handover module and reset transistor 92 comprises gating signal 1101 respectively.Gating signal 1101 is received by an end of reset transistor 92, and in order to control handover module, gating signal 1101 is applied in the grid of transistor 112,114, and the inversion signal 1102 of gating signal 1101 is applied in the grid of transistor 113.An exemplary operational mode of the signal read circuit 110 of Figure 11 is described below in conjunction with Figure 12.
As shown in figure 12, before moment t121, control signal 1101 is positioned at low level, and transistor 112 is opened, and transistor 113,114 is closed, and the end that handover module will be adjusted transistor 111 is coupled to power supply V
DD, shown in Figure 12 (b), suppose V
DDBe 3.5V, the threshold voltage of adjusting transistor 111 is 0.7V, adjusts the voltage that transistor 111 is coupled to the end of reset transistor this moment and is about 2.8V, and that adjusts transistor 111 this moment is coupled to power supply V
DDAnode-cathode voltage equate that with grid voltage it is very big that adjust the conducting resistance of transistor 111 this moment, the end that is coupled to reset transistor 22 of adjusting transistor 111 is regarded as and is floated; Between moment t121 and t122, control signal 1101 is positioned at high level, transistor 112 is closed, transistor 113,114 is opened, the end that handover module will be adjusted transistor 111 is coupled to reset signal 1104, shown in Figure 12 (c),, adjust transistor 111 and still keep high conducting resistance because this moment, reset signal 1104 was positioned at high level.
When resetting voltage 1101 at moment t121 when low level becomes high level, the gate leakage capacitance feedthrough of this signal by reset transistor 92 is to grid and be superimposed upon on the initial voltage 2.8V of grid, the grid voltage that is improved thus (being approximately 5V), because the difference of the threshold voltage of grid voltage and reset transistor 92 is greater than the value 3.5V of resetting voltage 1101, and because it is very big to adjust transistor 111 conducting resistance at this moment, the grid voltage of this raising can be held, so resetting voltage 1101 can break-evenly be transferred to the diffusion point 902 of floating.
When reset signal 1104 at moment t122 when high level becomes low level, the gate source voltage of adjusting transistor 111 is bigger, because transistorized conducting resistance and gate source voltage are inversely proportional to, the conducting resistance of adjusting transistor 111 this moment is less, therefore the voltage (being the grid voltage of reset transistor 92) of adjusting the end that is coupled to reset transistor 92 of transistor 111 can be pulled to low level within a short period of time, can be similar to and think that reset transistor 92 is closed at moment t122.Then, transmission transistor 91 is unlocked under the control of transmission signals 207, and the level of the diffusion point 902 of floating becomes signal level from reset level.
Abovely illustrative embodiments according to reset signal adjusting module of the present invention has been described in conjunction with Fig. 2 to Figure 12, need to prove, reset signal adjusting module execution mode according to the present invention is not limited thereto, reset signal adjusting module according to the present invention can adopt any suitable mode to realize, for example, the boost converter that can adopt charge pump for example the diffusion point of floating is carried out reseting period with the grid voltage boost conversion of reset transistor to the level that is fit to, this level makes the voltage of reset transistor gate and the difference of threshold voltage be greater than or equal to resetting voltage.
According to one embodiment of present invention, provide a kind of imageing sensor, comprised that any one signal described above reads module or circuit.In an example, being positioned at of this imageing sensor with shared any one reset signal adjusting module described above of each pixel of delegation, comprise under the transistorized situation of adjustment at the reset signal adjusting module, this is adjusted a transistorized end and is respectively coupled to this grid with the reset transistor of each pixel of delegation, thereby the reset signal through adjusting is provided.
In the disclosure, be serve exemplary purposes, the running reference method embodiment of circuit embodiments describes.Yet, should be appreciated that the realization of the running of circuit in the disclosure and method is independent mutually.That is to say that disclosed circuit embodiments can operate according to additive method, disclosed method embodiment can realize by other circuit.
Although sets forth in detail and described the present invention in accompanying drawing and aforesaid description should think that this is illustrated and describes is illustrative and exemplary, rather than restrictive; The invention is not restricted to above-mentioned execution mode.
The those skilled in the art in those present technique fields can be by research specification, disclosed content and accompanying drawing and appending claims, and understanding and enforcement are to other changes of the execution mode of disclosure.In the claims, word " comprises " element and the step of not getting rid of other, and wording " one " is not got rid of plural number.In the practical application of invention, the function of a plurality of technical characterictics of being quoted during a part possibility enforcement of rights requires.Any Reference numeral in the claim should not be construed as the restriction to scope.
Claims (13)
1. the signal read circuit of an imageing sensor comprises:
Reset transistor, comprise two ends and a grid, one in described two ends is coupled to the diffusion point of floating, another is coupled to gating signal, described grid is coupled to reset signal, and wherein, described gating signal is used for the pixel at the described reset transistor of gating place, described reset signal is used for the described diffusion point of floating is resetted, and
The reset signal adjusting module is used for described reset transistor is coupled to described reset signal, and described reset signal adjusting module comprises:
Adjust transistor, comprise two ends and a grid, an end in described two ends is coupled to the described grid of described reset transistor, and the transistorized described grid of described adjustment is coupled to power supply, and
Handover module, thus be configured to make in response to control signal:
When the pixel at described reset transistor place during by gating, transistorized another end of described adjustment has been coupled to power supply, and
When the signal charge of described pixel by when the described diffusion point of floating shifts, transistorized another end of described adjustment has been coupled to described reset signal.
2. signal read circuit according to claim 1 is characterized in that, described reset transistor and described adjustment transistor comprise NMOS.
3. signal read circuit according to claim 2, it is characterized in that, described handover module comprises PMOS and the 2nd NMOS, wherein, the end of described PMOS and the 2nd NMOS is respectively coupled to transistorized described another end of described adjustment, another end of described PMOS and the 2nd NMOS is respectively coupled to power supply and described reset signal, and the grid of stating PMOS and the 2nd NMOS is respectively coupled to described control signal.
4. signal read circuit according to claim 3 is characterized in that described handover module also comprises the 2nd PMOS, and described the 2nd PMOS is in parallel with described the 2nd NMOS, and the grid of described the 2nd PMOS is coupled to the signal anti-phase with described control signal.
5. signal read circuit according to claim 1 is characterized in that described control signal comprises described gating signal, and described reset signal is positioned at significant level when described gating signal is positioned at significant level.
6. an imageing sensor comprises any described signal read circuit of claim 1-5.
7. the imageing sensor of stating according to claim 5, it is characterized in that, being positioned at of described imageing sensor with the shared described reset signal adjusting module of each pixel of delegation, and an end in transistorized described two ends of described adjustment is respectively coupled to the grid of the reset transistor of described each pixel with delegation.
8. the signal of an imageing sensor is read module, comprising:
Reset transistor comprises two ends and a grid, and an end in described two ends is coupled to the diffusion point of floating, and another end is coupled to resetting voltage, and
The reset signal adjusting module, be coupled to described grid, described reset signal adjusting module is configured to: in the scheduled time that the described diffusion point of floating is resetted, higher grid voltage is provided for described grid, makes the difference of threshold voltage of described grid voltage and described reset transistor be higher than or equal described resetting voltage.
9. the signal of stating is according to Claim 8 read module, it is characterized in that, described resetting voltage comprises reset voltage pulse, and
Described reset signal adjusting module comprises:
Adjust transistor, comprise two ends and a grid, an end in described two ends is coupled to the described grid of described reset transistor, and the transistorized described grid of described adjustment is coupled to power supply, and
Handover module, thus be configured to make in response to control signal:
When described reset voltage pulse was initial, transistorized another end of described adjustment had been coupled to power supply, and
When the signal charge of the pixel at described reset transistor place by when the described diffusion point of floating shifts, transistorized another end of described adjustment has been coupled to described reset signal.
10. the signal of stating is according to Claim 8 read module, it is characterized in that, described resetting voltage comprises gating signal, and wherein, described gating signal is used for the pixel at the described reset transistor of gating place, and
Described reset signal adjusting module comprises:
Adjust transistor, comprise two ends and a grid, an end in described two ends is coupled to the described grid of described reset transistor, and the transistorized described grid of described adjustment is coupled to power supply, and
Handover module, thus be configured to make in response to control signal:
When the pixel at described reset transistor place during by gating, transistorized another end of described adjustment has been coupled to power supply, and
When the signal charge of described pixel by when the described diffusion point of floating shifts, transistorized another end of described adjustment has been coupled to described reset signal.
11. read module, it is characterized in that described control signal comprises described gating signal according to the signal that claim 10 is stated.
12. the method that the signal that is used for image sensor pixel is read comprises:
By reset transistor floating of described image sensor pixel spread in the scheduled time that resets, higher grid voltage is provided for the grid of described reset transistor, makes the difference of threshold voltage of described grid voltage and described reset transistor be higher than or equal resetting voltage.
13. method according to claim 12 is characterized in that comprising:
In the described scheduled time that resets, between the described grid of described reset transistor and described reset signal, provide a RC to postpone, and provide reset voltage pulse in an end of described reset transistor greater than first predetermined value, and
When described reset signal is positioned at inactive level, between the described grid of described reset transistor and described reset signal, provide the 2nd RC that is lower than second predetermined value to postpone.
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