CN102195770A - Sampling equipment and method - Google Patents
Sampling equipment and method Download PDFInfo
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- CN102195770A CN102195770A CN 201010130309 CN201010130309A CN102195770A CN 102195770 A CN102195770 A CN 102195770A CN 201010130309 CN201010130309 CN 201010130309 CN 201010130309 A CN201010130309 A CN 201010130309A CN 102195770 A CN102195770 A CN 102195770A
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Abstract
The invention provides sampling equipment which comprises a sampled signal input, a sampling clock input, multiple sampling units, a phase shift unit and a summary unit, wherein the sampled signal input is used for receiving sampled signals; the sampling clock input is used for receiving sampling clocks; each sampling unit is provided with the first input for receiving the sampled signals, the second input for receiving the respective sampling clock and the output for outputting the data after sampling; the phase shift unit carries out the phase shift processing on the sampling clocks and respectively outputs the multiple sampling clocks after the phase shift processing to the second input of each sampling unit in the multiple sampling units; and the summary unit summarizes the output of each sampling unit in the multiple sampling units to obtain the final sampling data. The invention also provides a corresponding sampling method. In the invention, the frequency of the sampling clocks does not need to be improved, and the sampling with a high sampling rate is realized by utilizing the sampling clocks with a low frequency.
Description
Technical field
The present invention relates to a kind of sample devices, be specifically related to a kind of high sampling rate equipment and method of utilizing low-frequency clock to realize.
Background technology
At present, sample devices has obtained using widely.For example, synchronous for inhibit signal in the base station of wireless communication system, in the clock synchronization unit, need sample devices.Usually, in order to improve sample rate, need correspondingly improve the frequency of sampling clock.Yet the weak point of doing like this is: at first, the frequency of sampling clock can not unrestrictedly improve; Secondly, promptly allow to farthest improve the frequency of sampling clock, the high sampling rate equipment that causes therefrom involves great expense usually.
Summary of the invention
Therefore, in order to address the above problem, the present invention proposes the low relatively clock frequency of a kind of utilization and the high sampling rate equipment and the method that realize.
According to an aspect of the present invention, provide a kind of sample devices, having comprised: be sampled the signal input, be used to receive the signal that is sampled; The sampling clock input is used to receive sampling clock; A plurality of sampling units, each sampling unit all have first input that is used to receive the signal that is sampled, the output of the data after being used to receive second input of sampling clock separately and being used to export sampling; Phase-shifting unit carries out phase shift to sampling clock and handles, and the sampling clock after a plurality of phase shifts processing is exported to second input of each sampling unit in a plurality of sampling units respectively; And gather the unit, the output of each sampling unit in a plurality of sampling units is gathered, to obtain final sampled data.
The phase place of the sampling clock after preferably, described a plurality of phase shift is handled is different.
Preferably, with particular step size sampling clock being carried out phase shift handles.
Preferably, described sample devices is applied in wireless communication system or the wired communication system.Described wireless communication system comprises GSM, CDMA, WCDMA and LTE.
According to another aspect of the present invention, provide a kind of method of sampling, comprised step: received the signal and the sampling clock that are sampled; Sampling clock is carried out phase shift to be handled; Utilize the sampling clock after a plurality of phase shifts are handled to sample simultaneously; And all sampled result are gathered, to obtain final sampled data.
The phase place of the sampling clock after preferably, described a plurality of phase shift is handled is different.
Preferably, with particular step size sampling clock being carried out phase shift handles.
Preferably, the described method of sampling is applied in wireless communication system or the wired communication system.Described wireless communication system comprises GSM, CDMA, WCDMA and LTE.
According to a further aspect of the invention, provide a kind of base station, wherein, the clock synchronization unit of described base station comprises sample devices of the present invention.
The present invention need not to improve the frequency of sampling clock, just can utilize the sampling clock with lower frequency to realize the sampling of high sampling rate.
Description of drawings
By detailed description with the accompanying drawing hereinafter, above-mentioned and other features of the present invention will become more apparent, wherein:
Fig. 1 shows the block diagram of an example of sample devices of the prior art;
Fig. 2 shows an example sequential chart that is sampled signal and sampling clock of the sample devices among Fig. 1;
Fig. 3 shows the block diagram of sample devices according to an embodiment of the invention;
Fig. 4 shows an example sequential chart that is sampled signal and sampling clock of the sample devices among Fig. 3; And
Fig. 5 shows the flow chart of the method for sampling according to an embodiment of the invention.
Embodiment
Below, in conjunction with the drawings to the description of specific embodiments of the invention, principle of the present invention and realization will become obvious.Should be noted in the discussion above that the present invention should not be limited to specific embodiment hereinafter described.Need explanation in addition,, the known assemblies directly related with the present invention is not shown in the accompanying drawing for for simplicity.
1-2 describes sample devices commonly used in the prior art at first, in conjunction with the accompanying drawings.
Fig. 1 shows the block diagram of an example of sample devices 100 of the prior art.Sample devices 100 comprises first input, 101, second input 102, output 103 and sampling unit 104.In operation, sampling unit 104 is sampled to the signal that is sampled of first input, 101 places input according to the sampling clock of going into of second input, 102 places input, and the data after the output sampling of output 103 places.
Fig. 2 shows an example sequential chart that is sampled signal and sampling clock of the sample devices among Fig. 1.Fig. 2 is sampled signal what the first half showed first input, 101 places, shows the sampling clock at second input, 102 places in the latter half.For example, the frequency of this sampling clock can be 250MHz.In the example of Fig. 2, sample devices is sampled constantly at the rising edge of sampling clock.
Because the example sample devices among Fig. 1 is that those skilled in the art is known, therefore omitted description here to its details.
Yet when sampling when obtaining enough accurate data with higher sample rate, sample devices of the prior art need improve the frequency of sampling clock.The weak point of doing like this is: at first, the frequency of sampling clock can not unrestrictedly improve; Secondly, promptly allow to farthest improve the frequency of sampling clock, the high sampling rate equipment of Chan Shenging involves great expense usually therefrom.
Describe sample devices of the present invention in detail below in conjunction with accompanying drawing 3-4.
Fig. 3 shows the block diagram of sample devices 300 according to an embodiment of the invention.Referring to Fig. 3, sample devices 300 comprises and is sampled signal input 301, sampling clock input 302, sampled data output 303, four sampling unit 304-1 to 304-4, phase-shifting units 305 and gathers unit 306.Wherein, each sampling unit all have be used to receive first input that is sampled signal, the output of the data after being used to receive second input of sampling clock and being used to export sampling.For example, sampling unit 304-1 has the first input 301-1, the second input 302-1 and output 303-1.
In operation, sample devices 300 receives the signal that will be sampled by being sampled signal input 301, and this signal is offered the first input 301-1 to 301-4 of four sampling unit 304-1 to 304-4 respectively.In addition, sample devices 300 receives sampling clock by sampling clock input 302.Particularly, by the input of phase-shifting unit 305 receptions, and sampling clock is carried out phase shift operate from sampling clock input 302.In the present embodiment, as example, phase-shifting unit is a step-length with 45 degree, sampled clock signal is carried out 3 phase shifts, and export sampling clock, the sampling clock behind phase shift 90 degree and the sampling clock behind phase shift 135 degree behind sampling clock (promptly importing the crude sampling clock at 302 places), phase shift 45 degree of zero degree phase shift to the second input 302-1 to 302-4 of four sampling unit 304-1 to 304-4 respectively.Four sampling unit 304-1 to 304-4 carry out sampling constantly at the rising edge that sampling clock is separately imported respectively, and by the data of output 303-1 to 303-4 after gathering unit 306 output samplings.Gather 306 pairs of unit and gather, and export the final sampled data of 303 places output in sampled data from the data after the sampling of four sampling units.Gather unit 306 and can use the crude sampling clock, also can use the sampling clock after any one phase shift mentioned above as its clock signal.
Fig. 4 shows an example sequential chart that is sampled signal and sampling clock of the sample devices among Fig. 3.Show successively from top to bottom among Fig. 4 and be sampled signal, sampling clock 0, sampling clock 1, sampling clock 2 and sampling clock 3.In Fig. 4, the frequency of sampling clock is 250MHz, and sample devices is sampled constantly at the rising edge of sampling clock.Sampling clock 1, sampling clock 2 and sampling clock 3 are respectively to be result after step-length is carried out phase shift and handled to sampling clock 0 (being the crude sampling clock) with 45 degree.
Like this, in the present embodiment, by four sampling units are integrated in the sample devices, and carry out phase shift to obtain sampling clock after a plurality of phase shifts, can obtain more sampled data as the clock input of four parallel sampling units by sampling clock to single lower frequency.Therefore, sample devices 300 can obtain higher relatively sample rate with relatively low sampling clock frequency, and need not to improve actual sampling clock frequency.For example, equaling 250MHz with the frequency of the sampling clock among Fig. 4 is example, the effect in the time of in fact can obtaining the sampling clock frequency and be 1000MHz (, 250MHz * 4=1000MHz).
Significantly, can comprise the sampling unit of arbitrary number in the sample devices of the present invention as required, the number that is not limited to provide in the specific embodiment of the invention.In addition, the step-length that phase-shifting unit is adopted at the phase shift operation of sampling clock can be other numerical value, and can be on-fixed, and this depends on the detail of phase-shifting unit.The phase place of the sampling clock after preferably, a plurality of phase shifts are handled is different.
Fig. 5 shows the flow chart of the method for sampling 500 according to an embodiment of the invention.The method of sampling begins at step 502 place.In step 504, the sampling clock of lower frequency is carried out phase shift handle, obtain the sampling clock (clock frequency is constant) after a plurality of phase shifts.In step 506, the sampling clock after a plurality of phase shifts is offered a plurality of sampling units.Then, carry out sampling in step 508.Next, in step 510, the sampled result of a plurality of sampling units is gathered, to obtain final sampled data.At last, this method finishes at step 512 place.
The present invention can be applied to multiple synchronous communication system, for example wireless communication system (GSM, CDMA, WCDMA, LTE) and wired communication system.For example, the present invention can be used for required clock synchronization unit, mobile base station.
Although below show the present invention in conjunction with the preferred embodiments of the present invention, one skilled in the art will appreciate that under the situation that does not break away from the spirit and scope of the present invention, can carry out various modifications, replacement and change to the present invention.Therefore, the present invention should not limited by the foregoing description, and should be limited by claims and equivalent thereof.
Claims (11)
1. sample devices comprises:
Be sampled the signal input, be used to receive the signal that is sampled;
The sampling clock input is used to receive sampling clock;
A plurality of sampling units, each sampling unit all have first input that is used to receive the signal that is sampled, the output of the data after being used to receive second input of sampling clock separately and being used to export sampling;
Phase-shifting unit carries out phase shift to sampling clock and handles, and the sampling clock after a plurality of phase shifts processing is exported to second input of each sampling unit in a plurality of sampling units respectively; And
Gather the unit, the output of each sampling unit in a plurality of sampling units is gathered, to obtain final sampled data.
2. sample devices as claimed in claim 1, wherein, the phase place of the sampling clock after described a plurality of phase shifts are handled is different.
3. sample devices as claimed in claim 1 wherein, carries out phase shift with particular step size to sampling clock and handles.
4. as any described sample devices among the claim 1-3, wherein, described sample devices is applied in wireless communication system or the wired communication system.
5. sample devices as claimed in claim 4, wherein, described wireless communication system comprises GSM, CDMA, WCDMA and LTE.
6. method of sampling comprises step:
Signal that reception is sampled and sampling clock;
Sampling clock is carried out phase shift to be handled;
Utilize the sampling clock after a plurality of phase shifts are handled to sample simultaneously; And
All sampled result are gathered, to obtain final sampled data.
7. the method for sampling as claimed in claim 6, wherein, the phase place of the sampling clock after described a plurality of phase shifts are handled is different.
8. the method for sampling as claimed in claim 6 wherein, is carried out phase shift with particular step size to sampling clock and is handled.
9. as any described method of sampling among the claim 6-8, wherein, the described method of sampling is applied in wireless communication system or the wired communication system.
10. the method for sampling as claimed in claim 9, wherein, described wireless communication system comprises GSM, CDMA, WCDMA and LTE.
11. a base station, wherein, the clock synchronization unit of described base station comprises as any described sample devices in the claim 1 to 5.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106940394A (en) * | 2017-04-24 | 2017-07-11 | 南京南瑞继保电气有限公司 | It is a kind of to realize the method that optical current mutual inductor is measured at a high speed |
CN115372984A (en) * | 2022-10-25 | 2022-11-22 | 东莞市森威电子有限公司 | Pulse laser ranging method based on phase-shifting sampling interpolation method |
Citations (3)
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US5255289A (en) * | 1991-02-19 | 1993-10-19 | Nec Corporation | Symbol timing recovery circuit |
CN1213225A (en) * | 1997-06-13 | 1999-04-07 | 日本电气株式会社 | Clock signal control method and its device |
CN1360396A (en) * | 2000-12-21 | 2002-07-24 | 日本电气株式会社 | Clock and data restoring circuit and its clock control method |
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2010
- 2010-03-19 CN CN 201010130309 patent/CN102195770A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
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US5255289A (en) * | 1991-02-19 | 1993-10-19 | Nec Corporation | Symbol timing recovery circuit |
CN1213225A (en) * | 1997-06-13 | 1999-04-07 | 日本电气株式会社 | Clock signal control method and its device |
CN1360396A (en) * | 2000-12-21 | 2002-07-24 | 日本电气株式会社 | Clock and data restoring circuit and its clock control method |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106940394A (en) * | 2017-04-24 | 2017-07-11 | 南京南瑞继保电气有限公司 | It is a kind of to realize the method that optical current mutual inductor is measured at a high speed |
CN115372984A (en) * | 2022-10-25 | 2022-11-22 | 东莞市森威电子有限公司 | Pulse laser ranging method based on phase-shifting sampling interpolation method |
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Application publication date: 20110921 |