CN102185998A - A method for synchronizing video signals by employing AES/EBU digital audio signals - Google Patents
A method for synchronizing video signals by employing AES/EBU digital audio signals Download PDFInfo
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Abstract
The invention relates to a method for synchronizing video signals by employing AES/EBU digital audio signals. The method comprises a step of generating a synchronous clock, a step of generating primary video and audio code streams, a step of leading out the digital audio signals, a step of generating slave synchronous signals, a step of generating a slave synchronous video clock, a step of generating slave video and audio code streams, and a step of outputting slave video and audio broadcast signals. The method realizes accurate synchronization by employing a concept, which is similar to a frame in the video signals, of the AES/EBU digital audio signals and realizes the synchronization of video and audio equipment or modules. The synchronizing method employs unoccupied digital audio channels for connection and accordingly realizes the synchronization of video broadcasting among various kinds of the video and audio equipment without employing other external phase locked sources, and can be applied to various kinds of equipment in a flow of broadcast television high definition production and broadcast.
Description
Technical field
The present invention relates to a kind of method of the AES/EBU of utilization digital audio and video signals synchronous video signal, is the method that a kind of digital video-audio is handled, and is to use digital audio and video signals to make the synchronous method of a plurality of video units under a kind of AES/EBU of utilization standard environment.
Background technology
In the broadcast system of TV station, in order to realize mixing and switching, require to participate in the time unification between each signal source of broadcast from the multiple signals in unlike signal source, just between each road broadcasting signal with frequently, homophase.Otherwise when broadcasting, if switch between two nonsynchronous images, television image just may occur jumping, glimmers or roll, and is lived synchronously by new picture signal up to television set, and it is stable that television image can recover.
So, how to guarantee each the road broadcasting signal strict synchronism in the TV station? this uses synchronous motor that each road broadcasting signal is carried out synchronously with regard to needs.That is to say various synchronizing signals strict conformance on frequency and phase place that synchronizing signal in each road broadcasting signal and synchronous motor are produced.This working method of synchronous motor is called the phase-locked of synchronous motor.The operating state of each road broadcasting signal of this moment is called phase lock mode.This shows that phase-locked mode of operation has very important significance for the whole broadcast system of TV station, is correct, the stable important assurance of broadcasting of TV station.
In general, each road broadcasting signal of TV station is produced by various video and audio equipments.These video and audio equipments have the synchronizing signal input interface, receive the synchronizing signal of synchronous motor output by this interface.The staff of TV station just can produce the broadcasting signal of the same homophase frequently of the synchronizing signal of exporting with synchronous motor by the operation to various softwares on the equipment.
At present, various video and audio equipments for the processing procedure of input sync signal roughly are: the composite synchronizing signal of synchronous motor output is exported to video and audio equipment, at first by synchronizing signal separating chips general row wherein, field synchronization information extracts, give video clock and produce chip with phase-locked function, go according to these by this clock generating chip again, field synchronization information generates corresponding audio video synchronization clock, and to deliver to processor chips (can be FPGA, general processor such as DSP or ARM), processor will broadcast the video/audio that Control Software brings according to this audio video synchronization clock again and convert corresponding video/audio code stream to, deliver to the video encoding chip again, generate by the video encoding chip again and look the audio frequency broadcasting signal, the synchronizing signal that this signal and synchronous motor output to video and audio equipment has with frequently, the relation of homophase, that is have phase-locked relation.
Part video and audio equipment (or looking audio-frequency module) also has synchronizing signal ring outgoing interface, can be in the synchronizing signal that receives synchronous motor output, this synchronizing signal intactly by the output of synchronizing signal ring outgoing interface, is used for other video and audio equipment (or looking audio-frequency module) cascade.Under many circumstances, because the synchronizing signal limited amount of synchronous motor output, a plurality of audio-frequency modules of looking in many video and audio equipments or the video and audio equipment must shared synchronizing signals.If video and audio equipment wherein (or looking audio-frequency module) does not possess synchronizing signal ring outgoing interface, the video and audio equipment (or looking audio-frequency module) that just the synchronizing signal ring can not be gone out to other uses, thereby can not realize and the shared synchronizing signal of other video and audio equipments (or looking audio-frequency module), will cause not inserting the looking the audio frequency broadcasting signal and can't be operated in phase lock mode of video and audio equipment (or looking audio-frequency module) output of synchronizing signal like this.Therefore, existing method for synchronous has been subjected to the restriction whether synchronizing signal quantity and video and audio equipment (or looking audio-frequency module) have synchronizing signal ring outgoing interface.That is to say, must guarantee that each video and audio equipment (or looking audio-frequency module) all has synchronizing signal to insert, otherwise, just can't realize that each looks the synchronous of audio frequency broadcasting signal.
In addition, iff being to want to make between the video/audio signal that many video and audio equipments (a plurality of audio-frequency modules of looking that comprise same video and audio equipment inside) broadcast synchronously, except the above-mentioned outer synchronous signal that utilizes carries out the synchronous method a plurality of audio-frequency modules of looking in many video and audio equipments or same the video and audio equipment, that can also utilize that first video and audio equipment (being called main equipment) broadcast meets the necessarily required analog video signal (composite video signal of SD (CVBS signal) for example, Y(brightness in the component vide of high definition) signal) be connected in second equipment (being called slave unit) as synchronizing signal, slave unit generate with main equipment synchronous look the audio frequency broadcasting signal.But, if main equipment does not have suitable analog video output interface, or there is not unnecessary analog video signal to use as synchronizing signal for slave unit, just can't accomplish the synchronous of many video and audio equipment broadcasting signals.
Summary of the invention
For solving prior art problems, the objective of the invention is to propose a kind of method of the AES/EBU of utilization digital audio and video signals synchronous video signal.Described method is by selecting a video and audio equipment that plays an important role as main equipment, with the synchronizing signal in the main equipment as standard other relevant video and audio equipments synchronously.The media of propagating the main equipment synchronizing signal is not a vision signal, but digital audio and video signals.Further can in the channel of the digital audio and video signals of main equipment, embed synchronizing information, and slave unit is by gathering the digital audio and video signals of main equipment, and in slave unit, use this digital audio and video signals that has embedded synchronizing information as phase locked source, the vision signal that makes slave unit broadcast is synchronous with the vision signal of main equipment broadcast.
The object of the present invention is achieved like this: a kind of method of utilizing AES/EBU digital audio and video signals synchronous video signal, the hardware that described method is used comprises: send the main equipment of synchronizing signal and by the synchronous slave unit of main equipment, described main equipment includes: clock generating chip, host device processor, main equipment video encoding chip with phase-locked function; Described slave unit includes: digital audio receiving chip, phase lock circuitry, slave unit processor, slave unit video encoding chip; The step of described method is as follows:
The step that synchronised clock produces: be used for video clock generation chip and produce main synchronised clock and be delivered to host device processor;
Produce the step of main video/audio code stream: being used for the main video/audio that host device processor will receive is main video/audio code stream through main synchronised clock Synchronous Processing, and is delivered to main video encoding chip;
Draw the step of digital audio and video signals: be used for main video encoding chip main video/audio code stream is encoded and export main when looking the audio frequency broadcasting signal to slave unit outputting digital audio signal;
Produce the step of slave unit synchronizing signal: be used for the digital audio receiving chip and parse the slave unit synchronizing signal at the digital audio and video signals of receiving;
Generation is from the step of synchronization video clock: be used for phase lock circuitry with audio clock produce with main synchronised clock synchronous from the synchronization video clock, and will be delivered to the slave unit processor from the synchronization video clock;
Generation is from the step of video/audio code stream: be used for the slave unit processor with pending from video/audio through slave unit synchronizing signal Synchronous Processing for from video/audio code stream, and will be delivered to from the video encoding chip from video/audio code stream;
Output is from looking the step of audio frequency broadcasting signal: be used for from the video encoding chip to after encoding from video/audio code stream again output with main look the audio frequency broadcasting signal synchronous from looking the audio frequency broadcasting signal.
The beneficial effect that the present invention produces is: the present invention utilizes the AES/EBU digital audio and video signals to have the notion of frame in the similar vision signal, has very accurate synchronous rule, synchronously each video and audio equipment or module.The digital audio channel of this method for synchronous utilization free time is done connection, under the situation of not using other extraneous phase locked sources, just can realize broadcasting audio video synchronization between multiple video and audio equipment, can be widely used in the plurality of devices of the high SD record and broadcast of radio and television flow process.
Description of drawings
The invention will be further described below in conjunction with drawings and Examples.
Fig. 1 is the theory diagram of the embodiment of the invention one described method;
Fig. 2 is the theory diagram of the embodiment of the invention two described methods;
Fig. 3 is the theory diagram of the embodiment of the invention three described methods;
Fig. 4 is the data structure of AES/EBU digital audio format;
Fig. 5 is that AES/EBU adopts the coded system of " Biphase-Mark ";
Fig. 6 has two places not observe the place of above-mentioned " Biphase-Mark " coding in preamble;
Fig. 7 is the coding embedded location schematic diagram of the embodiment of the invention six described methods;
Fig. 8 is the coding embedded location schematic diagram of the embodiment of the invention five described methods.
Embodiment
Embodiment one:
Present embodiment is a kind of method of the AES/EBU of utilization digital audio and video signals synchronous video signal, the hardware that described method is used comprises: send the main equipment of synchronizing signal and by the synchronous slave unit of main equipment, described main equipment includes: clock generating chip, host device processor, main equipment video encoding chip with phase-locked function; Described slave unit includes: digital audio receiving chip, phase lock circuitry, slave unit processor, slave unit video encoding chip, as shown in Figure 1.
The video clock that described clock generating chip with phase-locked function can be similar EL4585 produces chip.Described master and slave device handler can be a FPGA field programmable logic chip, or other have the chip of powerful processing capacity, for example: chips such as DSP, ARM.Master and slave equipment video encoding chip can be to be similar to ADV7176 video coding chip and CS8406 digital audio to send the unit that chip portfolio forms.The chip of described digital audio receiving chip CS8416 and so on.Described phase lock circuitry can be the clock generation chip of MK2069 and so on band PLL, also can be the phase locking unit of processor inside.
The step of the described method of present embodiment is as follows:
The step that main synchronised clock produces: be used for video clock generation chip and produce main synchronised clock and be delivered to host device processor.The main synchronised clock that this step produced can be that local clock chip produces, be referred to as inner synchronousing signal, also can be by outside synchronous motor input sync signal, produce chip through synchronizing signal separating chips and video clock with phase-locked function again and produce, be referred to as outer synchronous signal.If the use inner synchronousing signal, being equivalent to main equipment is a synchronous motor, with synchronous all relevant equipment or the modules of the inner synchronousing signal of main equipment.If use external sync equipment, be equivalent to use the synchronous all devices of synchronizing signal or the module of synchronous motor, synchronous nothing but what undertaken by main equipment.
Produce the step of main video/audio code stream: being used for the main video/audio that host device processor will receive is main video/audio code stream through main synchronised clock Synchronous Processing, and is delivered to main video encoding chip.
Draw the step of digital audio and video signals: be used for main equipment video encoding chip main video/audio code stream is encoded and export main when looking the audio frequency broadcasting signal to slave unit outputting digital audio signal.The digital audio and video signals that this step is drawn can have two kinds of situations:
First kind of situation: the frame level is synchronous.Some application scenario (for example supervising), do not need strict synchronism between the video/audio signal that many video and audio equipments (a plurality of audio-frequency modules of looking that comprise same video and audio equipment inside) broadcast, and only need accomplish that the frame level is just passable synchronously, promptly sensu lato phase-locked.So-called frame level is synchronous, is meant that multichannel broadcasts vision signal and do not have deviation on frame, and only exist row go up or pixel on deviation, and remain unchanged in the immovable situation lower deviation of phase locked state (but the deviation of homogeneous after phase-locked may be not inconsistent).At this moment, send to slave unit at main equipment and can carry any synchronizing information in as the digital audio and video signals of phase locked source, promptly use the synchronous audio clock in the common digital audio and video signals just to be enough to as synchronizing signal, it is synchronous that slave unit and main equipment are carried out the frame level.So just can produce a great convenience: slave unit can utilize digital audio and video signals that the video and audio equipment of any producer the broadcasts phase locked source as this equipment, and the frame level that realizes broadcasting with main equipment vision signal is synchronous.But this method of synchronization is too coarse, being applied to indivedual occasions not high to image request, acts on very limited.
Second kind of situation: precise synchronization.In order to make slave unit accurately synchronous with main equipment, must the accurate slave unit synchronizing signal of generation.Not only has synchronised clock in the slave unit synchronizing signal, the synchronizing information that also is necessary.Main equipment video encoding chip embeds to be specifically designed to when drawing digital audio and video signals in original digital audio and video signals seeks the initial synchronizing information of frame.When the digital audio receiving chip of slave unit embeds the digital audio and video signals of synchronizing information in decoding, also decode this synchronizing information, the frame start information that slave unit utilizes main equipment the to broadcast vision signal slave unit that aligns broadcasts the frame start position of vision signal, utilize simultaneously by the synchronous video clock of synchronous audio clock, promptly can arrive precise synchronization through the phase lock circuitry generation.
Precise synchronization need be put into the private code that present embodiment sets in the subframe of AES/EBU data structure.Represent the frame of main equipment broadcast vision signal initial with private code.For example put into 1 in the user data segment of subframe, representative frame is initial; Perhaps in the audio sampling data section of free time, fill in capable number or other self-defining alignment information; Slave unit is resolved this information and is obtained the frame start position of the video of main equipment broadcast, utilizes simultaneously by the synchronous video clock of synchronous audio clock through the phase lock circuitry generation, promptly can arrive precise synchronization.The vision signal that these two kinds of methods can make slave unit broadcast is accomplished precise synchronization, thereby meets the application requirements of numerous occasions, has application fields.
Produce the step of slave unit synchronizing signal: be used for the digital audio receiving chip and parse the slave unit synchronizing signal at the digital audio and video signals of receiving.
The slave unit synchronizing signal comprises different contents according to different situations.If simple frame level is synchronous, then the slave unit synchronizing signal only comprises audio clock, and promptly the audio frequency receiving chip is as long as after audio clock parsed from digital audio and video signals, be delivered to phase lock circuitry and get final product.If precise synchronization, then the slave unit synchronizing signal not only comprises audio clock, also comprises synchronizing information, and this just needs the audio frequency receiving chip not only will parse audio clock from digital audio and video signals, also will parse synchronizing information.After audio frequency reception chip solution is separated out the slave unit synchronizing signal, when audio clock is delivered to phase lock circuitry, synchronizing information is delivered to the slave unit processor.
Generation is from the step of video/audio code stream: be used for the slave unit processor with pending from video/audio through slave unit synchronizing signal Synchronous Processing for from video/audio code stream, and will be delivered to from the video encoding chip from video/audio code stream.The process of this step process also can be divided into two kinds of situations, the synchronous and precise synchronization of promptly simple frame level.If the frame level is synchronous, the slave unit processor only receive that phase lock circuitry sends from synchronised clock, and utilize this will be converted to from video/audio code stream from video/audio from synchronised clock.If precise synchronization, then on the synchronous basis of frame level, the slave unit processor also will utilize the synchronizing information that parses, align from the frame start position of video/audio, thereby produce align with main video/audio code stream frame head from video/audio code stream.
Output is from looking the step of audio frequency broadcasting signal: be used for from the video encoding chip to after encoding from video/audio code stream again output with main look the audio frequency broadcasting signal synchronous from looking the audio frequency broadcasting signal.
In sum, present embodiment can have two kinds of selections aspect signal source: outer synchronous signal and inner synchronousing signal.Use the outer synchronous signal of synchronous motor, can synchronous many equipment under the situation that interface allows, but then powerless to a plurality of modules in the equipment.And inner synchronousing signal can synchronous a plurality of equipment and a plurality of module by the described method of present embodiment.
Present embodiment also has two kinds of selections on the method for synchronization: the frame level is synchronous, precise synchronization.The synchronous main equipment of frame level need not any transformation, receives chip and phase lock circuitry as long as increase a digital audio interface in slave unit, and is promptly can the achieve frame level synchronous.The frame level can simply be described as synchronously:
1. main equipment utilizes the broadcast digital audio channel signal of self free time, exports to slave unit and provides phase locked source for it.
2. slave unit decodes synchronous audio clock behind the digital audio and video signals that receives the main equipment transmission, gives phase lock circuitry;
3. the synchronous audio clock that receives of the phase lock circuitry utilization of slave unit generates synchronous from the synchronization video clock and give the slave unit processor.
4. the slave unit processor is synchronous from the synchronization video clock according to what receive, converts pending video/audio to corresponding video/audio code stream, delivers to slave unit video encoding chip again.
5. slave unit video encoding chip generates according to the video/audio code stream that receives and looks the audio frequency broadcasting signal, and it is synchronous that the master of this broadcasting signal and main equipment looks audio frequency broadcasting signal frame level.
Precise synchronization then need be revised the sub-frame data content of the idle digital audio channel of main equipment in host device processor, insert the synchronizing information of using for slave unit.Synchronizing information in slave unit in the digital audio and video signals subframe of detection and extraction and application main equipment output is carried out precise synchronization.Precise synchronization can simply be described as:
1. main equipment utilizes the broadcast digital audio channel signal of self free time, embed synchronizing information in the subframe of digital audio and video signals therein after, export to slave unit and provide phase locked source for it.
2. slave unit is after receiving the digital audio and video signals that embeds synchronizing information that main equipment sends, decode wherein synchronizing information and synchronous audio clock, give slave unit processor and phase lock circuitry respectively.
3. the synchronous audio clock that receives of the phase lock circuitry utilization of slave unit generates synchronous video clock and gives the slave unit processor.
4. the slave unit processor converts pending video/audio to corresponding video/audio code stream according to synchronizing information that receives and synchronous video clock, delivers to slave unit video encoding chip again.
5. slave unit video encoding chip generates according to the video/audio code stream that receives and looks the audio frequency broadcasting signal, this broadcasting signal has phase-locked relation with the digital audio and video signals that embeds synchronizing information that is given to slave unit, that is with main equipment to look the audio frequency broadcasting signal synchronous.
Present embodiment embeds synchronizing information in the data content of the digital audio and video signals subframe of the idle digital audio channel of main equipment also have two kinds of selections: fill in the personal code work section and/or revise the audio sampling data section.Personal code work has only 1bit in each subframe of AES/EBU, but enough places the initial mark of frame.The audio sampling data section of AES/EBU has 24bit to be large enough to hold for example synchronous information such as row.Generally, it is the content of audio frequency that the audio sampling data section is placed, but because present embodiment is to utilize the idle digital audio of main equipment to broadcast passage, thereby the content that this passage broadcasts is also just unimportant.That is to say, can no longer place voice data on this channel audio sampled data section, get final product but only place the required synchronizing information of present embodiment.Present embodiment has utilized this free time and rich in natural resources to be used for precise synchronization just.
Embodiment two:
Present embodiment is the improvement of embodiment one, is the refinement that embodiment one produces about main synchronised clock.The described main synchronised clock of present embodiment is produced chip and produces through Sync Separator Chip and video clock with phase-locked function by the external sync machine.The hardware that the described method of present embodiment is used also comprises and also includes the synchronizing signal separating chips that is connected with synchronous motor in synchronous motor, the described main equipment, the generation of described main synchronised clock is to produce row/field sync signal by the synchronizing signal that synchronous motor produces through Sync Separator Chip, and produces chip generation after phase-locked through video clock.
The synchronizing signal of present embodiment is provided by the synchronous motor of outside, as shown in Figure 2.
Embodiment three:
Present embodiment is the improvement of the foregoing description, the refinement of the digital audio and video signals that to be the foregoing description draw about main equipment.Present embodiment is described draws that main video encoding chip is embedding synchronizing information in the step of digital audio and video signals in the digital audio and video signals of digital audio receiving chip output, described digital audio receiving chip parse with the synchronous audio clock of main equipment in parse the synchronizing information that embeds in the digital audio and video signals, and synchronizing information is delivered to the slave unit processor, audio clock generates the slave unit video clock and is delivered to the slave unit processor through phase lock circuitry, and the slave unit processor uses synchronizing information in conjunction with from the synchronization video clock video data being carried out synchronously.
The processing procedure of the described method of present embodiment as shown in Figure 3.The described main equipment of present embodiment adopts by inserting synchronizing signal and realizes broadcasting widely the synchronous of video/audio signal, and more synchronous equipment of needs, therefore in the broadcast digital audio and video signals of one tunnel free time, embed synchronizing information, this digital audio and video signals is given to slave unit, and the slave unit synchronizing signal that the digital audio receiving chip of slave unit parses includes synchronous audio clock and synchronizing information.Giving phase lock circuitry respectively with synchronous audio clock and synchronizing information (can be phase-locked chip, also can be the phase locking unit of processor inside) and slave unit processor (chip can be general processors such as FPGA, DSP or ARM), phase lock circuitry generate with audio clock synchronous from the synchronization video clock, will give the slave unit processor from the synchronization video clock again.The slave unit processor converts pending video/audio to corresponding video/audio code stream according to the synchronizing information of bringing from synchronization video clock and digital audio receiving chip, deliver to slave unit video encoding chip again, generate from looking the audio frequency broadcasting signal by slave unit video encoding chip, have phase-locked relation with the synchronous digital audio and video signals that is given to slave unit from looking the audio frequency broadcasting signal.Thus one, just realized utilizing digital audio and video signals to the video broadcasting signal synchronously.
The digital audio format of AES/EBU(Audio Engineering Society/European Broadcast Union audio engineer association/European Broadcasting Union that present embodiment utilizes) characteristics of digital audio format have been carried out the information embedding.AES/EBU digital audio interface (form) is a kind of a kind of digital audio interface form that is widely used in broadcast television industry and other association areas, can transmit the voice data of two sound channels on a data lines, has certain error detection capability.
The data structure of AES/EBU digital audio interface is (, the former figure of use AES/EBU form definite for expressing) as shown in Figure 4.Audio sampling data (Audio Data) has been placed in the middle of the structure that is called as " Sub-frame " (subframe).Two " Sub-frame " constituted " Frame " (frame), transmits the data of sound channel one (A sound channel) and sound channel two (B sound channel) respectively.
Each " Sub-frame " comprises the preamble(introduction of 4 bits), the auxiliary data(ancillary data of 4 bits), the validity(validity of 1 bit), the user data(user data of 1 bit), the channel status data(channel status data of 1 bit) and the parity bit(check digit of 1 bit).Preamble is used for representing the beginning of " Sub-frame ", have 3 kinds of preamble(and see Table 1), X and Y represent the beginning of the 1st, 2 sound channel " Sub-frame " respectively, Z represents that also Channel status block's is initial except the beginning of representing the 1st sound channel " Sub-frame ".Voice data (Audio Data) can extend to 24 bits, and also need to take 4 bits of auxiliary data this moment except 20 bits of Audio Data.When validity bit was 0, the expression digital audio-frequency data was fit to be converted to analog signal.Parity bit generates even parity check, can detect the odd number error of transmission.User data is not specifically defined, and can transmit required various data by the user.The Channel status data of 1 bit of each " Sub-frame " transmission, 192 bits Channel status data constitute a complete channel status block, each sound channel has the channel status block of oneself, be used for transmitting important information about voice data and transmission link, as this voice data is that professional(is professional) or the consumer(consumer level), the sample frequency of audio frequency (48 kHz or, 44.1 kHz or, 32 kHz), bit wide of voice data (24 bits or, 20 bits) or the like.
In order to reduce DC component, to be convenient to receiving terminal and from the data that receive, correctly to recover clock, AES/EBU has adopted the coded system (see figure 5) of " Biphase-Mark ".This coded system has following two requirements:
1. if former data are " 1 ", then once reverse in the data behind coding, promptly be encoded to " 10 " or " 01 ", if former data are " 0 ", then do not reverse in the data behind coding, promptly be encoded to " 11 " or " 00 ".
2. the data behind the coding are once reversed between two adjacent bit of former data, the former data of intact 1 bit of promptly every coding, and the data behind the coding are once reversed.
Each bit of AES/EBU transmission should carry out " Biphase-Mark " coding, but place exception is arranged: identify the preamble of each " Sub-frame " better in order to make receiving terminal, in preamble, have two places not observe the local (see figure 6) of above-mentioned " Biphase-Mark " coding.According to second requirement of " Biphase-Mark " coding, need carry out data reversal in the place (dotted line is represented among Fig. 6) on each bit border of former data, but shown in oval circle among Fig. 6, have bit border, two places not reverse among the preamble.
Present embodiment embeds synchronizing information in the AES/EBU audio coding method has two kinds of selections.A kind of method is: utilize User data to embed synchronizing information.According to the AES/EBU standard, user data is not specifically defined, and the user can be used for transmitting any information.Therefore, can utilize the user data of AES/EBU to transmit synchronizing information.User data has only 1bit, can only transmit simple information, and for example frame is initial, or is called frame head.For example use 1 representative frame initial, other fill in 0, perhaps on the contrary also can be initial with 0 representative frame, and other fill in 1 or the like.Another kind method is: utilize Audio data to embed synchronizing information.Because the present invention requires to utilize the idle digital audio and video signals of main equipment to broadcast passage slave unit is carried out synchronously, therefore should the free time digital audio and video signals broadcast content that passage broadcasted just unimportant.The data that can utilize this passage to carry out master and slave equipment room send, and transmit any data that define voluntarily, also just can be used for transmitting synchronizing information certainly.Being used for the data bit width of the information of transmitting can reach 24 bits(and take auxiliary data), the user can encode to these 24 bits data as required.For example can be used for representing the row number of current video data.
Embodiment four:
Present embodiment is the improvement of embodiment three, is the improvement of embodiment three about synchronizing information.The described synchronizing information of present embodiment is the frame start information, and described frame start information is embedded in the user data segment of subframe.
Fig. 7 has shown a kind of in the initial position of the frame of Phase Alternation Line system (what show in the every frame 625 capable figure of Phase Alternation Line system is last column of former frame and the first capable position that is connected of back one frame).In the initial moment of frame of video, represent the initial of frame of video in the user of voice data data position with " 1 ", and at other constantly, user data can fill out " 0 ".The digital audio and video signals that main equipment will embed synchronizing information in user data position sends to slave unit, receiving terminal at slave unit, by decoding the data of user data, know the original position of main equipment frame of video, thereby the video that can adjust the slave unit broadcast aligns with the video that main equipment broadcasts, and reaches the purpose with the main equipment audio video synchronization.
Embodiment five:
Present embodiment is the improvement of embodiment three, is the improvement of embodiment three about synchronizing information.The described synchronizing information of present embodiment is a row information, and described row information is embedded in the audio data section of subframe.
Fig. 8 is that example has been described the method for utilizing audio data embedding synchronizing information with the Phase Alternation Line system.Main equipment is embedded among the audio data of digital audio and video signals after the row of current video data number is encoded into binary system.Slave unit is decoded the digital audio and video signals that receives, just learn the current position of main equipment video broadcasting signal, whenever solving video line that main equipment embeds, slave unit number becomes for 1 the moment from 625, can will be somebody's turn to do constantly as the initial moment of the frame of main equipment frame of video, thereby the video that can adjust the slave unit broadcast aligns with the video that main equipment broadcasts, and reaches the purpose with the main equipment audio video synchronization.
It should be noted that at last, below only unrestricted in order to technical scheme of the present invention to be described, although the present invention is had been described in detail with reference to the preferred arrangement scheme, those of ordinary skill in the art is to be understood that, can (embed the process and the method for synchronizing information such as the synchronous process of digital audio and video signals, digital audio and video signals to technical scheme of the present invention, and the front and back sequential scheduling of step) makes amendment or be equal to replacement, and do not break away from the spirit and scope of technical solution of the present invention.
Claims (5)
1. the method for an AES/EBU digital audio and video signals synchronous video signal, the hardware that described method is used comprises: send the main equipment of synchronizing signal and by the synchronous slave unit of main equipment, described main equipment includes: clock generating chip, host device processor, main equipment video encoding chip with phase-locked function; Described slave unit includes: digital audio receiving chip, phase lock circuitry, slave unit processor, slave unit video encoding chip; It is characterized in that the step of described method is as follows:
The step that main synchronised clock produces: be used for video clock generation chip and produce main synchronised clock and be delivered to host device processor;
Produce the step of main video/audio code stream: being used for the main video/audio that host device processor will receive is main video/audio code stream through main synchronised clock Synchronous Processing, and is delivered to main video encoding chip;
Draw the step of digital audio and video signals: be used for main video encoding chip main video/audio code stream is encoded and export main when looking the audio frequency broadcasting signal to slave unit outputting digital audio signal;
Produce the step of slave unit synchronizing signal: be used for the digital audio receiving chip and parse the slave unit synchronizing signal at the digital audio and video signals of receiving;
Generation is from the step of video/audio code stream: be used for the slave unit processor with pending from video/audio through slave unit synchronizing signal Synchronous Processing for from video/audio code stream, and will be delivered to from the video encoding chip from video/audio code stream;
Output is from looking the step of audio frequency broadcasting signal: be used for from the video encoding chip to after encoding from video/audio code stream again output with main look the audio frequency broadcasting signal synchronous from looking the audio frequency broadcasting signal.
2. method according to claim 1, it is characterized in that, the hardware that described method is used also comprises and also includes the synchronizing signal separating chips that is connected with synchronous motor in synchronous motor, the described main equipment, the generation of described main synchronised clock is to produce row/field sync signal by the synchronizing signal that synchronous motor produces through Sync Separator Chip, and produces chip generation after phase-locked through video clock.
3. method according to claim 1 and 2, it is characterized in that, main video encoding chip is embedding synchronizing information in the described step of drawing digital audio and video signals in the digital audio and video signals of digital audio receiving chip output, described digital audio receiving chip parse with the synchronous audio clock of main equipment in parse the synchronizing information that embeds in the digital audio and video signals, and synchronizing information is delivered to the slave unit processor, audio clock resolves to the slave unit video clock and is delivered to the slave unit processor at phase lock circuitry, and the slave unit processor uses synchronizing information in conjunction with synchronous to the alignment that video data carries out frame from the synchronization video clock.
4. method according to claim 3 is characterized in that, described synchronizing information is the frame start information, and described frame start information is embedded in the user data segment of subframe.
5. method according to claim 3 is characterized in that described synchronizing information is embedded in the audio data section of subframe.
Priority Applications (1)
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106063286A (en) * | 2014-02-28 | 2016-10-26 | 高通股份有限公司 | Apparatuses and methods for wireless synchronization of multiple multimedia devices using a common timing framework |
| CN110677233A (en) * | 2018-07-02 | 2020-01-10 | 恩智浦美国有限公司 | Communication unit, integrated circuit and method for clock distribution and synchronization |
| CN113766215A (en) * | 2021-09-07 | 2021-12-07 | 中电科航空电子有限公司 | Airborne passenger cabin passenger broadcasting synchronous testing method and system |
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| CN1418429A (en) * | 2000-03-17 | 2003-05-14 | 汤姆森许可公司 | Method and apparatus for simultaneous recording and displaying two different video programs |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106063286A (en) * | 2014-02-28 | 2016-10-26 | 高通股份有限公司 | Apparatuses and methods for wireless synchronization of multiple multimedia devices using a common timing framework |
| CN110677233A (en) * | 2018-07-02 | 2020-01-10 | 恩智浦美国有限公司 | Communication unit, integrated circuit and method for clock distribution and synchronization |
| CN110677233B (en) * | 2018-07-02 | 2024-01-09 | 恩智浦美国有限公司 | Communication unit, integrated circuit and method for clock distribution and synchronization |
| CN113766215A (en) * | 2021-09-07 | 2021-12-07 | 中电科航空电子有限公司 | Airborne passenger cabin passenger broadcasting synchronous testing method and system |
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| CN102185998B (en) | 2013-05-22 |
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