CN102183333B - Capacitive type pressure transducer containing silicon through holes and manufacturing method thereof - Google Patents

Capacitive type pressure transducer containing silicon through holes and manufacturing method thereof Download PDF

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CN102183333B
CN102183333B CN201010612818A CN201010612818A CN102183333B CN 102183333 B CN102183333 B CN 102183333B CN 201010612818 A CN201010612818 A CN 201010612818A CN 201010612818 A CN201010612818 A CN 201010612818A CN 102183333 B CN102183333 B CN 102183333B
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hole
movable electrode
silicon
pressure transducer
substrate
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CN102183333A (en
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朱智源
朱韫晖
于民
缪旻
金玉丰
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Peking University
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Abstract

The invention discloses a capacitive type pressure transducer containing silicon through holes and a manufacturing method thereof, belonging to the micro-electromechanical technical field. The capacitive type pressure transducer comprises a substrate containing a fixed electrode, a diaphragm containing a movable electrode and a measuring circuit electrically connected with the fixed electrode and the movable electrode; a gap exists between the fixed electrode and the movable electrode to form a capacitor; the movable electrode is positioned in a stepped groove of the diaphragm, the periphery of the movable electrode is provided with a plurality of through holes which are connected with the movable electrode, arranged at intervals and filled, the through holes are positioned in a slope of the stepped groove to separate the movable electrode and part of the slope. The invention further discloses a manufacturing method for the capacitive type pressure transducer containing silicon through holes. The invention can be used in multiple application fields of modern industrial production, scientific research and daily lives.

Description

A kind of capacitance pressure transducer, and manufacturing approach thereof that contains the silicon through hole
Technical field
The present invention relates to capacitance pressure transducer,, be specifically related to a kind of capacitance pressure transducer, and manufacturing approach thereof that contains the silicon through hole, belong to the micromechanics electronic technology field.
Background technology
In modern industrial, scientific research and the daily life, every liquid, gas or steam etc. of utilizing are as the effect that all will embody pressure of transmitting medium.In order to guarantee to produce and scientific research can correctly be controlled, smooth implementation, need utilize pressure transducer to come situation such as the having or not of indicated pressure, size and variation.Wherein, capacitance pressure transducer, has become a big focus of Study on pressure sensor because of advantages such as its low-power consumption, high sensitivity, high output impedance and good dynamic response characteristics.
The basic structure of capacitance pressure transducer, is made up of two parts, promptly comprises the substrate B and the diaphragm A that comprises movable electrode 9 of fixed electorde 8, like Fig. 1 (b) with (c).Movable electrode 9 is sensitive membrane that amount of deflection deformation takes place under pressure effect situation an ability.There is certain spacing between fixed electorde 8 and the movable electrode 9, forms electric capacity.Pressure acts on elasticity sensitive membrane (movable electrode 9), and film generation deformation makes two electrode separations change, and produces relevant capacitance value and changes.Because capacitance is along with change in pressure, capacitance is corresponding each other with force value again, forms the conversion of signals of pressure to electric capacity thus.
Because membrane stress that Surface-micromachining process brought and sticking problem are difficult to solve; Existing capacitance pressure transducer, is the basis with body silicon wet corrosion technique usually; The formation silicon fiml is corroded in the specific region of silicon chip; Then this silicon chip is mounted on another silicon chip (or glass) that is manufactured with fixed electorde; Form the hermetic cavity body, the name of delivering on " sensing technology journal " in October, 2006 like people such as Zhou Wei is called the structure that is adopted in the paper based on " Research on Capacitive Pressure of flip chip technology ".
This sensor manufacturing approach exists following problem: on the one hand, movable electrode is difficult to draw from diaphragm through low-resistance, low-loss mode in the annular seal space, makes the measured value of capacitance signal occur than mistake, thereby influences the accurate measurement of pressure signal; On the other hand, for given pressure, the amount of deflection of silicon fiml depends on the equivalent stiffness of film, and therefore, after transducer calibration was accomplished, it is constant that the rigidity of silicon fiml don't fail to keep.Yet, with regard to the capacitance pressure transducer, of body silicon wet corrosion technique manufacturing, because silicon fiml links to each other with silicon chip dovetail groove inclined-plane after corroding; When normal operation of sensor, silicon chip dovetail groove inclined-plane also will receive the effect generation deformation of transmitting pressure medium, makes silicon fiml except that the effect that receives testing pressure; Also want the extra mechanics influence that receives silicon chip dovetail groove inclined-plane, this perturbed force can resolve into to the axial force of silicon fiml and vertical force, wherein; Axially inside power can reduce the rigidity of silicon fiml; Axially outside power can increase the rigidity of silicon fiml, and the action direction of vertical force is consistent with the direction of testing pressure, makes measured result inaccurate.
More than two aspect problems all can influence the measuring accuracy of capacitance pressure transducer.
Summary of the invention
The present invention is intended to overcome the deficiency of prior art, and design of Si through-hole structure in sensor proposes a kind of follow-on capacitance pressure transducer.
Identical with prior art, capacitance pressure transducer, disclosed by the invention also comprises:
The substrate that contains fixed electorde,
Contain movable electrode diaphragm and
The metering circuit that is electrically connected with said fixed electorde and movable electrode;
There is spacing between said fixed electorde and the said movable electrode, forms electric capacity;
Said movable electrode is positioned at the dovetail groove of said diaphragm,
Be that with the prior art difference be provided with the through hole through filling of the each interval that a plurality of and said movable electrode joins around the said movable electrode, said through hole is arranged in the inclined-plane of said dovetail groove, with said movable electrode and part said inclined-plane separation.
Preferably, said substrate also comprises the gold goal salient point, and said gold goal salient point is positioned at the surface of said substrate, and joins with said through hole.
Preferably, the equidistant each interval of said through hole; The radial section of through hole can be square; The quantity that is positioned at the through hole of the relative both sides of said movable electrode can be identical.
Preferably, said capacitance pressure transducer, also comprises case chip of the prior art, and said case chip comprises the pressure medium transmission channels.
The invention also discloses a kind of manufacturing approach that contains the capacitance pressure transducer, of silicon through hole, it comprises the following steps:
A) make diaphragm through the following step:
I. on the first surface of first silicon substrate, form conductive layer through doping;
Ii. on the second surface of first silicon substrate, form dovetail groove, make a surface exposure of said conductive layer through etching;
Iii. form a plurality of through holes in the inclined-plane and the said conductive layer contact position of said dovetail groove through etching, said through hole each interval is positioned at around the said conductive layer;
Iv. in said through hole, carry out the filling of packing material through electroplating, the packed height of said packing material surpasses the thickness of said conductive layer;
B) make substrate through the following step:
I. on the first surface of second silicon substrate, form oxide layer;
Ii. on said oxide layer, form fixed electorde through metal sputtering and photoetching;
Iii. on said fixed electorde, cover passivation layer;
Iv. on said passivation layer, make the gold goal salient point, and the input end of said gold goal salient point and metering circuit is linked to each other, the position of said gold goal salient point and said through hole is corresponding;
V. on said second silicon substrate, make via hole, and the output terminal of said via hole and metering circuit is linked to each other through filling;
C) said diaphragm is mounted on the said substrate, said gold goal salient point is linked to each other with said through hole.
Preferably, said method also comprises through the following step manufacturing and encapsulation sheet, and in step c), said case chip is mounted on the said substrate:
I. on the first surface of the 3rd silicon substrate, form dovetail groove;
Ii. form a plurality of pressure medium transmission channels in the dovetail groove bottom;
Iii. on the first surface of the 3rd silicon substrate, make the corresponding gold goal solder joint of via hole with substrate.
Compared with prior art, the invention has the beneficial effects as follows:
1) on the diaphragm perpendicular interconnection through hole through fill, with substrate welds after, can play the fixedly effect of movable electrode.Do the time spent when sensor receives transmission medium impressed pressure, can effectively reduce the disturbing effect of dovetail groove inclined-plane movable electrode deformation;
2) movable electrode is drawn through the perpendicular interconnection through hole, has effectively reduced the loss of capacitance signal in transmission course, thereby has measured more accurate signal, has improved the measuring accuracy of sensor.
Description of drawings
Fig. 1 (a) is the vertical view of the sensor movable electrode of prior art, and Fig. 1 (b) is the sectional view of Fig. 1 (a) along aa ' direction, and Fig. 1 (c) is the decomposing schematic representation of Fig. 1 (b);
Fig. 2 (a) is the vertical view of sensor movable electrode of the present invention, and Fig. 2 (b) is the sectional view of Fig. 2 (a) along aa ' direction, and Fig. 2 (c) is a movable electrode, the schematic perspective view on through hole and dovetail groove inclined-plane;
Fig. 3 is the manufacturing process synoptic diagram of embodiment 1 diaphragm;
Fig. 4 is the manufacturing process synoptic diagram of embodiment 1 substrate;
Fig. 5 is the manufacturing process synoptic diagram of embodiment 1 case chip;
Fig. 6 is the package assembly synoptic diagram of embodiment 1 sensor;
Fig. 7 is the manufacturing process synoptic diagram of embodiment 2 substrates;
Fig. 8 is the manufacturing process synoptic diagram of embodiment 2 signal measurement sheets;
Fig. 9 is the structural representation of embodiment 2 sensors;
Wherein:
The A-diaphragm; The B-substrate; The C-diaphragm seal;
1-first silicon substrate; 2-second silicon substrate; 31,32,33,34-gold goal salient point; The 4-through hole; 5-dovetail groove inclined-plane; The 6-passivation layer; The 7-oxide layer; The 8-fixed electorde; The 9-movable electrode; 10-Cr adhesion layer and Au metal level; 11-pressure transmission medium passage; 12-the 3rd silicon substrate; 131, the 132-via hole; The 14-soldered ball; 15-carrier silicon chip; 16-signal measurement sheet.
Embodiment
Below in conjunction with accompanying drawing and specific embodiment the present invention is described in further detail.
Embodiment 1
With reference to figure 2, in the present embodiment, after through hole 4 processes are filled movable electrode 9 is fixed, and capacitance signal is drawn.The length of side of movable electrode 9 is 600 μ m, and the horizontal section of through hole 4 is the square of the length of side 40 μ m, and each limit of movable electrode 9 is fixed by 7 through holes 4.The metal of filling in the through hole 4 must have excellent contact with movable electrode 9, to reduce the loss of signal.
The structure of the sensor of final preparation is as shown in Figure 6, and whole sensor is made up of diaphragm A, substrate B and case chip C.
The technological process of I, diaphragm A is as shown in Figure 3, comprising:
1, prepares n type < 100>twin polishing silicon chip as first silicon substrate 1, shown in Fig. 3 (a);
2, at the first surface gluing of first silicon substrate 1, the district makes the diffusion window by lithography in the silicon fiml design, adopts the solid state doping source to carry out dense boron diffusion and forms conductive layer, obtains movable electrode 9, shown in Fig. 3 (b);
3, adopt positive glue protection, carry out photoetching in the place that diaphragm is used to seal.Etch groove with ICP then, the degree of depth of groove is about 40 μ m, shown in Fig. 3 (c);
4, the Au metal level 10 of the Cr adhesion layer of sputter in groove successively
Figure BDA0000041516840000041
and
Figure BDA0000041516840000042
is shown in Fig. 3 (d);
5, metal-stripping;
6, the second surface at first silicon substrate 1 makes window by lithography, removes oxide layer, adopts KOH solution to carry out wet etching, realizes the release of movable electrode 9, then with carrier 15 bondings, shown in Fig. 3 (e);
7, protect movable electrode 9, the DRIE over etching is carried out with mask in the place that on dovetail groove, needs vertical vias to connect, and forms through hole 4.Wherein, SF 6Gas flow is 130sccm, C 4F 8Gas flow is 100sccm, and microscope carrier power is 600W, and APC (automatic pressure control) selects 60.Every etching 9s post-passivation 7s lets etching and passivation hocket, and finally forms satisfactory through hole 4, shown in Fig. 3 (f);
8, growth SiO in through hole 4 2, make insulation course; Utilize RIE with angle, etch away the part that through hole 4 inwall insulation courses contact with movable electrode 9; Sputtered with Ti/W/Cu in through hole 4 makes diffusion impervious layer and Seed Layer; Movable electrode 9 is protected, then through hole 4 is carried out the copper plating of high-aspect-ratio, till the copper of electroplating exceeds movable electrode 9, shown in Fig. 3 (g);
9, carry out subsequent technique, carrier 15 is separated bonding, shown in Fig. 3 (h)
The technological process of II, substrate B is as shown in Figure 4, comprises
1, select to have made second silicon substrate 2 of circuitry for signal measurement, the circuit protection of device layer is good, shown in Fig. 4 (a).
2, adopt the mode of dried oxygen-wet oxygen-dried oxygen, be about the oxide layer 7 of 1 μ m at the silicon chip blank space layer thickness of growing, shown in Fig. 4 (b).
3, metal sputtering makes fixed electorde 8 and interconnection line by lithography.
4, adopt the pecvd process deposit to go out 1-2 μ m silicon nitride passivation protective seam 6, etch the metal area that is used for the gold goal bump interconnect, shown in Fig. 4 (c).
5, make gold goal salient point 31 and 32, will link to each other with the input end of circuitry for signal measurement with the gold goal salient point 32 that through hole 4 aligns, shown in Fig. 4 (d).
6, protect structure and the circuit of making on the substrate, with carrier 15 bondings, shown in Fig. 4 (e).
7, the DRIE over etching is carried out with mask in the place that on substrate, needs vertical vias to connect, and forms via hole 131, shown in Fig. 4 (f).
8, growth SiO in via hole 131 2, make insulation course; Sputtered with Ti/W/Cu in via hole makes diffusion impervious layer and Seed Layer; Structural defence on the substrate is good, then via hole 131 is carried out the copper plating of high-aspect-ratio, till electroplating full whole via hole 131, shown in Fig. 4 (g).
11, via hole 131 is linked to each other with the output terminal of metering circuit, carrier 15 is separated bonding, shown in Fig. 4 (h).
12, make soldered ball 14 at the other end of via hole 131, shown in Fig. 4 (i).
The technological process of III, case chip C is as shown in Figure 5, comprises
1, prepares n type < 100>twin polishing silicon chip as the 3rd silicon substrate 12;
2, gluing makes positive window by lithography, adopts KOH solution to carry out wet etching and forms dovetail groove, shown in Fig. 5 (a).
3, at the silicon chip backsizing, carve plurality of windows in the dovetail groove bottom light, utilize ICP to etch through hole, shown in Fig. 5 (b) as pressure transmission medium passage 11.
4, do not made the gold goal solder joint 33 that aligns with the via hole 131 of substrate B at the silicon chip back side, shown in Fig. 5 (c) by KOH corrosion place.
Successively diaphragm A and case chip C are mounted on the substrate B, promptly can be made into capacitance pressure transducer,, as shown in Figure 6.
Embodiment 2
The structure of the sensor of final preparation is as shown in Figure 9, and whole sensor is made up of diaphragm A, substrate B, signal measurement sheet D and case chip C.
The technological process of diaphragm A and case chip C is the same with the technological process of instance one, repeats no more.
The technological process of substrate B is as shown in Figure 7, comprises
1, prepares blank silicon chip as second silicon substrate 2, shown in Fig. 7 (a).
2, adopt the mode of dried oxygen-wet oxygen-dried oxygen, be about the oxide layer 7 of 1 μ m at the silicon chip blank space layer thickness of growing, shown in Fig. 7 (b).
3, metal sputtering makes fixed electorde 8 and interconnection line by lithography.
4, adopt the pecvd process deposit to go out 1-2 μ m silicon nitride passivation protective seam 6, etch the metal area that is used for the gold goal bump interconnect, shown in Fig. 7 (c).
5, make gold goal salient point 31 and 32, shown in Fig. 7 (d).
6, protect structure and the interconnection of making, with carrier 15 bondings, shown in Fig. 7 (e).
7, on substrate need with vertical vias draw capacitance signal the place carry out the DRIE over etching with mask, form via hole 131, shown in Fig. 7 (f).
8, growth SiO in via hole 131 2, make insulation course; Sputtered with Ti/W/Cu in via hole makes diffusion impervious layer and Seed Layer; Sensitive structure on the substrate is protected, then via hole 131 is carried out the copper plating of high-aspect-ratio, till electroplating full whole via hole 131, shown in Fig. 7 (g).
11, carrier 15 is separated bonding, shown in Fig. 7 (h).
The technological process of signal measurement sheet is as shown in Figure 8, comprises
1, the silicon chip of selecting to have made circuitry for signal measurement is as signal measurement sheet 16, and the circuit protection of device layer is good, shown in Fig. 8 (a).
2, make gold goal salient point 34, it is linked to each other with the input end of circuitry for signal measurement, shown in Fig. 8 (b).
3, protect structure and the circuit of making on the signal measurement sheet 16, with carrier 15 bondings;
4, on the signal measurement sheet, 16 need carry out the DRIE over etching with mask, form via hole 132, shown in Fig. 8 (c) with the place of vertical vias interconnection.
5, growth SiO in via hole 132 2, make insulation course; Sputtered with Ti/W/Cu in via hole makes diffusion impervious layer and Seed Layer; Sensitive structure on the signal measurement sheet 16 is protected, then via hole 132 is carried out the copper plating of high-aspect-ratio, till electroplating full whole via hole 132, shown in Fig. 8 (d).
8, via hole is linked to each other with the output terminal of metering circuit, carrier 15 is separated bonding;
9, make soldered ball 14 at the other end of via hole, shown in Fig. 8 (e).
Successively diaphragm A and case chip C and substrate B, signal measurement sheet 16 are assembled, promptly can be made into capacitance pressure transducer,, as shown in Figure 9.
More than through detailed example the present invention has been described, it will be understood by those of skill in the art that in the scope that does not break away from essence of the present invention, can make certain deformation or modification to the present invention; Its preparation method also is not limited to disclosed content among the embodiment.

Claims (7)

1. capacitance pressure transducer, that contains the silicon through hole, it comprises the substrate that contains fixed electorde, contains the diaphragm of movable electrode and the metering circuit that is electrically connected with said fixed electorde and movable electrode; There is spacing between said fixed electorde and the said movable electrode, forms electric capacity; Said movable electrode is positioned at the dovetail groove of said diaphragm,
It is characterized in that,
Be provided with the through hole through filling of the each interval that a plurality of and said movable electrode joins around the said movable electrode, said through hole is arranged in the inclined-plane of said dovetail groove, with said movable electrode and part said inclined-plane separation; Said substrate comprises also and the gold goal salient point of said through hole alignment that the input end of said metering circuit connects said gold goal salient point, and the output terminal of said metering circuit connects said on-chip via hole.
2. like claims 1 described capacitance pressure transducer, that contains the silicon through hole, it is characterized in that the equidistant each interval of said through hole.
3. like claims 1 described capacitance pressure transducer, that contains the silicon through hole, it is characterized in that the radial section of said through hole is square.
4. like claims 1 described capacitance pressure transducer, that contains the silicon through hole, it is characterized in that the quantity of through hole that is positioned at the relative both sides of said movable electrode is identical.
5. like any described capacitance pressure transducer, that contains the silicon through hole of claims 1-4, it is characterized in that said capacitance pressure transducer, also comprises case chip, said case chip comprises the pressure medium transmission channels.
6. manufacturing approach that contains the capacitance pressure transducer, of silicon through hole, it comprises the following steps:
A) make diaphragm through the following step:
I. on the first surface of first silicon substrate, form conductive layer through doping;
Ii. on the second surface of first silicon substrate, form dovetail groove, make a surface exposure of said conductive layer through etching;
Iii. form a plurality of through holes in the inclined-plane and the said conductive layer contact position of said dovetail groove through etching, said through hole each interval is positioned at around the said conductive layer;
Iv. in said through hole, carry out the filling of packing material through electroplating, the packed height of said packing material surpasses the thickness of said conductive layer;
B) make substrate through the following step:
I. on the first surface of second silicon substrate, form oxide layer;
Ii. on said oxide layer, form fixed electorde through metal sputtering and photoetching;
Iii. on said fixed electorde, cover passivation layer;
Iv. on said passivation layer, make the gold goal salient point, and the input end of said gold goal salient point and metering circuit is linked to each other, the position of said gold goal salient point and said through hole is corresponding;
V. on said second silicon substrate, make via hole, and the output terminal of said via hole and metering circuit is linked to each other through filling;
C) said diaphragm is mounted on the said substrate, said gold goal salient point is linked to each other with said through hole.
7. the manufacturing approach that contains the capacitance pressure transducer, of silicon through hole as claimed in claim 6 is characterized in that, said method also comprises: through the following step manufacturing and encapsulation sheet, and in step c), said case chip is mounted on the said substrate:
I. on the first surface of the 3rd silicon substrate, form dovetail groove;
Ii. form a plurality of pressure medium transmission channels in the dovetail groove bottom;
Iii. on the first surface of the 3rd silicon substrate, make the corresponding gold goal solder joint of via hole with substrate.
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