CN102176421A - Method for measuring accumulated thickness of MOS (metal oxide semiconductor) tube gate oxide layer - Google Patents
Method for measuring accumulated thickness of MOS (metal oxide semiconductor) tube gate oxide layer Download PDFInfo
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- CN102176421A CN102176421A CN2011100616414A CN201110061641A CN102176421A CN 102176421 A CN102176421 A CN 102176421A CN 2011100616414 A CN2011100616414 A CN 2011100616414A CN 201110061641 A CN201110061641 A CN 201110061641A CN 102176421 A CN102176421 A CN 102176421A
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Abstract
The invention discloses a method for measuring the accumulated thickness of an MOS (metal oxide semiconductor) tube gate oxide layer, comprising the following steps: S1, regulating a test voltage to be close to a breakdown voltage between a grid and a substrate; S2, measuring the capacitance of a gate oxide layer in accordance with the test voltage in the S1; and S3, calculating the accumulated thickness of the gate oxide layer in accordance with the capacitance in the S2. The calculation formula of the accumulated thickness of the gate oxide layer is as follows: Tox=epsilon*epsilon0*A/Cox, wherein Tox represents the accumulated thickness of the gate oxide layer, Cox represents the capacitance of the gate oxide layer, epsilon represents a vacuum permittivity, epsilon0 represents a dielectric constant and A represents a capacitance area. The method provided by the invention is applied to measuring the thinner MOS tube gate oxide layers.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, particularly a kind of method of measurement of metal-oxide-semiconductor grid oxic horizon cumulative thickness.
Background technology
In technical field of manufacturing semiconductors, the finished product semiconductor device comprises basic devices such as a lot of metal-oxide-semiconductors, in order to grasp the process parameter of MOS, measure the thickness of metal-oxide-semiconductor grid oxic horizon accumulation.The method for measuring thickness of metal-oxide-semiconductor grid oxic horizon accumulation is in the prior art: (1), measure the capacitance Cox of metal-oxide-semiconductor grid oxic horizon for ± Vdd according to supply power voltage; (2), calculate the accumulation thickness of metal-oxide-semiconductor grid oxic horizon according to capacitance Cox.Wherein the NMOS pipe is+Vdd, and the PMOS pipe is-Vdd.The computing formula of the accumulation thickness T ox of grid oxic horizon is Tox=ε * ε 0 * A/Cox, and wherein, Cox is the capacitance of grid oxic horizon, and ε is a permittivity of vacuum, and ε 0 is the dielectric constant of SiO2, and A is a capacity area.
This kind method, when the thicker metal-oxide-semiconductor grid oxic horizon of thickness was measured its capacitance, metal-oxide-semiconductor entered saturation condition under the effect of supply power voltage ± Vdd, and then the measurement of capacitance will be very accurate.But when the metal-oxide-semiconductor grid oxic horizon of thinner thickness was measured its capacitance, because supply power voltage ± Vdd does not make metal-oxide-semiconductor enter saturation condition, therefore, the capacitance of measurement had very large deviation.Deviation appears in capacitance, and then the calculating of the cumulative thickness of metal-oxide-semiconductor grid oxic horizon is also just inaccurate.The above thickness range of 25 dusts is that thickness is thicker, and the following thickness range of 25 dusts is a thinner thickness.
In sum, the method for measuring thickness of metal-oxide-semiconductor grid oxic horizon accumulation in the prior art, its shortcoming is: be not suitable for the measurement of the metal-oxide-semiconductor grid oxic horizon of thinner thickness.
Summary of the invention
Technical problem to be solved by this invention has provided a kind of method of measurement of metal-oxide-semiconductor grid oxic horizon cumulative thickness, and this method is applicable to the measurement of the metal-oxide-semiconductor grid oxic horizon of thinner thickness.
In order to solve the problems of the technologies described above, technical scheme of the present invention is: a kind of method of measurement of metal-oxide-semiconductor grid oxic horizon cumulative thickness may further comprise the steps:
S1 adjusts test voltage, makes it near the puncture voltage between grid and the substrate;
S2 is according to the capacitance of the measurement of the test voltage described in S1 grid oxic horizon;
S3 is according to the accumulation thickness of the calculating of the capacitance described in S2 grid oxic horizon.
Further, the accumulation thickness T ox computing formula of described grid oxic horizon is Tox=ε * ε
0* A/Cox, wherein, Tox is the cumulative thickness of grid oxic horizon, and Cox is the capacitance of grid oxic horizon, and ε is a permittivity of vacuum, and ε 0 is the dielectric constant of SiO2, A is a capacity area.。
The invention has the beneficial effects as follows: because after metal-oxide-semiconductor entered saturation condition, the capacitance that the test voltage of this moment records was more accurate.When the capacitance of the metal-oxide-semiconductor grid oxic horizon of measuring thinner thickness, after test voltage adopted the supply power voltage of metal-oxide-semiconductor, supply power voltage can not make metal-oxide-semiconductor enter saturation condition.And after adopting test voltage of the present invention, then can make metal-oxide-semiconductor enter saturation condition.At this moment, it is more accurate to record the capacitance of metal-oxide-semiconductor grid oxic horizon.Then according to the accumulation THICKNESS CALCULATION formula Tox=ε * ε of grid oxic horizon
0* A/Cox, the accumulation one-tenth-value thickness 1/10 of the grid oxic horizon that calculates are also relatively accurately.In the computing formula, Tox is the accumulation thickness of grid oxic horizon, and Cox is the capacitance of grid oxic horizon, and ε is a permittivity of vacuum, and ε 0 is the SiO2 dielectric constant, and A is a capacity area.
In sum, the method for measurement of metal-oxide-semiconductor grid oxic horizon cumulative thickness of the present invention is applicable to the measurement of thin grid oxic horizon cumulative thickness.
Embodiment
The method of measurement of metal-oxide-semiconductor grid oxic horizon cumulative thickness of the present invention may further comprise the steps:
S1 adjusts test voltage, makes it near the puncture voltage between grid and the substrate;
S2 is according to the capacitance of the measurement of the test voltage described in S1 grid oxic horizon;
S3 is according to the accumulation thickness of the calculating of the capacitance described in S2 grid oxic horizon.
The accumulation THICKNESS CALCULATION formula of metal-oxide-semiconductor grid oxic horizon is Tox=ε * ε
0* A/Cox.In the computing formula, Tox is the accumulation thickness of grid oxic horizon, and Cox is the capacitance of grid oxic horizon, and ε is a permittivity of vacuum, and ε 0 is the SiO2 dielectric constant, and A is a capacity area.
Preferably, capacitance measuring tester is adopted in the measurement of the capacitance of metal-oxide-semiconductor grid oxic horizon.During measurement, at first, adjust the test voltage of capacitance measuring tester, make it near the puncture voltage between grid and the substrate; Secondly, source electrode, drain electrode, the substrate of metal-oxide-semiconductor is serially connected, joins with a probe of capacitance measuring tester, another probe of capacitance measuring tester connects the grid of metal-oxide-semiconductor.
Because after metal-oxide-semiconductor entered saturation condition, the capacitance that the test voltage of this moment records was more accurate.Therefore, when the capacitance of the metal-oxide-semiconductor grid oxic horizon of measuring thinner thickness, after test voltage adopted the supply power voltage of metal-oxide-semiconductor, supply power voltage can not make metal-oxide-semiconductor enter saturation condition.And after adopting test voltage of the present invention, then can make metal-oxide-semiconductor enter saturation condition.At this moment, it is more accurate to record the capacitance of metal-oxide-semiconductor grid oxic horizon.Then according to the accumulation THICKNESS CALCULATION formula Tox=ε * ε of grid oxic horizon
0* A/Cox, the one-tenth-value thickness 1/10 that calculates are also relatively accurately.In sum, the method for measurement of metal-oxide-semiconductor grid oxic horizon cumulative thickness of the present invention is applicable to the measurement of thin grid oxic horizon cumulative thickness.
Claims (2)
1. the method for measurement of a metal-oxide-semiconductor grid oxic horizon cumulative thickness is characterized in that, may further comprise the steps:
S1 adjusts test voltage, makes it near the puncture voltage between grid and the substrate;
S2 is according to the capacitance of the measurement of the test voltage described in S1 grid oxic horizon;
S3 is according to the accumulation thickness of the calculating of the capacitance described in S2 grid oxic horizon.
2. the method for measurement of metal-oxide-semiconductor grid oxic horizon cumulative thickness according to claim 1 is characterized in that, the accumulation THICKNESS CALCULATION formula of described grid oxic horizon is Tox=ε * ε
0* A/Cox, wherein, Tox is the cumulative thickness of grid oxic horizon, and Cox is the capacitance of grid oxic horizon, and ε is a permittivity of vacuum, and ε 0 is the dielectric constant of SiO2, A is a capacity area.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2011100616414A CN102176421A (en) | 2011-03-15 | 2011-03-15 | Method for measuring accumulated thickness of MOS (metal oxide semiconductor) tube gate oxide layer |
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| CN2011100616414A CN102176421A (en) | 2011-03-15 | 2011-03-15 | Method for measuring accumulated thickness of MOS (metal oxide semiconductor) tube gate oxide layer |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102854398A (en) * | 2012-08-23 | 2013-01-02 | 上海宏力半导体制造有限公司 | Measuring method of parasitic capacitances and calculating method of thickness of gate medium layer |
| CN104282250A (en) * | 2014-10-24 | 2015-01-14 | 深圳市华星光电技术有限公司 | Method and system for controlling MIS structure design in TFT |
| CN105448763A (en) * | 2014-09-30 | 2016-03-30 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor structure for measuring thickness of gate medium layer and gate medium layer thickness measuring method |
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| US6465267B1 (en) * | 2001-04-02 | 2002-10-15 | Advanced Micro Devices, Inc. | Method of measuring gate capacitance to determine the electrical thickness of gate dielectrics |
| CN101217137A (en) * | 2007-12-26 | 2008-07-09 | 上海宏力半导体制造有限公司 | A measurement construction to enhance the electricity thickness measuring accuracy of an oxide layer of P trap bar |
| CN101556929A (en) * | 2009-05-19 | 2009-10-14 | 上海宏力半导体制造有限公司 | Method for measuring thickness of grid oxide layer |
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2011
- 2011-03-15 CN CN2011100616414A patent/CN102176421A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6465267B1 (en) * | 2001-04-02 | 2002-10-15 | Advanced Micro Devices, Inc. | Method of measuring gate capacitance to determine the electrical thickness of gate dielectrics |
| CN101217137A (en) * | 2007-12-26 | 2008-07-09 | 上海宏力半导体制造有限公司 | A measurement construction to enhance the electricity thickness measuring accuracy of an oxide layer of P trap bar |
| CN101556929A (en) * | 2009-05-19 | 2009-10-14 | 上海宏力半导体制造有限公司 | Method for measuring thickness of grid oxide layer |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102854398A (en) * | 2012-08-23 | 2013-01-02 | 上海宏力半导体制造有限公司 | Measuring method of parasitic capacitances and calculating method of thickness of gate medium layer |
| CN105448763A (en) * | 2014-09-30 | 2016-03-30 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor structure for measuring thickness of gate medium layer and gate medium layer thickness measuring method |
| CN105448763B (en) * | 2014-09-30 | 2018-06-01 | 中芯国际集成电路制造(上海)有限公司 | Measure the semiconductor structure of gate dielectric layer thickness and gate dielectric layer method for measuring thickness |
| CN104282250A (en) * | 2014-10-24 | 2015-01-14 | 深圳市华星光电技术有限公司 | Method and system for controlling MIS structure design in TFT |
| CN104282250B (en) * | 2014-10-24 | 2016-08-31 | 深圳市华星光电技术有限公司 | In TFT MIS structure design control method and system |
| US9857655B2 (en) | 2014-10-24 | 2018-01-02 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Method for controlling MIS structure design in TFT and system thereof |
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Owner name: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING Free format text: FORMER OWNER: HONGLI SEMICONDUCTOR MANUFACTURE CO LTD, SHANGHAI Effective date: 20140505 |
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Application publication date: 20110907 |