CN102169956B - WOx-based resistive memory and preparation method thereof - Google Patents
WOx-based resistive memory and preparation method thereof Download PDFInfo
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Abstract
The invention belongs to the field of resistive memory technology and specifically relates to a WOx-based resistive memory and a preparation method thereof. The preparation method comprises the steps of directly forming a silicon layer having a thickness less than or equal to ten nanometers on a W layer and oxidizing the W layer and the silicon layer at the same time to generate a WOx-based storage medium layer. Therefore, the preparation method of the WOx-based resistive memory is simple and exhibits low production cost. Meanwhile, the WOx-based resistive memory has the advantages of high rate of final products, low power consumption, improved read disturbance resistance performance and high fatigue property.
Description
Technical field
The invention belongs to the resistor-type memory technical field, be specifically related to a kind of WOx-based resistive memory, relate in particular to and a kind ofly form memory of tungsten oxide base storage medium layer and preparation method thereof by tungsten metal and the thin-layer silicon that covers are carried out oxidation simultaneously.
Background technology
Memory occupies an important position in semi-conductor market, because portable electric appts is constantly universal, the share of nonvolatile memory in whole storage market is also increasing, and wherein the share more than 90% is occupied by FLASH.But because the requirement of stored charge, the floating boom of FLASH can not have the limit of report prediction FLASH technology about 32nm with technology for the unrestricted attenuate of development, and this just forces people to seek the more superior nonvolatile memory of future generation of performance.Recently electric resistance transition memory spare (Resistive Switching Memory) but because its high density, low cost break-through skill cause for the characteristics of development restriction shows great attention to, employed material has the SrZrO of phase-change material, doping
3, ferroelectric material PbZrTiO
3, ferromagnetic material Pr
1-xCa
xMnO
3, binary metal oxide material, organic material etc.
Resistor-type memory makes storage medium reversible transformation between high resistance state (High ResistanceState, HRS) and low resistance (Low Resistance State, LRS) state by the effect of the signal of telecommunication, thereby realizes memory function.The storage medium material that resistor-type memory uses can be various metal oxide materials, a kind of as in two yuan of metal oxides of WOx (1＜x≤3) material wherein, because tungsten (W) extensive use in the tungsten plug of aluminium interconnection process technology, can above the W embolism, generating through conventional means of WOx material, such as plasma oxidation, thermal oxidation etc., with low cost, and can with the multilayer interconnection line, realize three-dimensional stacking structure.But, as the WOx material of storage medium generally in the nano-scale rank, although the autoxidation speed of W metal is not very fast, but form the WOx material for direct oxidation on tungsten plug, the thickness of its WOx storage medium layer still is difficult to control, therefore causes the process controllability of this memory relatively poor.In addition, in the prior art, therefore the high-impedance state of WOx Memister does not satisfy the demand of the low-power consumption of Memister relatively about 1k-10k ohm.
Simultaneously, report in the prior art, the WOx storage medium mixes certain element material (elements such as Ti, La, Mn), has equally storage characteristics, still exist with the WOx form in the storage medium layer of tungsten material after doping, we define this storage medium is WOx base storage medium, is called WOx-based resistive memory with WOx base storage medium as the memory of storing Information Level.Wherein, mixing in WOx (Si-WOx) behind the silicon, have equally storage characteristics, is belong to WOx base storage medium a kind of.
For resistor-type memory, the physical characteristic of storage medium directly affects memory property.And for the current WOx based resistance memory that is in laboratory stage, still need constantly to improve its memory property to satisfy the needs of practical application, for example, improve Roff (high-impedance state value), Ron (low resistance state value) to reduce power consumption, improve the anti-jamming performance (Read Disturbance) of reading, improve fatigue properties (Endurance), improve the uniformity of film of storage medium, to improve rate of finished products etc.Chinese patent application number is in 200810238945.1 the patent, by inserting one deck resilient coating between storage medium layer and top electrode, improving Roff, Ron, and reduces operating voltage.But in this patent, storage medium layer and resilient coating are step by step, layering forms respectively.
Summary of the invention
The technical problem to be solved in the present invention is to improve the memory property of WOx-based resistive memory.
For solving above technical problem, the invention provides a kind of preparation method of WOx-based resistive memory, its by on the tungsten metal level, directly form thickness be less than or equal to the silicon layer of 10 nanometers, then to described tungsten metal level and silicon layer simultaneously together oxidation processes form tungsten oxide base storage medium layer.
According to method provided by the present invention, wherein, composition forms top electrode on described tungsten oxide base storage medium; Described tungsten metal level composition is formed on the bottom electrode or described tungsten metal level is set to bottom electrode.
Described silicon layer is continuous amorphous silicon membrane layer.
Preferably, the thickness range of described silicon layer is 1 to 5 nanometer.
Described top electrode is TaN, Ta, TiN, Ti, W, Al, Ni, Co or several composite bed among them.
According to method provided by the present invention, wherein, described tungsten oxide base storage medium layer can be the WSiO layer, perhaps can be the composite bed of WSiO layer and WOx layer, perhaps the composite bed of silicon oxide layer, WSiO layer and WOx layer can be, perhaps the composite bed of silicon oxide layer and WSiO layer can be; Wherein, 1＜x≤3.
The present invention provides simultaneously by the prepared WOx-based resistive memory of the above method, and it comprises:
Bottom electrode;
The tungsten oxide base storage medium layer that comprises the WSiO layer; And
Top electrode.
According to WOx-based resistive memory provided by the present invention, wherein, described tungsten oxide base storage medium layer only is the WSiO layer; Described tungsten oxide base storage medium layer can be the composite bed of silicon oxide layer, WSiO layer and WOx layer; Described tungsten oxide base storage medium layer is the composite bed of silicon oxide layer and WSiO layer; Wherein, 1＜x≤3.
Preferably, described tungsten oxide base storage medium layer is the composite bed of WSiO layer and WOx layer, wherein, and 1＜x≤3.
Preferably, described bottom electrode is tungsten metal bottom electrode.
As an embodiment wherein, described tungsten metal bottom electrode is the tungsten plug in the aluminium interconnection structure, and described tungsten oxide base storage medium is formed at the tungsten plug top.
Described top electrode can be TaN, Ta, TiN, Ti, W, Al, Ni, Co or their composite bed.
The present invention further provides can with the aluminium integrated method for preparing WOx-based resistive memory of backend process that interconnects, it may further comprise the steps:
(1) provide the tungsten plug in the conventional aluminium interconnection process to make complete structure, tungsten plug is as the bottom electrode of described WOx-based resistive memory;
(2) cover the formation sacrificial dielectric layer at described tungsten plug;
(3) position that wish forms WOx-based resistive memory in described sacrificial dielectric layer makes hole, exposes described tungsten plug;
(4) sedimentary deposit directly forms the silicon layer that thickness is less than or equal to 10 nanometers;
(5) with described tungsten plug and silicon layer simultaneously together oxidation processes form tungsten oxide base storage medium layer;
(6) deposition top electrode metal material forms top electrode to top electrode metal material cmp;
(7) remove sacrificial dielectric layer and the formed silicon oxide layer of silicon layer oxidation.
Technique effect of the present invention is, by thin layer silicon layer and tungsten simultaneous oxidation, have the advantages that technique is simple, preparation cost is low, its formed WOx-based resistive memory can improve Roff, Ron (having reduced power consumption of memory) simultaneously, can improve the anti-jamming performance of reading, fatigue properties can be improved, the uniformity of film of storage medium can be improved, to improve rate of finished products.
Description of drawings
Fig. 1 is the method schematic diagram for preparing WOx-based resistive memory provided by the invention;
Fig. 2 to Fig. 5 illustrates the preparation process schematic diagram of method shown in Figure 1 by structure example;
Fig. 6 is based on the second embodiment WOx based resistance memory that preparation method shown in Figure 1 forms;
Fig. 7 is based on the 3rd embodiment WOx based resistance memory that preparation method shown in Figure 1 forms;
Fig. 8 is based on the 4th embodiment WOx based resistance memory that preparation method shown in Figure 1 forms;
Fig. 9 is the AES analysis schematic diagram according to the tungsten oxide base storage medium of the WOx-based resistive memory of embodiment of the method preparation shown in Figure 1;
Figure 10 is the structural representation that is integrated in the WOx-based resistive memory in the aluminium interconnection provided by the invention;
Figure 11 to Figure 18 is the structural representation of preparation method's process of WOx based resistance memory embodiment illustrated in fig. 10.
Embodiment
The present invention is now more fully described with reference to the accompanying drawings, shown in the drawings of exemplary embodiment of the present invention.But the present invention can realize according to a lot of different forms, and should not be understood to be limited to the embodiment of these elaborations.On the contrary, provide these embodiment so that the disclosure becomes thoroughly and be complete, and design of the present invention is passed to those skilled in the art fully.In the accompanying drawings, for the sake of clarity, exaggerated the thickness in layer and zone.In the accompanying drawings, identical label refers to identical part or parts, therefore will omit description of them.
Figure 1 shows that the method schematic diagram for preparing tungsten oxide (WOx) based resistance memory provided by the invention.In this embodiment, mainly provide the committed step that is different from prior art, other do not embody spirit of the present invention, those skilled in the art know and know that concrete the next method step is not described in detail.Fig. 2 illustrates the preparation process schematic diagram of method shown in Figure 1 to Figure 5 shows that by structure example.Below in conjunction with Fig. 1 to Fig. 5, the method for preparing the WOx based resistance memory of this embodiment is described in detail.
Step S10, composition forms the tungsten metal level on bottom electrode.
As shown in Figure 2, can composition on bottom electrode 40 form tungsten metal level 21 ', lower electrode layer can be various conductivity thin layer preferably.In another embodiment, lower electrode layer 40 can directly be chosen as the tungsten metal level, therefore in this embodiment, can omit step S10, forms in the bottom electrode step at composition in other words and has namely finished step S10.
Step S20 directly forms the silicon layer that thickness is less than or equal to 10 nanometers on the tungsten metal level.
As shown in Figure 3, continue composition on the tungsten metal level 21 ' and directly form silicon layer 22, silicon layer 22 is directly to be formed on the tungsten metal level 21 ', so silicon layer 22 can directly contact with tungsten metal level 21 '.In order to make in follow-up oxidation treatment step, whole or most silicon layers can both be used for and the common oxidation of tungsten metal level with mutually mixing formula, and the thickness of silicon layer is less than 10 nanometers, preferably, the thickness of silicon layer is 1 to 5nm, for example can be chosen as 2nm, 2.5nm, 3nm.In a certain embodiment, silicon layer 22 can be continuous amorphous silicon membrane.But, silicon layer 22 whether continuously and the actual crystal version of silicon be not subjected to the restriction of of the present invention and embodiment.In addition, silicon layer 22 can form by spatter film forming technique.
Step S30, to tungsten metal level and silicon layer simultaneously together oxidation processes form tungsten oxide base storage medium layer.
As shown in Figure 4, core of the present invention is tungsten metal level and silicon layer oxidation processes together simultaneously.Together during oxidation processes, the tungsten that is contacted with silicon layer of tungsten metal level can diffuse in the silicon layer, silicon in the silicon layer can diffuse in the tungsten metal level, thereby realizes that the common oxidation in mutual doping formula ground forms tungsten oxide base storage medium layer 30, in this embodiment, silicon layer is chosen as 2nm, process conditions by the control oxidation such as temperature, time etc., can realize that the whole diffusion types of the silicon ground of silicon layer 22 is mixed in the tungsten metal, simultaneously, the part of tungsten metal level is oxidized.Therefore, tungsten oxide base storage medium layer 30 is mixing among the WOx Si or SiO (chemistry of Si and O is than not limited by this embodiment) in this embodiment, and wherein element silicon is to stem from silicon layer 22.The tungsten oxide base storage medium layer 30 of this embodiment can be expressed as WSiO, and the concrete chemical analysis of W, Si, O is than not limited by this embodiment.Become tungsten metal level 21 after tungsten metal level 21 ' the oxidized consumption part, this tungsten metal level 21 can be as the bottom electrode of formed tungsten oxide base storage medium layer 30.The thickness of tungsten oxide base storage medium layer 30 is greater than the thickness sum of silicon layer 22 with the tungsten metal level that consumes.Further need to prove, is not uniformly based on the distribution of the Si in the tungsten oxide base storage medium layer 30 of WSiO or O, generally speaking, the closer to W metal level 21, it is relatively less to contain Si chemistry percentage, and the closer to tungsten oxide base storage medium layer surface, the amount of the O that it is contained is relatively more.Have in the situation of storage characteristics in tungsten oxide base storage medium layer, the distribution form of the chemical percentage of the W in its thin layer, Si, O has various variations (for example the variation because of the oxidation technology condition changes).
In addition, in this step, the method for oxidation processes can have the methods such as plasma oxidation, thermal oxidation or Implantation oxidation, and concrete oxidation technology condition can be selected according to the factors such as thickness of silicon layer 22.Preferably, after oxidation processes is finished, can carry out the high temperature anneal to WOx base storage medium, its annealing region is 200 ℃-600 ℃.
Except embodiment illustrated in fig. 4, the tungsten oxide base storage medium layer that oxidation processes forms also has the embodiment of other situation, will further explain in the back.
Step S40, composition forms top electrode.
As shown in Figure 5, composition forms top electrode 50 on WOx base storage medium 30.Top electrode 50 is generally the good metal level of conductive characteristic or metal composite layer, and for example, it can for top electrode is TaN, Ta, TiN, Ti, W, Al, Ni, Co or their composite bed, can consider to select top electrode according to the metal work function factor.So far, the preparation of WOx based resistance memory is finished, the first embodiment WOx based resistance memory that also namely forms based on preparation method shown in Figure 1 shown in Figure 5.
Because the difference of the process conditions of the difference of silicon layer thickness and oxidation processes, can also form the WOx based resistance memory of following examples.
Figure 6 shows that the second embodiment WOx based resistance memory that forms based on preparation method shown in Figure 1.In this embodiment, if the thickness of silicon layer is relatively thin, when for example 3nm was following, oxidation processes can make the whole diffusing, dopings of silicon be distributed in the WSiO layer 32, no longer individualism Si layer or SiO in the memory
2Layer, simultaneously, also have part tungsten metal level not formed WOx (1＜x≤3) layer 31 by silicon layer doping Si, WOx layer 31 and the WSiO layer 32 common tungsten oxide base storage medium layer that forms, need to prove, be not to have as shown in Figure 6 obvious line of demarcation between WOx layer 31 and the WSiO layer 32, and WOx layer 31 to WSiO layer 32 are progressively transition, also be that Si contained in the WSiO layer is reduced to gradually at 0 o'clock, namely become the WOx layer.Therefore, in fact, WOx layer 31 is relative tight with WSiO layer 32 physical bond, and here same unified definition is tungsten oxide base storage medium layer.The tungsten oxide base storage medium layer 30 of this embodiment has the storage characteristics of mutually changing equally between high-impedance state and low resistance state, what have storage characteristics can be separately be WOx layer 31, also can be WSiO/WOx both (among the WSiO are general have WOx's with storage characteristics).When WOx layer 31 had storage characteristics separately, WSiO layer 32 can be defined as the resilient coating in the tungsten oxide base storage medium layer, and its resilient coating has obvious effect to improving storage characteristics; For example, improve Roff (high-impedance state value), Ron (low resistance state value) to reduce power consumption, improve the anti-jamming performance (Read Disturbance) of reading, improve fatigue properties (Endurance), improve the uniformity of film of storage medium, to improve rate of finished products.
Figure 7 shows that the 3rd embodiment WOx based resistance memory that forms based on preparation method shown in Figure 1.In this embodiment, if the thickness of silicon layer is relatively thick, when for example 5nm was above, oxidation processes can not make the whole diffusing, dopings of silicon be distributed in the WSiO layer 32, also may individualism silicon oxide layer 33 in the memory.With respect to embodiment illustrated in fig. 6, among this embodiment, the thickness range of silicon oxide layer 33 is generally below the 6nm.Equally, be not to have as shown in Figure 7 obvious line of demarcation between silicon oxide layer 33 and the WSiO layer 32, WSiO layer 32 is progressively transition to silicon oxide layer 33, also is W contained in the WSiO layer is reduced to gradually at 0 o'clock, namely becomes silicon oxide layer.In this embodiment, silicon oxide layer 33 does not generally have the storage characteristics of changing between high-impedance state and the low resistance state, therefore, and its resilient coating in can tungsten oxide base storage medium layer 30.
Figure 8 shows that the 4th embodiment WOx based resistance memory that forms based on preparation method shown in Figure 1.Comparison diagram 7 and embodiment illustrated in fig. 8, its main distinction are that there is not WOx layer 31 in it, because silicon layer is relatively thick, might not had WOx by independent oxidation by W.Therefore, in this embodiment, the memory action that relaxes between 32 high-impedance state of WSiO layer and the low resistance state, silicon oxide layer 33 is as the resilient coating in the tungsten oxide base storage medium layer 30.
Need to prove, tungsten oxide base storage medium layer in this invention refers to include the storage medium of WSiO layer, it can also comprise WOx or silicon oxide layer, but WSiO layer, WOx or silicon oxide layer are based on same oxidation processes and form simultaneously, and it does not have obvious physics line of demarcation each other.The WSiO layer also can also be referred to as to mix the WOx layer of Si, and W wherein, Si, the concrete chemical proportionate relationship of O each position distribution in layer may be inhomogeneous.
The AES (Auger electron spectroscopy) that Figure 9 shows that the tungsten oxide base storage medium of the WOx-based resistive memory for preparing according to embodiment of the method shown in Figure 1 analyzes schematic diagram.In this embodiment, the thickness of silicon layer is 3 nanometers, forms by sputtering sedimentation.As shown in Figure 9, the abscissa correspondence has reflected the degree of depth from top to bottom, can reflect that by this figure this tungsten oxide base storage medium is tungsten oxide base storage medium layer 30 shown in Figure 6, namely comprises WSiO layer 31 and WOx layer 32, wherein, WSiO layer 31 mainly plays resilient coating.This WOx-based resistive memory is carried out the memory property test find that its Ron and Roff obviously improve, fatigue properties (Endurance) also are improved, and have the good anti-interference performance (Read Disturbance) of reading.In addition, the consistency of its initial state resistance also improves.This mainly is that uniformity of film is improved because the existence of thin layer amorphous silicon reduces the oxidation rate of tungsten.
The present invention further provides the another kind of method for preparing WOx-based resistive memory, the method is integrated in method shown in Figure 1 among the aluminium interconnection rear end preparation technology.
Figure 10 shows that the structural representation that is integrated in the WOx-based resistive memory in the aluminium interconnection provided by the invention.In this embodiment, the WOx based resistance memory is integrated to be formed in the aluminium interconnection backend process, WOx base storage medium is formed under the top, aluminum lead 801 of tungsten plug 202, as shown in figure 10, metal deposition front medium layer (PMD) 100 forms on the MOS device, it can be the dielectric materials such as silica PSG of mixing phosphorus, forms tungsten plug 201 and 202 in pmd layer 100, and wherein tungsten plug 202 needs oxidation to form WO above being
xThe tungsten plug of base storage medium Memister, tungsten plug 201 does not need oxidation to form WO for top
xThe tungsten plug of base storage medium Memister.Tungsten plug connects ground floor aluminum lead and metal-oxide-semiconductor source electrode or drain electrode.For preventing the diffusion impervious layer 301 of tungsten diffusion, it can be TaN, Ta/TaN composite bed or Ti/TiN composite bed, or other plays the electric conducting material of same purpose, such as TiSiN, WN between tungsten lead-in wire and the pmd layer
x, WN
xCy, Ru, TiZr/TiZrN etc.Tungsten 202 tops that go between are WOx base storage medium layer 700,1＜x≤3 wherein, WOx base storage medium layer 700 is to form according to method shown in Figure 1, and the concrete structure of WOx base storage medium layer 700 can be the structure of the WOx base storage medium layer 30 of Fig. 5, Fig. 6, Fig. 7 or Fig. 8.Top electrode 601 covers WOx base storage medium layer 700, can be the electric conducting materials such as TaN, Ta, TiN, Ti, W, Al, Ni, Co.Weld layer 302 be formed at upper strata aluminum lead 801,802 and PMD 100 between, cover simultaneously top electrode 601, the main adhesive attraction that rises, reduce the contact resistance between tungsten plug and the metal lead wire, it can be Ti, TiN, Ti/TiN composite bed, or other plays the electric conducting material of same purpose, such as TiSiN, WNx, WNxCy, TiZr/TiZrN etc. Aluminum lead 801 and 802 material are the ground floor aluminum lead at this embodiment, and it can be Al or AlCu alloy etc.Anti-reflecting layer 401 is positioned on aluminum lead 801 and 802, mainly plays the antireflective effect, improves lithographic accuracy, can be TiN, or the non-organic substance such as SiON and the organic substance material that plays same purpose.Tungsten plug 202, WSi compound layer 70, WOx base storage medium layer 700 and top electrode 600 form a resistance memory cell.
Figure 11 is to the structural representation of the preparation method's process that Figure 18 shows that WOx based resistance memory embodiment illustrated in fig. 10.
The concrete manufacture method of WOx based resistance memory embodiment illustrated in fig. 10 is described below with reference to Figure 11 to Figure 18.Figure 11 shows that the aluminium interconnection process carries out tungsten plug and make structural representation after complete, as shown in figure 11, tungsten plug 202 and 201 is formed in the pmd layer 100, and its top exposes.
Further with reference to shown in Figure 12, cover one deck sacrificial dielectric layer at tungsten plug.
In this embodiment, sacrificial dielectric layer 102 covers tungsten plug and pmd layer simultaneously, and it can be Si
3N
4, SiON, SiCN, SiC, SiO
2The composite bed that perhaps comprises one of them, the consistency of thickness of the top electrode of the memory that the thickness of sacrificial dielectric layer should form with wish.Sacrificial dielectric layer 10 is used for protecting the tungsten plug 201 and the composition that do not need to form the WOx based resistance memory to form top electrode.
Further with reference to shown in Figure 13, patterned etch is formed for the hole of exposed tungsten embolism on sacrificial dielectric layer.
In this embodiment, as shown in figure 13, hole 103 exposes tungsten plug 202 fully, and for preparing at the top of next step tungsten silicide embolism 202, the size of hole 103 is consistent with the top electrode of the memory that figure and wish form.
Further with reference to shown in Figure 14, silicidation is carried out at the top that will be positioned at described tungsten plug take sacrificial dielectric layer as mask, forms the WSi compound layer.
In this embodiment, as shown in figure 14, the top section silication by to the tungsten plug 202 that exposes forms certain thickness silicon layer 701a, and the thickness of silicon layer can be 3 nanometers.
Further with reference to the accompanying drawings 15, with silicon layer 701a and tungsten plug 201 tops oxidation processes together simultaneously, form WOx base storage medium 700.In this embodiment, can select the method for plasma oxidation to carry out oxidation.The tungsten oxide base storage medium 700 that generates can be respectively the structure of the WOx base storage medium layer 30 of Fig. 5, Fig. 6, Fig. 7 or Fig. 8.Preferably, by controlling oxidizing condition etc., select WOx base storage medium layer 30 embodiment illustrated in fig. 6.In the process of oxidation, times oxidation of other parts silicon layer forms silicon oxide layer 701.
Further with reference to the accompanying drawings 16, deposition top electrode metal material forms top electrode to top electrode metal material cmp (CMP).In this embodiment, in the process of CMP with silicon oxide layer 701 as stop layer, remove unnecessary top electrode metal material.The upper electrode material kind can be the electric conducting materials such as TaN, Ta, TiN, Ti, W, Al, Ni, Co, and the preparation method can realize by modes such as reactive sputtering, PECVD, thermal evaporations.
Further with reference to the accompanying drawings 17, remove sacrificial dielectric layer 102 and silicon oxide layer 701 by selective etch.Top electrode 601 obtains keeping.
Further with reference to the accompanying drawings 18, deposit successively weld layer, interconnecting metal layer, anti-reflecting layer, finish the aluminum lead wiring by photoetching, lithographic method composition.The formation step of the aluminum lead in the step of embodiment and conventional aluminium interconnection process is identical.
So far, WOx based resistance memory shown in Figure 10 basically forms.
Although the description of this invention is to make in the mode of reference example and preferred embodiment, those skilled in the art arrives cognition, under the prerequisite that does not depart from the scope of the present invention with spirit, can make change in form or details.
Claims (8)
1. method for preparing WOx-based resistive memory, it is characterized in that, by on the tungsten metal level, directly forming the silicon layer that thickness is less than or equal to 10 nanometers, then to described tungsten metal level and silicon layer simultaneously together oxidation processes form tungsten oxide base storage medium layer.
2. the method for claim 1 is characterized in that, composition forms top electrode on described tungsten oxide base storage medium; Described tungsten metal level composition is formed on the bottom electrode or described tungsten metal level is set to bottom electrode.
3. the method for claim 1 is characterized in that, described silicon layer is continuous amorphous silicon membrane layer.
4. method as claimed in claim 1 or 2 is characterized in that, the thickness range of described silicon layer is 1 to 5 nanometer.
5. method as claimed in claim 1 or 2 is characterized in that, described oxidation processes is one of plasma oxidation, thermal oxidation, Implantation oxidation.
6. method as claimed in claim 2 is characterized in that, described top electrode is TaN, Ta, TiN, Ti, W, Al, Ni or Co, or several composite bed among them.
7. method as claimed in claim 1 or 2, it is characterized in that described tungsten oxide base storage medium layer is the WSiO layer, perhaps is the composite bed of WSiO layer and WOx layer, perhaps being the composite bed of silicon oxide layer, WSiO layer and WOx layer, perhaps is the composite bed of silicon oxide layer and WSiO layer; Wherein, 1＜x≤3.
8. a method for preparing WOx-based resistive memory is characterized in that, may further comprise the steps:
(1) provide the tungsten plug in the conventional aluminium interconnection process to make complete structure, tungsten plug is as the bottom electrode of described WOx-based resistive memory;
(2) cover the formation sacrificial dielectric layer at described tungsten plug;
(3) position that wish forms WOx-based resistive memory in described sacrificial dielectric layer makes hole, exposes described tungsten plug;
(4) sedimentary deposit directly forms the silicon layer that thickness is less than or equal to 10 nanometers;
(5) with described tungsten plug and silicon layer simultaneously together oxidation processes form tungsten oxide base storage medium layer;
(6) deposition top electrode metal material forms top electrode to the planarization of top electrode metal material;
(7) remove sacrificial dielectric layer and the formed silicon oxide layer of silicon layer oxidation.
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| CN1364317A (en) * | 1999-01-14 | 2002-08-14 | 因芬尼昂技术股份公司 | Semiconductor element with tungsten oxide layer and method for its production |
| CN101826595A (en) * | 2009-03-03 | 2010-09-08 | 复旦大学 | WOx-based resistance type memory and preparation method thereof |
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| CN101826595A (en) * | 2009-03-03 | 2010-09-08 | 复旦大学 | WOx-based resistance type memory and preparation method thereof |
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