CN102142862B - Chaotic wide band frequency modulator for noise reduction - Google Patents
Chaotic wide band frequency modulator for noise reduction Download PDFInfo
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- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
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Abstract
The embodiments of the invention relate to apparatus and method for reducing electromagnetic interference (EMI) and radio frequency interference (RFI) in computer systems via a chaotic wide band frequency modulation. The chaotic noise modulator, in one embodiment, comprises: a master cell to generate a control voltage corresponding to an un-modulated reference signal; and a slave cell having a chaotic signal generator to generate a random noise signal, the slave cell coupled with the master cell and operable to generate a modulated output signal in response to the control voltage.
Description
Technical field
Embodiments of the invention are generally directed to the reducing noise field in computer system.More specifically, embodiments of the invention relate to electromagnetic interference (EMI) for be reduced in computer system via chaos wideband frequency modulation and the apparatus and method of radio frequency interference (RFI).
Background technology
Along with computing equipment becomes more general, the electromagnetic interference (EMI) work of another computing equipment being caused by a computing equipment and radio frequency interference (RFI) have reduced the performance of this another computing equipment.Such interference can reduce by the special reducing noise housing around computer equipment, and this housing turns to any external electromagnetic waves or rf wave, in order to avoid disturb work and the performance of this computer equipment.Also can on computing equipment housing, apply special coating, so that less desirable electromagnetic signal or radiofrequency signal are turned to.Such housing and special coating are expensive, therefore infeasible along with the reduction of computing equipment price.
Noise-reducing circuit in computing equipment can substitute for expensive housing and the needs of special coating.Traditionally, the spectrum peak having produced for reducing the processor by computing equipment such as periodic modulation abridged table sinusoidal, trigonometric sum Lexmark abridged table (profile).The lower-wattage peak value of this power spectrum causes lower EMI to disturb.But such technology has increased the bandwidth of power spectrum.The increase of power spectrum bandwidth may cause causing with the interference of nearby frequency bands RFI.
Along with comprising that in free frequency band radio on increasing sheet, multi radio Environment Design person face two difficult problems.
First on, different sheets, equipment and surrounding environment make frequency band become more and more obstruction.This causes different equipment to affect each other and causes interference.Can be by operating frequency be removed to reduce such interference from interference channel, as shown in Figure 1.Fig. 1 illustrates that frequency illustrates the concept of frequency expansion to power curve.In order to reduce RFI, by being moved on to 102 from 101, power spectrum carrys out mobile working frequency as shown.Although can reduce RFI by frequency displacement, 101 and 102 high-power peaks still causes EMI problem.
The second, along with cause the increase of frequency due to a large amount of appearance of computing equipment, EMI is reduced to by the level of the administrative department's regulation such as Federal Communications Committee (FCC) and is becoming challenging.Traditionally, deal with such challenge by spread spectrum, spread spectrum life cycle clock frequency is modulated the power spectrum of computing equipment.
Spread spectrum increases the bandwidth of frequency spectrum, to be reduced in the peak power in frequency spectrum.In Fig. 1, on the frequency spectrum 105 of testing equipment, apply spread spectrum and produce more flat frequency spectrum 104.If need further to reduce peak power, further expansion will produce 103.But the power of reduction by 104 may cause the RFI (as shown in 106) because 103 higher bandwidth causes to process EMI.105 show as avoiding the loss of (due to what cause compared with high power peak) EMI on power.With the spread spectrum of 104 application is compared, enable higher spread spectrum and can cause 103 higher bandwidth.
Accompanying drawing explanation
According to the detailed description below providing and according to the accompanying drawing of each embodiment of the present invention, to more completely understand embodiments of the invention, but described the detailed description and the accompanying drawings should not be regarded as the present invention to be limited to specific embodiment, but only for explaining and understanding.
Fig. 1 explanation is for reducing the problem that may cause RFI of the spread spectrum of EMI.
Fig. 2 is advocating peace from the high level block diagram of configuration of chaotic wide band frequency modulator according to an embodiment of the invention.
That Fig. 3 illustrates is according to an embodiment of the invention, produce modulated output signal via chaotic noise signal.
Fig. 4 A illustrates that chaos according to an embodiment of the invention transmits mapping.
Fig. 4 B illustrates the realization of chaotic noise generator according to an embodiment of the invention.
The output that Fig. 5 A explanation is according to an embodiment of the invention, tent maps (tent map) is embodied as to chaos and transmits the chaotic noise generator of Fig. 4 B of mapping function.
Fig. 5 B explanation is according to an embodiment of the invention, via the probability density function (PDF) of the tent maps noise of the chaotic noise generator of Fig. 4 B.
Fig. 6 A illustrates the high level block diagram of slope according to an embodiment of the invention generator 600.
Fig. 6 B illustrates that the transistor level of slope according to an embodiment of the invention generator (Fig. 2 210 and 211) realizes.
Fig. 6 C illustrates that the transistor level of slope generator according to another embodiment of the invention (Fig. 2 210 and 211) realizes.
Fig. 7 illustrates the senior realization of edge according to an embodiment of the invention generator.
Fig. 8 A and Fig. 8 B illustrate flow chart according to an embodiment of the invention, produce the process of modulated output signal via chaotic noise signal.
That Fig. 9 illustrates is according to an embodiment of the invention, modulation based on chaotic noise is with respect to the benefit of the modulation based on cycle triangle signal.
Embodiment
Embodiments of the invention have been discussed electromagnetic interference (EMI) for be reduced in computer system via chaos wideband frequency modulation and the apparatus and method of radio frequency interference (RFI).
In this manual quoting of " embodiment ", " embodiment ", " some embodiment " or " other embodiment " represented to special characteristic, structure or the characteristic described in conjunction with these embodiment are included at least some embodiment, but must not be included in all embodiment." embodiment ", " embodiment " or " some embodiment " that occur throughout must not refer to identical embodiment.If specification statement " can ", " possibility ", " can " comprise an assembly, feature, structure or characteristic, this specific components, feature, structure or characteristic needn't necessarily be included wherein so.If specification or claim are mentioned " one (" a " or " an ") " element, this does not also mean that only there is this element.If specification or claim are mentioned " one additional " element, this does not get rid of more than one described add ons.
As mentioned in background technology part, the spread spectrum based on for warbled cycle clock signal reduces as cost makes power peak take the wider bandwidth of new power spectrum.The wider bandwidth of this new power spectrum may cause the RFI with adjacent frequency spectrums of operation.Via the pure noise signal application spread spectrum between its continuous sampling with zero correlation, described pure noise signal is the ideal Modulated signal for the frequency spectrum of modulation output clock is carried out to consistent expansion.May be expensive but produce pure random signal.
The high level block diagram of chaos (at random) the wideband frequency modulation device 200 that Fig. 2 illustrates is according to an embodiment of the invention, reduce for EMI and RFI.Modulator 200 is configured to main 201 and from 202 cell locations.Such configuration makes any drift in the case of there is the unmodulated reference input clock frequency for example being caused by clock jitter, and output modulation clock signal is followed the unmodulated reference clock signal 209 of input.
In one embodiment, master unit 201 comprises respectively and a pair of slope generating circuit 203 and 204 of comparator 205 and 206 couplings.The output of comparator is connected with edge generator 207.In one embodiment, edge generator 207 is set-reset latch (SR latchs).Periodic signal and prearranged signals (voltage) V that comparator 205 and 206 produces slope
xcompare.
In one embodiment, produce predetermined voltage V via band gap voltage generator circuit
x.In other embodiments, can produce predetermined voltage V with other voltage sources
x.Predetermined voltage V
xbe set to a value, approach the output frequency of (or identical) with crossing generation and the unmodulated reference signal frequency that makes ramp signal and predetermined voltage.In one embodiment, predetermined voltage V
xfor generation of the control signal for SR latch 207.In one embodiment, predetermined voltage V
xalso be imported into hereinafter discuss from unit.
In one embodiment, unmodulated reference signal is the periodic signal such as the clock signal being produced by reference clock signal generator 209.In other embodiments, reference signal is the external signal that is routed to phase place-frequency detector 208.In one embodiment, predetermined voltage V
xit is the not varying signal that is set to the half Vcc/2 of about power level.
Predetermined voltage V
xbe added with the chaotic noise being produced by the chaotic noise generator 212 from unit 202 of hereinafter discussing.By predetermined voltage V
xthe object being added with chaos (at random) noise is, if chaotic noise generator 212 produces zero noise, to synchronize with the reference clock signal from 209 from the output modulating clock of unit 202.In one embodiment, by the adder 216 and 217 from unit 202 by predetermined voltage V
xbe added with chaotic noise signal.
In one embodiment, the phase place-frequency detector 208 of master unit 201 is coupled with edge generator 207 and reference clock generator 209.Phase place-frequency detector 208 is by comparing to produce control voltage Vctrl by the output of edge generator 207 and from 209 unmodulated reference clock signal.In one embodiment, control voltage Vctrl and be imported into from unit 202, produce last output modulating clock from unit 202.Control voltage signal Vctrl and adjust the slope from the ramp signal of slope generator 203,204,210 and 211.Slope generator 203,204,210 and 211 produces the ramp signal with unmodulated input reference clock signal same frequency.The object of adjusting the slope of ramp signal is any noise (for example, clock jitter) of following the tracks of on unmodulated input reference clock signal, considers this noise with box lunch while producing modulated output signal.
In one embodiment, slope generator 203,204,210 and 211 produces slope for each high and low pulse of reference clock signal.The width on these slopes equals height and the low pulse of unmodulated reference input clock signal.
In one embodiment, be stabilized in the loop in master unit 201 by resistor R and capacitor C1 and C2.According to one embodiment of present invention, the value of resistor R and capacitor C1 and C2 is respectively 5.5K ohm, 15pF and 1.5pF.According to the factor such as treatment technology, modulation requirement etc., can use other values for other embodiment.
In one embodiment, comprise a pair of slope generator 210 and 211, comparator 213 and 214, chaotic noise generator 212, adder 216 and 217 and edge generator 215 from unit 202.Slope generator 210 produces the frequency identical with unmodulated reference input clock with 211.
In one embodiment, from the comparator 213 and 214 of unit 202 by the random noise signal from chaotic noise generator 212 with compare from the ramp signal of slope generator 210 and 211.In one embodiment, from the random noise signal of chaotic noise generator 212 and the predetermined voltage V of master unit 201
x(by adder 216 and 217) is added.Then, comparator 213 and 214 by summation after output with compare from the ramp signal of slope generator 210 and 211.Then, to the output of edge generator 215 input comparators 213 and 214.In one embodiment, edge generator 215 is SR latchs.According to one embodiment of present invention, the output of comparator 213 is input as " reset " of SR latch 215, and the output of comparator 214 is input as SR latch 215 " set ".In one embodiment, identical with the comparator of master unit 201 from the comparator of unit 202, to follow the tracks of the variation in reference clock signal in the time producing modulating clock output.
In one embodiment, the ramp signal being produced by slope generator 210 is corresponding to the low pulse of unmodulated reference clock signal.Similarly, in one embodiment, the ramp signal being produced by slope generator 211 is corresponding to the high impulse of unmodulated reference clock signal.In the time that ramp signal intersects with random noise signal, comparator (213 and 214) is exported transformation from high to low or from low to high.As mentioned above, in one embodiment, by the predetermined voltage V of random noise signal and master unit 201
xbe added, then compare with ramp signal by comparator 213 and 214.
In one embodiment, when the output of comparator 214 is when (or from low to high) changes from high to low, slope generator 211 resets.This reset makes slope generator end (electric discharge (discharge)) ramp signal.Change and also make another slope generator 210 trigger from the same output of comparator 214, start to produce ramp signal.For slope generator 210 being resetted and being implemented for the similar cross-couplings of output of the comparator 213 that triggers another slope generator 211.
In one embodiment, the output of comparator 214 makes 215 set of SR latch, that is, SR latch 215 produces high signal.In one embodiment, the output of comparator 213 resets SR latch 215, that is, SR latch 215 produces low signal.Therefore, the low pulse that slope generator 210 and comparator 213 produce modulation output clock, and slope generator 211 and comparator 214 produce the high impulse of modulation clock signal.
Correspondingly to advocate peace from an object of the design of unit 201 and 202 be for example to follow the tracks of any noise on unmodulated reference clock signal while exporting modulation signal when producing to coupling.
That Fig. 3 illustrates is according to an embodiment of the invention, for produce the advanced figure of the algorithm of modulated output signal via chaos (at random) noise signal.In one embodiment, produce two slopes (304 and 305), its width equals respectively height and the low pulse of unmodulated reference clock 301.Comparator (from Fig. 2 213 and 214) these ramp signals (304 and 305) and chaos (at random) noise signal 302 are compared, export modulation signal 303 to produce.As mentioned above, in one embodiment, the adder 216 and 217 of Fig. 2 is the predetermined voltage V with master unit 201 by random noise signal 302
xbe added, then compare with ramp signal by comparator 213 and 214.
In one embodiment, the frequency of random noise signal 302 (as shown in Figure 3) is lower than 209 reference clock frequencies that produce by Fig. 2.In the time that random noise signal 302 changes on magnitude of voltage, the frequency shift of modulated output signal.This change in frequency is because intersect at ramp signal (304 and 305) the some place different from the joining of random noise signal 302 before changing with random noise signal voltage level.In Fig. 3 by 306, the 307 and 308 this changes that show in frequency.
In one embodiment, the voltage level of chaos (at random) noise signal 302 depends on that chaos transmits mapping (chaotic transfer map).Realize this chaos by the chaotic noise generator 212 of Fig. 2 and transmit mapping.In one embodiment, tent being transmitted to Mapping implementation is that chaos transmits mapping.In another embodiment, bernouilli shift map is embodied as to chaos and transmits mapping.Similarly, other embodiment can realize other forms of chaos and transmit mapping, to produce chaos (at random) noise signal 302.
Fig. 4 A explanation chaos as tent maps 400 according to an embodiment of the invention transmits mapping.An advantage of tent maps is that tansfer function only has two quadrants, therefore makes to realize simple.By typical tent maps equation 401, tent maps 400 is described.In one embodiment, realize tent maps 400 with μ=2.In other embodiments, can use other values of μ, and not change the operation principle of the chaotic noise generator 212 of Fig. 2.Referring to returning Fig. 4 A, x axle is X
nvoltage, and y axle is X
(n+1)voltage.In one embodiment, by bias voltage V
b(in Fig. 4 B, discussing) is set to the intermediate point of triangle mapping signal.The realization of the mlultiplying circuit of discussing in Fig. 4 B is depended on respect to X
nhow bias voltage V is set
b.
Fig. 4 B illustrates the realization of chaotic noise generator 410 according to an embodiment of the invention.Realization discussed herein is used tent maps (Fig. 4 A 400) to be used as chaos and transmits mapping.In one embodiment, multiplier 411,412 and 413 is analog multipliers.In one embodiment, these multipliers are implemented as the circuit based on OPAMP (operational amplifier).Resistor (not shown) in multiplier is determined 411,412 and 413 multiplier of multiplier.In the realization of Fig. 4 B, the multiplier of multiplier is based on tent maps equation 422.Therefore, according to one embodiment of present invention, multiplier 411 is to be multiplied by 2, and multiplier 412 is to be multiplied by-2, and multiplier 413 is to be multiplied by 4.
In one embodiment, multiplier 411 is by previous random noise signal X
nbe multiplied by 2 to produce 2X
n, multiplier 412 is by previous random noise signal X
nbe multiplied by-2 with generation-2X
n, and multiplier 413 is by bias voltage V
b417 are multiplied by 4 to produce 4V
b.
According to one embodiment of present invention, multiplexer 414 is configured to select 2X
nor-2X
nsignal, and multiplexer 415 is configured to transmit ground signalling (zero) or 4V to summing amplifier 420
b.In one embodiment, depend on signal X
nvoltage, comparator 416 is selected the suitable control signal of multiplexer 411 and 412.The output of summing amplifier 420 is the X as the output of tent maps equation
(n+1), and be also the random noise signal 421 that is imported into the comparator 213 and 214 of Fig. 2.As mentioned above, in one embodiment, the predetermined voltage V by random noise signal 421 with master unit 201
xbe added, then by comparator 213 and 214 and ramp signal compare.
In one embodiment, on sheet or sheet produce bias voltage V outward
b417.In one embodiment, produce bias voltage V by band-gap circuit (not shown)
b417.In one embodiment, V
b417 value is 105mV.Bias voltage V
b417 also programme for the expansion to frequency spectrum.In one embodiment, this programming realizes by software or hardware or both.Change bias voltage V
b417 can change noise voltage level X
n, noise voltage level X
nthen change the output frequency (expansion of frequency spectrum) of modulation output clock.
The output that Fig. 5 A explanation is according to an embodiment of the invention, tent maps is embodied as to chaos and transmits the chaotic noise generator of Fig. 4 B of mapping function.This curve shows random noise signal level is random in time, because they do not follow any concrete pattern, that is, is zero correlation between noise samples.
Fig. 5 B explanation is according to an embodiment of the invention, via the probability density function (PDF) of the tent maps noise of the chaotic noise generator of Fig. 4 B.After the initial settling time of the circuit of the chaotic noise generator of Fig. 4 B, PDF is very consistent, and with white noise be suitable.
Fig. 6 A illustrates the high level block diagram of slope according to an embodiment of the invention generator 600.Current source 601-604 is configured to capacitor C1 and C2 provides electric current and from capacitor C1 and C2 Absorption Current.In one embodiment, the high impulse of reference clock signal is control switch S1 and S4 respectively, and the low pulse of unmodulated reference clock signal control switch S2 and S3 respectively.Such controlling mechanism produces high ramp signal and low ramp signal, and their width equals height and the low pulse of unmodulated reference clock signal.These height and low ramp signal are imported into multiplexer 605, and multiplexer 605 is controlled by the output of the comparator 213 and 214 of Fig. 2.In one embodiment, current source 601 and 602, switch S 1 and S2 and capacitor C1 jointly represent the first charge pump of slope generator 600.Similarly, in one embodiment, current source 603 and 604, switch S 3 and S4 and capacitor C2 jointly represent the second charge pump of slope generator 600.
In one embodiment, in the time that slope generator receives reset signal from the comparator 213 and 214 of Fig. 2, ramp signal is reset, be that slope is ended or discharges, in one embodiment, in the case of being that the triggering signal also being arranged by the comparator 213 and 214 of Fig. 2, ramp signal starts to produce slope.
Fig. 6 B illustrates that the transistor level of slope according to an embodiment of the invention generator (Fig. 2 203,204,210 and 211) realizes 610.Carry out the charging of the control signal Vctrl control capacitor C1 of independent unit 201, therefore control the gradient on slope.PMOS transistor M5 and M1 form current mirror.In one embodiment, when triggering signal and reset signal are low level while being earth level, capacitor C1 is charged.In another embodiment, when triggering signal (being connected to PMOS transistor M3) and reset signal are high level while being power level, capacitor C1 is discharged.Because do not control by the electric current of nmos pass transistor M4, so discharging current promptly discharges capacitor C1.An object not controlling nmos pass transistor M4 (causing ramp signal output (out) to be discharged rapidly) is for output (out) again being charged enough time is provided at next reference clock cycle.
Fig. 6 C illustrates that the transistor level of slope generator according to another embodiment of the invention (Fig. 2 203,204,210 and 211) realizes 620.In this embodiment, compare with the embodiment of Fig. 6 B, in the time enabling reset_b signal,, in the time that slope is just being ended or discharged, the increase of PMOS transistor M6 is by unsettled node f
nodepull down to ground connection.In such embodiments, the slope characteristic of ramp signal that the slope characteristic of ramp signal produces than Fig. 6 B is more controlled, because in the time that the charging on slope starts, and when triggering signal and reset signal are while being low, node f
nodenot at vacant state.
In one embodiment, the signal " free time " of PMOS transistor M2 that is imported into Fig. 6 B and Fig. 6 C is for walking around slope generator 610 and 620.When will " free time ", signal setting be zero (ground connection), " out " node by move power level to, therefore eliminated unsettled node f
nodeimpact.Although the embodiment of Fig. 6 B and Fig. 6 C is shown as the design based on CMOS, can uses other transistor technologies (for example, ECL, BJT, BiCMOS etc.) to realize identical design, and not change essence of the present invention.
Fig. 7 illustrates the senior realization of edge according to an embodiment of the invention generator 700.As mentioned above, by 207 and 215 produce the master unit 201 of Fig. 2 output signal edge (being input to the signal of phase place-frequency detector 208 of Fig. 2) and from the edge (output modulation signal) of the output signal of unit 202.Although piece 207 and 215 produces last edge, edge produces framework and comprises that comparator 701 and 702 (identical with the comparator 205,206,213 and 214 of Fig. 2) is to engage with piece 207 and 215.In one embodiment, comparator 701 (with Fig. 2 205 and 213 identical) and 702 (with Fig. 2 206 and 214 identical) receives random noise signal and ramp signal 706 and 707 to produce the positive and negative edge of modulated output signal.As mentioned above, in one embodiment, by the predetermined voltage V of random noise signal and master unit 201
xbe added, then by comparator 701 and 702 and ramp signal 706 and 707 compare.
In one embodiment, the width of ramp signal equals the height of unmodulated reference clock signal and the width of low pulse.In one embodiment, the output of comparator is cushioned device 703 and 704 bufferings, to strengthen the signal strength signal intensity of comparator output.In one embodiment, comparator is implemented as differential amplifier.In one embodiment, the output of buffer 703 and 704 is imported into edge and produces circuit 705.In one embodiment, edge generator 705 is SR latchs.
In one embodiment, in the time that slope-Gao signal 706 equals random (chaos) noise signal, comparator 701 makes 705 set of SR latch.Similarly, in one embodiment, in the time that slope-low signal 707 equals at random (chaos) noise signal, comparator 702 resets SR latch 705.As mentioned above, in one embodiment, by the predetermined voltage V of random noise signal and master unit 201
xbe added, then by comparator 701 and 702 and ramp signal 706 and 707 compare, to produce reset and the asserts signal for SR latch 705.
Consider that Fig. 7 is referring to returning Fig. 2, master unit 201 realize with from the similar slope generator in unit 202 and edge generator.Such MS master-slave configuration compensates the error causing in (comparator 213 and 214) from unit 202 any comparator offsets by control signal Vctrl, described control signal Vctrl produces via the equality comparator in master unit 201 (205 and 206).
Fig. 8 A and Fig. 8 B are the flow charts 800 that process according to an embodiment of the invention, produce modulated output signal via chaotic noise signal is shown.With reference to figure 2 and Fig. 4 B, this process is described.At frame 801, produce two triangle ramp signals via slope generator 203-204 and 210-211.As mentioned above, about the generation of ramp signal, one of described slope slope-Gao (R
rise) be to produce at the rising edge place of the unmodulated reference clock signal entering, and slope-low (R
fall) be to produce at the falling edge of unmodulated reference clock signal.
At frame 802, according to one embodiment of present invention, that carries out locking about the phase place of master unit 201 determines.In one embodiment, if non-locking master unit 201 is carried out frame 803.At frame 803, chaotic noise generator 212 produces fixed voltage V by the output 421 of walking around Fig. 4 B via multiplexer (not shown in Fig. 4 B)
x.This fixed voltage V
xcarry out the identical predetermined voltage V of independent unit 201
x.In one embodiment, walk around adder 216 and 217, because chaotic noise generator 212 itself is exported V by the output signal 421 of walking around Fig. 4 B
xso, needn't add again V by adder 216 and 217
x.In another embodiment, frame 803 produces zero output by chaotic noise generator 212, therefore, does not walk around adder 216 and 217.In any one embodiment, in the time of non-locking master unit 201, comparator 213 and 214 is by V
xcompare with the output of slope generator 210 and 211.In another embodiment, before comparator 213 and 214 compares the output 421 of chaotic noise generator, V
xbe not added to chaotic noise generator 212 by adder 216 and 217.
If master unit 201 is locked, at frame 812-813, according to X
nthe X from chaotic noise generator 212 drawing
(n+1)signal simulated trigger 418 and stores.At frame 814, according to one embodiment of present invention, after the predetermined sampling time, X
(n+1)(as X
n) be transfused to back the comparator 416 of Fig. 4 B.In one embodiment, repeat this process, as shown in the designator B of Fig. 8 A and Fig. 8 B.Chaotic noise signal X
(n+1)also the frame 810 of hereinafter being discussed uses.
At frame 804, according to one embodiment of present invention, the output of the output of chaotic noise generator 212 and slope generator 203 and 204 is imported into the comparator 205 and 206 of master unit.Comparator 205 and 206 is by ramp signal and predetermined voltage level V
xcompare.Comparator 205 and 206 intersections in ramp signal and predetermined voltage signals produce high impulse.According to one embodiment of present invention, be imported into SR latch 207 from the high impulse of comparator 205 as " set " signal, and be imported into SR latch 207 from the low pulse of comparator 206 as " reset " signal.
At frame 805, according to one embodiment of present invention, SR latch 207 produces the output clock of the feedback clock that is used as phase place-frequency detector 208.In one embodiment, at frame 806, in the time producing the output rising edge of modulating clock and trailing edge, ramp signal is discharged into ground connection.In another embodiment, the output of comparator 205 and 206 is for discharging ramp signal for high and low reference clock signal.
In one embodiment, at frame 807, phase place-frequency detector 208 compares the clock being produced by SR latch 207 and reference clock signal.The output of phase place-frequency detector 208 is by RC network filtering, to produce the control voltage Vctrl that is imported into slope generator 203 and 204.In one embodiment, the slope generator 203 and 204 of master unit 201 is identical with the slope generator 210 and 211 from unit 202.
In one embodiment, at frame 808, carry out the Vctr signal raising of independent unit 201 or reduce slope to adjust the slope of ramp signal by basis from the slope generator 210 and 211 of unit 202.The frequency of cycle ramp signal in the time comparing with unmodulated reference clock signal is depended in the adjustment of described slope.The adjustment of described slope is created in the last ramp signal that frame 809 produces.
In one embodiment, at frame 815, carry out determining about the lock-out state in loop in master unit 201.If locking master unit 201, controls voltage Vctrl for enough stablizing and correctly carry out its function from unit 202.The comparator 213 and 214 of this presentation graphs 2 uses the chaotic noise output 421 of Fig. 4 B.As mentioned above, in one embodiment, the predetermined voltage V by the random noise signal of Fig. 4 B 421 with master unit 201
xbe added, then by comparator 213 and 214 and ramp signal compare.If master unit 201 is different and not locked with the frequency of unmodulated input reference signal because of the frequency of ramp signal, repeat block 804.Now, comparator 213 and 214 is by V
xcompare with ramp signal, because the output 421 of chaotic noise generator 212 is bypassed.
In one embodiment, at frame 810, adder 216 and 217 will produce random noise signal X
(n+1)the output 421 and predetermined voltage V of chaotic noise generator 212
xbe added.Then, the output after summation and the ramp signal that the slope generator 210 and 211 by from unit 202 produces are compared.Carry out this relatively by comparator 213 and 214.In one embodiment, the output of chaotic noise generator 212 is directly input to comparator 213 and 214.According to one embodiment of present invention, be imported into SR latch 215 from the output of the comparator 213 and 214 of unit 202 as " set " and " reset " signal.At frame 811, SR latch 215 produces output modulating clock.Now, repeat this process from frame 801, as shown in designator ' A '.In the time producing the output modulating clock in several cycles, at frame 816, statement modulation output clock produces according to chaotic noise signal.
That Fig. 9 illustrates is according to an embodiment of the invention, modulation based on chaotic noise is with respect to the benefit of the modulation based on cycle triangle signal.The curve of Fig. 9 is the frequency spectrum of frequency expansion.According to embodiment described herein, shade grey frequency spectrum designation comes from the frequency spectrum of clock signal being modulated via cycle triangle signal, and black frequency spectrum designation comes from the frequency spectrum of clock signal being modulated via chaotic noise.Black frequency spectrum has than the lower power peak of shade grey frequency spectrum, low 12dB in this example.This represent modulation based on chaotic noise with respect to the modulation based on triangle by EMI reducing noise 12dB.Meanwhile, the bandwidth of shade grey frequency spectrum and black frequency spectrum keeps identical.This expression can be used black frequency spectrum to reduce RFI by balance power peak and bandwidth.
The parts of embodiment are also provided for storing the machinable medium of computer executable instructions.For example, in one embodiment, the bias voltage V of Fig. 4 B
bprogrammable via computer executable instructions, to adjust the frequency expansion of modulated output signal.Machinable medium can include, but are not limited to flash memory, CD, CD-ROM, DVD ROM, RAM, EPROM, EEPROM, magnetic or optical card, or is suitable for the machinable medium of the other types of store electrons instruction or computer executable instructions.For example, embodiments of the invention can be used as computer program and are downloaded, this computer program can be via communication link (for example, modulator-demodulator or network connect) mode by data-signal is from remote computer (for example, server) be sent to requesting computer (for example, client).
Although described the present invention in conjunction with specific embodiment of the present invention, according to description above, manyly substitute, modification and modification will be apparent for those skilled in the art.
For example, the predetermined voltage V being added by the adder from unit 202 216 and 217 of Fig. 2
xcan produce in circuit 212 and be added in chaos by single adder.In such embodiments, the output 421 of Fig. 4 B is imported into multiplexer (not shown in Fig. 4 B), and this multiplexer is controlled by the phase-locked signal of the master unit 201 of Fig. 2.If the master unit of Fig. 2 201 is locked, multiplexer (not shown in Fig. 4 B) is selected output 421.Then, will be via this output 421 of multiplexer (not shown in Fig. 4 B) via analog adder (also not shown in Fig. 4 B) and predetermined voltage V
xbe added.In one embodiment, the adder 216 and 217 of this analog adder alternate figures 2.In such embodiments, the last output of chaotic signal generator 410 comprises predetermined voltage V
x.
In one embodiment, if the loop of the master unit of Fig. 2 201 is not locked, multiplexer (not shown in Fig. 4 B) is added to predetermined voltage V via analog adder (not shown in Fig. 4 B) by no-voltage (ground connection)
xupper, to produce the output of chaotic signal generator 410.In such embodiments, the output signal 421 of Fig. 4 B device (not shown in Fig. 4 B) that is re-used is walked around, because the loop of the master unit of Fig. 2 201 is not locked.
In an alternate embodiment, the SR latch 207 and 215 of Fig. 2 can be replaced with set-reset flip-floop.Similarly, in another alternate embodiment, slope generator may be implemented as Fig. 6 C, rather than in the realization shown in Fig. 6 B.
Embodiments of the invention are intended to contain that all this type of in the broad range that drops on claims substitutes, modification and modification.
Claims (30)
1. for generation of a device for modulated output signal, described device comprises:
Master unit, for generation of the control voltage corresponding with unmodulated reference signal, wherein, described master unit comprises the edge generator for generation of pulse signal; And
From unit, it has the chaotic signal generator for generation of random noise signal, described from the coupling of unit and described master unit, and can operate in response to described control voltage and produce modulated output signal,
Wherein, describedly also comprise from unit:
Slope generator, for generation of with from ramp signal corresponding to the described control voltage of described master unit;
Adder, itself and described chaotic signal generator are coupled, so that predetermined voltage and described random noise signal phase Calais are produced to the output after summation;
Comparator, itself and described chaotic signal generator are coupled, so that the output after described summation and described ramp signal are compared; And
Edge generator, itself and described comparator are coupled, to produce described modulated output signal.
2. device according to claim 1, wherein, described chaotic signal generator can operate to transmit to shine upon based on chaos and produce described random noise signal.
3. device according to claim 2, wherein, described chaos transmits mapping and comprises that tent transmits one of mapping and bernouilli shift map.
4. device according to claim 1, wherein, described master unit also comprises:
Phase place-frequency detector, for receiving described pulse signal and described unmodulated reference signal, and produces output; And
Loop filter, itself and described phase place-frequency detector are coupled, described output is converted to described control voltage.
5. device according to claim 4, wherein, described master unit also comprises:
Slope generator, for generation of the ramp signal corresponding with described control voltage; And
Comparator, itself and described slope generator are coupled, and so that described ramp signal and predetermined voltage are compared, produce the control signal for described edge generator.
6. device according to claim 5, wherein, described predetermined voltage is provided to for generation of the described control signal with the frequency corresponding with the frequency of described unmodulated reference signal.
7. device according to claim 5, wherein, described slope generator comprises:
The first charge pump;
The second charge pump; And
Multiplexer, itself and described the first charge pump and described the second charge pump coupling, described multiplexer can operate to produce described ramp signal.
8. device according to claim 1, wherein, described predetermined voltage is produced the control signal for described edge generator by described master unit setting, and described control signal has the frequency corresponding with the frequency of described unmodulated reference signal.
9. device according to claim 1, wherein, described slope generator comprises:
The first charge pump;
The second charge pump; And
Multiplexer, itself and described the first charge pump and described the second charge pump coupling, to produce described ramp signal.
10. device according to claim 1, wherein, described chaotic signal generator comprises:
The first positive multiplier;
Negative multiplier; And
The first multiplexer, itself and the described first positive multiplier and described negative multiplier coupling.
11. devices according to claim 10, wherein, described chaotic signal generator comprises:
The second multiplexer, its be coupled for the second positive multiplier that is multiplied by bias voltage.
12. devices according to claim 11, wherein, described chaotic signal generator comprises:
Summing amplifier, itself and described the first multiplexer and described the second multiplexer coupling, to produce described random noise signal.
13. devices according to claim 11, wherein, described chaotic signal generator also comprises:
Analog trigger, it can operate samples to described random noise signal; And
Comparator, itself and described analog trigger are coupled, to produce the control signal for described the first multiplexer and described the second multiplexer.
14. devices according to claim 13, wherein, described analog trigger can operate with programmable frequency described random noise signal is sampled.
15. devices according to claim 11, wherein, the described bias voltage frequency expansion of adjusting described modulated output signal able to programme.
16. 1 kinds of methods for generation of modulated output signal, described method comprises:
Produced and control voltage according to unmodulated reference signal by master unit, wherein, described master unit comprises the edge generator for generation of pulse signal; And
By have can operate to produce random noise signal chaotic signal generator produce modulated output signal from cell response in described control voltage and described random noise signal, wherein, described from unit and the coupling of described master unit,
Wherein, producing described modulated output signal in response to described control voltage comprises:
Each rising edge and trailing edge for described unmodulated reference signal produce ramp signal;
Predetermined voltage and described random noise signal are added to produce the output after summation;
Output after described summation and described ramp signal are compared; And
Relatively produce described modulated output signal based on described.
17. methods according to claim 16, wherein, produce described control voltage according to described unmodulated reference signal and comprise:
Receive described unmodulated reference signal by phase place-frequency detector;
By described phase place-frequency detector from edge generator receiving feedback signals; And
Unmodulated reference signal and described feedback signal based on received lock described master unit.
18. methods according to claim 16, wherein, produce described random noise signal and comprise that realizing chaos transmits mapping.
19. methods according to claim 18, wherein, described chaos transmits mapping and comprises that tent transmits one of mapping and bernouilli shift map.
20. methods according to claim 16, also comprise: described predetermined voltage is set to a value, and to produce the control signal for generation of described modulated output signal, described control signal has the frequency corresponding with the frequency of described unmodulated reference signal.
21. methods according to claim 16, wherein, produce described ramp signal and comprise:
Based on the slope of adjusting described ramp signal from the described control voltage of described master unit;
Relatively end described ramp signal based on described; And
Relatively trigger described ramp signal based on described.
22. methods according to claim 16, wherein, produce described random noise signal and comprise:
Previous random noise signal is multiplied by positive 2;
Described previous random noise signal is multiplied by negative 2;
Bias voltage is multiplied by positive 4;
Described previous random noise signal and described bias voltage are compared;
Undertaken first multiplexing by being multiplied by positive 2 described previous random noise signal and the described previous random noise signal that is multiplied by negative 2;
Undertaken second multiplexing by being multiplied by positive 4 described bias voltage and ground signalling; And
To suing for peace from described first multiplexing and described the second multiplexing output, to produce described random noise signal.
23. methods according to claim 22, also comprise: the described bias voltage that can operate the frequency expansion of adjusting described modulated output signal is programmed.
24. 1 kinds of devices for generation of modulated output signal, described device comprises:
For produce the module of controlling voltage according to unmodulated reference signal;
Produce the module of random noise signal for transmitting mapping function based on chaos;
For produce the module of modulated output signal in response to described control voltage and described random noise signal;
For generation of the module of the ramp signal corresponding with described control voltage;
For predetermined voltage and described random noise signal are added to produce the module of the output after summation; And
For the module that the output after described ramp signal and described summation is compared, wherein, described modulated output signal is based on described comparison.
25. devices according to claim 24, wherein, comprise for generation of the module of described ramp signal:
For adjust the module of the slope of described ramp signal based on described control voltage;
Be used for based on described module of relatively ending described ramp signal; And
Be used for based on the described module that relatively triggers described ramp signal.
26. devices according to claim 24, wherein, comprise the module that transmits mapping for realizing chaos for generation of the module of random noise signal.
27. devices according to claim 26, wherein, described chaos transmits mapping and comprises that tent transmits one of mapping and bernouilli shift map.
28. devices according to claim 24, wherein, comprise for generation of the module of described random noise signal:
For previous random noise signal is multiplied by positive 2 module; And
For described previous random noise signal being multiplied by negative 2 module.
29. devices according to claim 28, wherein, comprise for generation of the module of described random noise signal:
For bias voltage is multiplied by positive 4 module; And
For the module that described previous random noise signal and described bias voltage are compared.
30. devices according to claim 29, wherein, comprise for generation of the module of described random noise signal:
For the described previous random noise signal that is multiplied by positive 2 is carried out to the first multiplexing module with the described previous random noise signal that is multiplied by negative 2;
For the described bias voltage and the ground signalling that are multiplied by positive 4 are carried out to the second multiplexing module; And
For to the module of suing for peace to produce described random noise signal from described first multiplexing and described the second multiplexing output.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/631,281 | 2009-12-04 | ||
| US12/631,281 US8421544B2 (en) | 2009-12-04 | 2009-12-04 | Chaotic wide band frequency modulator for noise reduction |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102142862A CN102142862A (en) | 2011-08-03 |
| CN102142862B true CN102142862B (en) | 2014-05-28 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201010576477.6A Expired - Fee Related CN102142862B (en) | 2009-12-04 | 2010-12-02 | Chaotic wide band frequency modulator for noise reduction |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US8421544B2 (en) |
| JP (1) | JP5298355B2 (en) |
| CN (1) | CN102142862B (en) |
| DE (1) | DE102010048782B4 (en) |
| GB (1) | GB2475949B (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8624634B1 (en) * | 2012-07-18 | 2014-01-07 | Infineon Technologies Ag | Methods for generating a signal and a signal generation circuit |
| TW201426691A (en) * | 2012-12-19 | 2014-07-01 | Chyng Hong Electronic Co Ltd | Vacuum fluorescent display power supply circuit without transformer and electromagnetic interference |
| CN104253648B (en) * | 2013-06-28 | 2017-03-15 | 上海贝尔股份有限公司 | Optical transport network equipment and correlation method |
| KR101619293B1 (en) * | 2014-11-12 | 2016-05-11 | 현대오트론 주식회사 | Method and apparatus for controlling power source semiconductor |
| EP3455639B1 (en) * | 2016-05-13 | 2022-06-01 | Hitachi, Ltd. | Electromagnetic noise path detecting system, rolling stock with an electromagnetic noise path detecting system, and method to determine an electromagnetic noise path |
| CN106655741B (en) * | 2016-08-29 | 2019-03-08 | 北京中电华大电子设计有限责任公司 | A kind of power isolation circuit applied to real random number generator |
| DE102017109456A1 (en) * | 2017-05-03 | 2018-11-08 | Carl Zeiss Microscopy Gmbh | Microscope system and method for operating a microscope system |
| CN116991199B (en) * | 2023-09-25 | 2024-01-02 | 深圳扬兴科技有限公司 | Clock signal intelligent noise reduction method for clock chip |
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| US5506545A (en) * | 1993-11-09 | 1996-04-09 | Gte Government Systems Corporation | Electronic apparatus having low radio frequency interference from controlled excursion noise-modulated system clock signal |
| US5659587A (en) * | 1994-11-23 | 1997-08-19 | Tektronix, Inc. | Spread spectrum phase-locked loop clock generator with VCO driven by a symmetrical voltage ramp signal |
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| US5263055A (en) * | 1991-11-04 | 1993-11-16 | Motorola, Inc. | Apparatus and method for reducing harmonic interference generated by a clock signal |
| DE4442403C2 (en) * | 1994-11-30 | 1997-01-23 | Itt Ind Gmbh Deutsche | Clock generator for generating a low-interference system clock |
| US5943382A (en) | 1996-08-21 | 1999-08-24 | Neomagic Corp. | Dual-loop spread-spectrum clock generator with master PLL and slave voltage-modulation-locked loop |
| US6687319B1 (en) * | 1999-02-04 | 2004-02-03 | Rambus Inc. | Spread spectrum clocking of digital signals |
| JP2001282378A (en) * | 2000-03-30 | 2001-10-12 | Ando Electric Co Ltd | Higher harmonic spread spectrum circuit of clock frequency |
| JP2006197308A (en) * | 2005-01-14 | 2006-07-27 | Renesas Technology Corp | Clock generation method and clock generation circuit |
| US7417509B2 (en) * | 2006-03-03 | 2008-08-26 | Linear Technology Corporation | Spread spectrum modulation of a clock signal for reduction of electromagnetic interference |
| JP2010506456A (en) * | 2006-09-28 | 2010-02-25 | キーストーン セミコンダクター，インコーポレイテッド | Spread Spectrum Clock Generator Using Reached Lock Loop Technology |
| US7576620B2 (en) * | 2007-07-13 | 2009-08-18 | Leadtrend Technology Corp. | Pseudo random clock generator |
-
2009
- 2009-12-04 US US12/631,281 patent/US8421544B2/en not_active Expired - Fee Related
-
2010
- 2010-10-18 DE DE102010048782.1A patent/DE102010048782B4/en not_active Expired - Fee Related
- 2010-10-18 JP JP2010233718A patent/JP5298355B2/en not_active Expired - Fee Related
- 2010-10-29 GB GB1018348A patent/GB2475949B/en not_active Expired - Fee Related
- 2010-12-02 CN CN201010576477.6A patent/CN102142862B/en not_active Expired - Fee Related
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5506545A (en) * | 1993-11-09 | 1996-04-09 | Gte Government Systems Corporation | Electronic apparatus having low radio frequency interference from controlled excursion noise-modulated system clock signal |
| US5659587A (en) * | 1994-11-23 | 1997-08-19 | Tektronix, Inc. | Spread spectrum phase-locked loop clock generator with VCO driven by a symmetrical voltage ramp signal |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102142862A (en) | 2011-08-03 |
| DE102010048782A1 (en) | 2011-09-08 |
| GB2475949A (en) | 2011-06-08 |
| GB201018348D0 (en) | 2010-12-15 |
| JP5298355B2 (en) | 2013-09-25 |
| US8421544B2 (en) | 2013-04-16 |
| US20110135027A1 (en) | 2011-06-09 |
| GB2475949B (en) | 2011-11-02 |
| JP2011118878A (en) | 2011-06-16 |
| DE102010048782B4 (en) | 2017-12-07 |
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