CN102142456B - Bipolar junction transistor with high gain constant beta and manufacturing method thereof - Google Patents

Abstract

The invention discloses an N-P-N bipolar junction transistor. A breakdown voltage of an emitter and a collator of the N-P-N bipolar junction transistor is more than 10 volts; and the gain constant beta is more than 300. During manufacturing of the transistor, an N-type layer is added so that recombination between electrons and holes is reduced; meanwhile, an effect of increasing the gain constant beta can be achieved.

Description

Bipolar junction transistor with high gain constant beta and manufacture method thereof

Technical field

Preferred embodiment of the present invention relates to a kind of semiconductor device, and particularly engages transistor relevant for a kind of high-gain bipolarity.

Background technology

It is three-pole device that bipolarity engages transistor (bipolar junction transistors, BJTs), has emitter-base bandgap grading, base stage and collector.In typical common emitter-base bandgap grading product, base current (input) is controlled relatively a large amount of collected currents (output) relatively in a small amount.No matter in power supply or small-signal product, all want to change collected current by vast scale ground and change base current, this variation ratio is called h _FEOr gain constant β.Bipolarity engages transistor and also has breakdown voltage, is called collector-base breakdown voltage BV _CBO, and collector-emitter-base bandgap grading breakdown voltage BV _CEOβ, BV _CBO, BV _CEOThese three parameters not only and dependent and all interrelate on the structural limitations of entity apparatus.For instance, work as BV _CBOImmobilize β and BV _CEOBe inversely proportional to; Work as BV _CEOImmobilize, β again with BV _CBOBe inversely proportional to.The NPN bipolarity that conventional method makes engages transistor and has specific breakdown voltage restriction, the upper limit that above-mentioned interactive relation will cause gain constant β to promote.

Industry is desired most ardently and is produced a kind of NPN bipolarity joint transistor, even if its collector-emitter-base bandgap grading breakdown voltage BV _CEOVery high, also have simultaneously very high gain constant β.

Summary of the invention

Preferred embodiment of the present invention provides a pair of polarity connection to close transistor, and this bipolarity engages transistor to be had a high gain constant beta and surpass 10 volts collector emitter-base bandgap grading breakdown voltage.Disclosed embodiments of the invention comprise a substrate herein, and substrate has one first trap, and the first trap is arranged in the substrate and has one first degree of depth, and the first trap has one first conductive state.The second trap can be arranged in the first trap, and the second trap has the shape of a straight-flanked ring and has the first conductive state, and the second trap has one second degree of depth, and this second degree of depth is less than first degree of depth, and the second trap mixes and is higher than a concentration of the first trap.Triple-well is arranged in the first trap and has the second conductive state, and triple-well fills up a zone of the second trap inside and has about second degree of depth, and a upper surface of triple-well is a upper surface of aiming at the second trap.Present embodiment also can comprise one deck, and this layer has the first conductive state and be positioned at a top of triple-well, and this layer has a thickness that is lower than second degree of depth, and a upper surface of this layer is the upper surface of aiming at the second trap.The emitter region is arranged at a core of this layer and has a rectangular shape, and the emitter region has the concentration that the first conductive state and doping are higher than this layer, and this emitter region can be passed this layer and extend in the triple-well.Present embodiment also can comprise a base region, and this base region has the shape of the second conductive state and a straight-flanked ring, and this base region is to separate with the emitter region and concentricity, mixes and be higher than a concentration of triple-well in this base region, and passes this layer and extend in the triple-well.Collector region has the shape of the first conductive state and a straight-flanked ring, and collector region is to separate with the base region and concentricity, and collector region mixes and is higher than a concentration of this layer, and can pass this layer and extend in the triple-well.

Although structure and method of the present invention as above illustrates or functional descriptions be stated from after in the embodiment content, yet have the knack of this operator when the described description of knowing among the embodiment, unless particularly point out, otherwise the means described in the embodiment or execution mode are not to limit the scope of the invention.And patent claim defines the impartial means that meet impartial opinion or equipollent all within the scope of the invention according to the present invention.

Usually know the knowledgeable with reference to the relevant knowledge of the contained embodiment content of specification and institute's tool when can clearly understanding, within the spirit and scope of the present invention, described in the embodiment or arbitrary feature of mentioning or the combination of a plurality of features, with patent claim of the present invention there be not mutual inconsistent the conflict.

In addition, described in the embodiment or being combined with of arbitrary feature of mentioning or a plurality of features may be got rid of clearly by other arbitrary embodiment of the present invention.And structure and method of the present invention, its associated advantages and the feature with novelty are to be described in an embodiment or to mention, so that summary of the present invention is had clearer understanding.Certainly, scrutable is need not comprise all viewpoints, advantage or all can implement all features in arbitrary special embodiment of the present invention.Other advantage and viewpoint of the present invention are to know understanding in following detailed description and claim scope.

Description of drawings

For foregoing of the present invention can be become apparent, embodiment cited below particularly, and cooperate appended accompanying drawing, be described in detail below, wherein:

The N-P-N bipolarity that Figure 1A illustrates according to the manufacturing of one embodiment of the invention engages transistorized top view.

It is the profile of base wafer that Figure 1B illustrates.

It is the profile of base wafer after dark cloth is planted the N-trap that Fig. 1 C illustrates.

It is the profile of Fig. 1 C-structure after cloth is planted N-trap and P-trap that Fig. 1 D illustrates.

It is the profile of structure after the P-trap forms the N-type layer of Fig. 1 D that Fig. 1 E illustrates.

It is the profile of structure after an execution oxidation technology defines insulation layer and active region of Fig. 1 E that Fig. 1 F illustrates.

It is profile along the hatching 1G-1G ' of Figure 1A that Fig. 1 G illustrates.

Fig. 2 illustrates the flow chart that bipolarity of the present invention engages the manufacture method of transistor arrangement.

It is that Fig. 1 G defines the example in order to the profile of describing doping density that Fig. 3 illustrates.

Fig. 4 A illustrate according to one embodiment of the invention along the chart by the doping density of the first section of Fig. 3 definition.

Fig. 4 B illustrate according to one embodiment of the invention along the chart by the doping density of the second section of Fig. 3 definition.

Fig. 4 C illustrates the chart along the trisected doping density that is defined by Fig. 3 according to one embodiment of the invention.

Fig. 5 A illustrates the chart of the base-emitter current transfer characteristic of bipolarity joint transistor in 25 ℃ temperature that is one embodiment of the invention.

Fig. 5 B illustrates the chart of the base-emitter current transfer characteristic of bipolarity joint transistor in 125 ℃ temperature that is one embodiment of the invention.

Fig. 6 A illustrates the chart of the collector characteristic of bipolarity joint transistor in 25 ℃ temperature that is one embodiment of the invention.

Fig. 6 B illustrates the chart of the collector characteristic of bipolarity joint transistor in 125 ℃ temperature that is one embodiment of the invention.

Fig. 7 A illustrates the graph of a relation that engages the gain constant β of the collected current of transistor under 25 ℃ temperature according to the bipolarity of one embodiment of the invention.

Fig. 7 B illustrates the graph of a relation that engages the gain constant β of the collected current of transistor under 125 ℃ temperature according to the bipolarity of one embodiment of the invention.

The known N-P-N bipolarity that Fig. 8 A illustrates according to general type engages transistorized mode of operation.

Fig. 8 B illustrates according to known N-P-N bipolarity and engages transistorized profile, but its transistorized geometry is comparatively near the disclosed structure of the present invention.

Fig. 8 C illustrates the N-P-N bipolarity that makes according to a preferred embodiment of the present invention and engages transistorized profile, and describes the effect that gain constant β increases.

Embodiment

Below be to propose preferred embodiment also to help with relevant icon as detailed description of the present invention.The icon of described embodiment can be in the certain applications example represents in proportionally mode, yet, be not that the mode that is able to proportionally represents in other application examples.In particular aspect or icon with describe in use same reference sign person to be called as identical, similar or similar member and/or element, yet, according to other embodiment, identical use is then non-(in the icon of embodiment, identical, similar or similar member and/or element are to use identical component symbol to explain, but are not the use that limits other application examples).Moreover, the use of the directional terminology among the embodiment, for example be for top, bottom, the left side, the right, upwards, downwards, covering, top, following ... under, back and front, described noun is to belong to literal to explain upperly, but is not the use that limits other application examples.Implementing when of the present invention is habitual integrated circuit technology and other conventional art that possible be applied to the numerous species type, only proposes in an embodiment to help to understand general implementation step of the present invention and makes related description.The present invention is the field applicable to semiconductor device and technique, yet, following to explain relevant for N-P-N bipolarity joint transistor and relevant manufacture method.

Please refer to Figure 1A, it illustrates the top view that engages transistor (Bipolar Junction Transistor, BJT) according to the N-P-N bipolarity of the manufacturing of one embodiment of the invention.Place, a hatching 1G-1G ' below in Fig. 1 G, it is to comprise an active region that the bipolarity of this embodiment engages transistor, and active region comprises the emitter region 10 (emitting region) with a rectangle (or square) border, and the base region of a complementary shape (base region) 15, base region 15 has rectangle (or square) border or ring, and base region 15 is around emitter region 10 and concentricity with emitter region 10.Moreover a collector region 20 (collector region) also has the shape of rectangle (or square) ring, and is concentrically around base region 15.Present embodiment comprises that also insulation layer (isolation region) 25,30 and 35 is formed with field oxide, insulation layer 30 and 35 can separate respectively the collector region 20 and base region 15 of active region, and the base region 15 and emitter region 10 of separating active region.The outside dimension of the structure of Figure 1A is about 40 microns.Wherein emitter region 10 can have and is about a width of 10 microns, and forms around extensible surpassing of the straight-flanked ring of emitter region 15 being about 20 microns width, and the straight-flanked ring of emitter region 15 is about 3 microns wide bars.Similarly, collector region 20 can be formed by being about 3 microns wide bars, and this bar is extensible above about 35 microns width.It is can show high gain constant beta (to that is to say collected current I that this kind bipolarity engages transistorized structure _CWith base stage I _BThe ratio of electric current), and simultaneously has relative high breakdown voltage (BreakdownVoltage) (BV for example _CEOGreater than 10 volts).

Figure 1B-Fig. 1 G is the manufacture method that illustrates a kind of above-mentioned bipolar transistor.In Figure 1B, form first a substrate in a base wafer 40, base wafer 40 can comprise a high-resistance material, this high-resistance material for example is to be P type substrate, or is P type or N-type epitaxial material.Then, referring to Fig. 1 C, the atom cloth of N-type alloy (for example phosphor) can be planted to base wafer 40, the concentration of the N-type alloy in base wafer is approximately from 10 ¹²To 10 ¹⁴Atoms/cm ², in one embodiment, this concentration is to be 10 ¹³Atoms/cm ², and can use a high temperature (approximately from 1000 ℃ to 1200 ℃, being to be about 1150 ℃ in one embodiment) and a suitable expansion time and order about the N-type alloy and form a dark N-trap (NWD) 45, in other words, this N-trap 45 is to be the first trap.N-trap 45 has a degree of depth and a doping content, from 5 to 9 microns approximately of this degree of depth, and in one embodiment, this degree of depth for example is to be 7 microns, and this doping content is approximately from 10 ¹⁵To 10 ¹⁷Atoms/cm ³, in one embodiment, this doping content for example is to be 10 ¹⁶Atoms/cm ³

(compare Figure 1A) as mentioned above, N-trap 45 can form a rectangle, and in other words, this rectangle is to be the first rectangle.The structure of Fig. 1 C can suitably utilize photoresist to hide, and can suitably graphically expose a zone, more this regional cloth can be planted the atom of N-type alloy (for example phosphor).Then, shown in Fig. 1 D, but cloth is planted formation one N-trap (NWI) 50, and in other words, this N-trap is to be the second trap.N-trap 50 doped N-type alloys (as: phosphorus), concentration is approximately between 10 ¹²To 10 ¹⁴Atoms/cm ², in one embodiment, this concentration is to be 6 * 10 ¹²Atoms/cm ², and around the central area of N-trap 45.Moreover in order to begin to form triple-well, being positioned at N-trap 50 structure inboard and that fill up N-trap 45 central areas will form, that is to say to come out with the patterning photoresist in the central area of N-trap 45, it (is P type alloy that cloth is planted the second conductivity type molecule, such as boron), concentration is approximately between 10 ¹²To 10 ¹⁴Atoms/cm ², in one embodiment, this concentration is to be 10 ¹³Atoms/cm ², form thus triple-well.Triple-well called after one P-trap cloth is planted (PWI) 55 can be exposed to a hot environment (approximately from 1000 ℃ to 1200 ℃, to be about 1150 ℃ in one embodiment) continue for some time (about 4 hours), order about N-type alloy and P type alloy and form a dark N-trap (NWI) 50 and a dark P-trap (PWI) 55.Dark N-trap 50 has a degree of depth, from 2 to 4 microns approximately of this degree of depth, and in one embodiment, this degree of depth for example is to be 3 microns, doping content is higher than the first trap, approximately between 10 ¹⁵To 10 ¹⁷Atoms/cm ³, in one embodiment, this concentration is to be 2 * 10 ¹⁶Atoms/cm ³From the top (with reference to Figure 1A vertical view), N-trap 50 can form a straight-flanked ring, for example is the first rectangle of N-trap 45 inside.The internal edge of base wafer 40 has and is about 8 microns width.Triple-well, namely

P-trap cloth is planted (PWI) 55, has a degree of depth and a doping content, from 2 to 4 microns approximately of this degree of depth, and in one embodiment, this degree of depth is to be 3 microns, doping content is approximately from 10 ¹⁵To 10 ¹⁷Atoms/cm ³, in one embodiment, this doping content for example is to be 3 * 10 ¹⁶Atoms/cm ³From depression angle, P-trap 55 can form a rectangle, and in other words, this rectangle is to be the second rectangle.Then, mode by the N-type alloy that orders about the dark N-trap of formation (NWI) 50 and dark P-trap (PWI) 55 behind the alloy (being N-type alloy such as phosphorus or arsenic) that adds the first conductive state and the diffusion of P type alloy, one deck that formation has the first conductive state as: N-type layer 60 is upper in P-trap 55, shown in Fig. 1 E.Perhaps, form N-type layer 60 in the mode of adjusting N-trap (NWD) 45 and the net doping (such as net concentration) of dark P-trap (PWI) 55, Fig. 4 C explains in the N-type doping of dark P-trap (PWI) 55 surface formation N-type layers 60 and implements main points that its details will be in hereinafter explanation.

Then, shown in Fig. 1 F, at the superstructure shown in Fig. 1 E, can carry out a field oxide technique and produce field oxide material (for example silicon dioxide), defining the insulation layer 25,30,35 shown in Figure 1A and Fig. 1 F, and insulation layer 25,30, the 35th, separate with active region.Afterwards, shown in Fig. 1 G, can be by coating photoresist and patterning active region, and the atom that cloth is planted N-type alloy (such as arsenic) forms a N+ emitter region 10 and a N+ collector region 20 that has in fact rectangular shape to active region, and collector region 20 is and emitter region 10 concentricity (please refer to Figure 1A and Fig. 1 G).Can mix with collector region 20 and be higher than a concentration of N-type layer 60 and extend a degree of depth in emitter region 10, this doping content scope is approximately from 10 ¹⁹To 10 ²¹Atoms/cm ³, from 0.1 to 0.5 micron approximately of the degree of depth; In one embodiment, this doping content for example is to be 2 * 10 ²⁰Atoms/cm ³, this degree of depth for example is to be 0.3 micron.

P type base region 15 (shown in Fig. 1 G) can be formed by coating photoresist and other zone of patterning, base region 15 has the shape of straight-flanked ring, and base region 15 is arranged between emitter region 10 and the collector region 20, and the atom cloth of P type alloy (for example boron) can be planted a degree of depth to base region 10, so that mixing, base region 15 is higher than a concentration of triple-well.From 0.1 to 0.5 micron approximately of this degree of depth, in one embodiment, this degree of depth for example is to be 0.3 micron, this doping content scope is approximately from 10 ¹⁹To 10 ²¹Atoms/cm ³, in one embodiment, this doping content for example is to be 10 ²⁰Atoms/cm ³

According to above-mentioned disclosed manufacture method, can be used to make the bipolarity joint transistor (BJT) of high gain constant beta, and this BJT has high breakdown voltage (Breakdown Voltage), and the execution mode of the method is to be summarized in the flow chart of Fig. 2.Execution mode as described in Figure 2 in step 100, provides a base wafer.This base wafer similarly is to discuss with reference to Figure 1B, can comprise high resistance P-type material, P type epitaxial material or N-type epitaxial material.Afterwards in step 105, atom to the base wafer that cloth is planted n type material becomes the shape of the first rectangle, and in other words, the atom of this n type material is to be an alloy, and this alloy for example is to be phosphor.

Then, in step 110, structure is born in a high temperature (for example approximately from 1000 ℃ to 1200 ℃, in one embodiment, this high temperature is to be 1150 ℃) in an expansion time (for example approximately from 4 to 20 hours, in one embodiment, this expansion time is to be 12 hours), order about cloth and plant rear atom to a degree of depth, with enough dark N-traps 45 with a doping content that in wafer, forms.In other words, this N-trap 45 is to be the first trap, from 5 to 9 microns approximately of this degree of depth, and in one embodiment, this degree of depth is to be 7 microns.This doping content is approximately from 10 ¹⁵To 10 ¹⁷Atoms/cm ³, in one embodiment, this doping content is to be 10 ¹⁶Atoms/cm ³In step 115, atom to a degree of depth that can plant n type material by coating photoresist, patterning and cloth in the N-of the shape with straight-flanked ring trap (NWI) 50 (Fig. 1 D), the second trap namely, this n type material for example is phosphor.In step 120, can by coating photoresist, patterning and with the atom cloth value of P-type material in P-trap 55, make this P-trap can be formed at the inside of N-trap 50, P-trap 55 (Fig. 1 D) is triple-well namely, this P-type material for example is to be boron.In step 122, N-type cloth plant and P type cloth plant are born respectively high temperature (for example about 1000 to 1200 ℃ of temperature in step 115 and 120, in one embodiment, this high temperature is to be 1150 ℃) and continue for some time (for example approximately from 1 to 10 hour, in one embodiment, this section period is to be 4 hours), ordering about cloth plants atom and diffuses to a degree of depth downwards, to form N-trap 50 and P-trap 55, N-trap 50 has the degree of depth approximately between 2 to 4 microns, and in one embodiment, this degree of depth for example is to be 3 microns, concentration of dopant is greater than the concentration of dopant of the first rectangle, and this concentration is approximately between 10 ¹⁵To 10 ¹⁷Atoms/cm ³, in one embodiment, this doping content is to be 2 * 10 ¹⁶Atoms/cm ³P-trap 55 has a degree of depth and a concentration, and this degree of depth is approximately between 2 to 4 microns, and in one embodiment, this degree of depth for example is to be 3 microns, and this concentration is approximately between 10 ¹⁵To 10 ¹⁷Atoms/cm ³, in one embodiment, this doping content is to be 3 * 10 ¹⁶Atoms/cm ³Afterwards, in step 125, after cloth is planted N-type alloy (such as phosphorus or arsenic), order about the N-type alloy and the diffusion of P type alloy that consist of M-trap 50 and P-trap 55 in the step 122, form thus a N-type layer 60 (Fig. 1 E).

In order to define and to separate each active region (being emitter region 10, the base region 15 and collector region 20 among Figure 1A), in step 130, can carry out an oxidation technology.In step 135, can carry out patterning and cloth and plant the atom of N-type alloy and form N+ emitter region and N+ collector region (emitter region 10 and collector region 20 in Fig. 1 G), N+ emitter region and N+ collector region are to pass N-type layer 60 to extend in the triple-well.This N-type alloy for example is to be arsenic.Can be mixed with collector region 20 in emitter region 10 is higher than a concentration of N-type layer 60, and this concentration range is approximately from 10 ¹⁹To 10 ²¹Atoms/cm ³, in one embodiment, this concentration is to be 2 * 10 ²⁰Atoms/cm ³The degree of depth of emitter region 10 and collector region 20 approximately can from 0.1 to 0.5 micron, and in one embodiment, the described degree of depth is to be 0.3 micron.In step 140, can form a base region 15 (shown in Figure 1A and Fig. 1 G) by the atom that graphical and cloth are planted P type alloy, be higher than a concentration of triple-well so that mix in base region 15, base region 15 is to pass N-type layer 60 to extend in the triple-well, and base region 15 has a degree of depth.This concentration is approximately from 10 ¹⁹To 10 ²¹Atoms/cm ³, in one embodiment, this concentration is to be 10 ²⁰Atoms/cm ³, from 0.1 to 0.5 micron approximately of this degree of depth, in one embodiment, this degree of depth is to be 0.3 micron.

Although cloth method for planting shown in Figure 2 of the present invention illustrates the bipolarity of a kind of N-P-N and engages the manufacture method of transistor (NPN BJT), right be familiar with this technical field person when understanding all corresponding step replacements after available N-type and the P-type material exchange of all steps that involve N-type and P-type material, make the bipolarity joint transistor (PNP BJT) of a kind of P-N-P.

The bipolarity that technique in the application drawing 2 is made a N-P-N engages the profile that transistor can produce the doping density that illustrates such as Fig. 3, Fig. 4 A, Fig. 4 B and Fig. 4 C.Fig. 3 is three parts proportionally distinguishing approx about the structure of above-mentioned Figure 1A and Fig. 1 G, described part by in the defined plane of hatching 1G-1G ' of Figure 1A with a plurality of line segments, described line segment respectively is denoted as section 1-3.Emulation doping density corresponding to section 1 is with the atoms/cm of unit ³Be shown on the chart of Fig. 4 A, this section 1 is the line segment that passes through emitter region 10 in Fig. 3.Content for the doping density of phosphor (N-type), boron (P type) and arsenic (N-type), be in a plurality of curves that are depicted among Fig. 4 A, the content of the doping density of phosphor (N-type), boron (P type) and arsenic (N-type) is to correspond respectively to curve 200, curve 205 and curve 210.Curve 215 is to be a net doping curve.

Emulation doping density corresponding to section 2 (as shown in Figure 3) is to be illustrated among Fig. 4 B, and this section 2 is the line segments along a part 35 of passing field oxide, and is located between emitter region 10 and the base region 15.Curve 220 is the doping densities that represent severally boron and phosphor with curve 225; Curve 230 is expression one net doping density.Section 3 (Fig. 3) is to be the line segment along a part 30 of passing field oxide, and between base region 15 and collector region 20.Doping density for section 3 is to be shown in Fig. 4 C, and curve 235 and curve 240 represent respectively the density of boron and phosphor in Fig. 4 C, and curve 245 is to be a net doping density.

The performance characteristics that engages transistorized a plurality of samples according to the N-P-N bipolarity of embodiment of the invention made is to be illustrated among Fig. 5 A, Fig. 5 B, Fig. 6 A, Fig. 6 B, Fig. 7 A and Fig. 7 B.The first curve 305 of Fig. 5 A illustrates that the N-P-N bipolarity engages transistorized input characteristics when temperature is 25 ℃, shows base current I _BFor base stage to emitter voltage V _BEFunction, the second curve 310 of Fig. 5 A illustrates its transfer characteristic, display set electrode current I _CFor base stage to emitter voltage V _BEFunction.Fig. 5 B illustrates the input characteristics similar to Fig. 5 A (curve 315) and transfer characteristic (curve 320), but its temperature is 125 ℃.

Fig. 6 A is the chart for the group that illustrates a plurality of collector characteristics, and described characteristic is presented in 25 ℃ the temperature, base current I _BDuring as a parameter, collected current I _CWith collector emitter voltage V _CEBetween relation.Fig. 6 B is identical with the described characteristic of Fig. 6 A, but temperature is 125 ℃.

Fig. 7 A is the β of the collected current function under 25 ℃ the temperature (collected current IC/ base current I _B) graph of a relation.Fig. 7 B is β (the collected current I for the collected current function under 125 ℃ the temperature _C/ base current I _B) graph of a relation.

For engaging transistorized four samples according to the formed N-P-N bipolarity of the embodiment of the invention, the emitter-base bandgap grading of its experiment and the breakdown voltage (BV between the base stage _EBO), the breakdown voltage (BV between collector and the emitter-base bandgap grading _CEO) and collector and base stage between breakdown voltage (BV _CBO) be to represent in Table 1.Described sample is to be made by 100 microns squares square emitter region.It is worth mentioning that breakdown voltages all in chart are all above 10 volts.Specifically, the collector emitter-base bandgap grading breakdown voltage BV of the minimum of all samples _CEOTo be 11.5 volts.

Table one

Can observe the N-P-N bipolarity that embodiments of the invention make at Fig. 7 A and Fig. 7 B and engage transistor, its β value (beta values) can reach more than 1000.Therefore, N-P-N bipolarity of the present invention engages transistorized β value (collected current I _C/ base current I _B) engage transistor with the β value of known formula prediction apparently higher than the N-P-N bipolarity made from conventional method.

${\mathrm{BV}}_{\mathrm{CEO}}=\frac{B{V}_{\mathrm{CBO}}}{n\sqrt{\mathrm{\β}}}$ (formula .1)

Or

$\mathrm{\β}={\left(\frac{{\mathrm{BV}}_{\mathrm{CBO}}}{{\mathrm{BV}}_{\mathrm{CEO}}}\right)}^n$ (formula .2)

Wherein n is the constant of 3-6, obtains BV from table one _CEOWith BV _CBORepresentative numerical value, choose

BV _CEO＝13

And

BV _CBO＝28.5，

From the scope of above-mentioned numerical computations β value approximately between

${\left(\frac{28.5}{13}\right)}^3=10.53...$

When n=3 and approximately

${\left(\frac{28.5}{13}\right)}^6=100.02...$

Between when n=6.Therefore, the present invention can produce the β value and is higher than prediction β value and reaches N-P-N bipolarity joint transistor more than 10 times even 100 times.

Fig. 8 A illustrates known N-P-N bipolarity with Fig. 8 B and engages transistor according to the mode of operation of known principle.Fig. 8 A illustrates General N-P-N bipolarity and engages transistor, has a N-type emitter-base bandgap grading and comprises that N+ zone, a P type base stage comprise that P-type trap (PWI) and a width W and the capable collector of a N comprise N-type trap (NWI), wherein base current I _BEnter base stage, collected current I _CEnter collector, emitter current I _E=I _C+ I _BLeave emitter-base bandgap grading.Emitter current mainly carries with majority carrier (namely electronics) in emitter-base bandgap grading, the electronics of first (a) enters base stage by emitter-base bandgap grading and can again be combined with the hole of P type base stage, the electrons of second portion (b) (usually larger) crosses narrower base region and arrives collector, mainly with majority carrier (c) (namely hole) carrying, the part hole is again to be combined with the electronics (a) from emitter injection to base current in base stage.The electronics of base current remainder (d) can be from the Base injection emitter-base bandgap grading.In general, when the hole when electronics is combined in the base region again, a small amount of electrons injects collector becomes collected current I _C, and reduce currentgainβ=I _C/ I _B, current gain reduces and BV _CEORelevant, shown in above-mentioned formula 1 and 2.Increase BV _CEOWherein a kind of method increase exactly base width W (Fig. 8 A), yet, increase base width W and can cause the probability that electronics is combined again with the hole in the base stage, can cause on the contrary the β reduction.

Fig. 8 B illustrates the described effect of Fig. 8 A but its transistorized geometry illustrates structure more near the disclosed structure of the present invention than Fig. 8 A.In base stage electronics occuring between the emitter region and again be combined with the hole, can cause equally β to reduce.

Fig. 8 C illustrates the N-P-N bipolarity joint transistor that a preferred embodiment of the present invention makes, and this embodiment comprises aforesaid N-type layer 60.As shown in the figure, N-type layer 60 provides alternative route (namely short loop (e)), can arrive collector by short loop by the electronics of emitter injection, and this short loop reduces the effect that electronics is combined again with the hole, and then the increase collected current, and increase the β value.

As can be known above-mentioned, have the method that constructed person can propose with reference to the embodiment of the invention and be beneficial to and make a N-P-N bipolarity and engage transistor (BJT) in this technical field, and particularly form a kind of bipolarity that in integrated circuit, has larger gain constant beta and surpass 10 volts breakdown voltage and engage transistor.Although exposure of the present invention is with reference to a plurality of embodiment, described embodiment is that the usefulness for explanation is not to limit the present invention.Therefore, this disclosure is a plurality of embodiment that provide above-mentioned, have in this technical field and know that usually the knowledgeable can be required according to the practical application condition, come within the spirit and scope of the present invention for described embodiment adjust, change, in conjunction with, exchange, omit, substitute, the replacement of selection and equipollent, and described embodiment is not in order to get rid of each other.Scope of the present invention is when looking appended being as the criterion that claim scope defines.

In sum, although the present invention discloses as above with embodiment, so it is not to limit the present invention.The persond having ordinary knowledge in the technical field of the present invention, without departing from the spirit and scope of the present invention, when being used for a variety of modifications and variations.Therefore, protection scope of the present invention is when looking appended being as the criterion that claim scope defines.

Claims (19)

1. a bipolarity engages transistor arrangement, comprising:

One substrate has one first trap, and this first trap is arranged in this substrate and has one first degree of depth, and this first trap has one first conductive state;

One second trap, have this first conductive state, this second trap is arranged in this first trap and has one second degree of depth, and this second degree of depth is less than this first degree of depth, this second trap mixes and is higher than a concentration of this first trap, the central area of this second trap circle segment or whole this first trap;

One triple-well has one second conductive state, and this triple-well is arranged in this first trap, and this triple-well fills up a zone of this second trap inside;

One doped layer has this first conductive state, and this doped layer is positioned at a top of this triple-well and has a thickness that is lower than this second degree of depth, and a upper surface of this doped layer is this upper surface of aiming at this second trap;

One emitter region has this first conductive state and a rectangular shape, and this emitter region is arranged at a core of this doped layer, mixes and be higher than a concentration of this doped layer in this emitter region, and passes this doped layer and extend in this triple-well;

One base region has the shape of this second conductive state and a straight-flanked ring, and this base region is separated with this emitter region and be concentricity, mixes and be higher than a concentration of this triple-well in this base region, and passes this doped layer and extend in this triple-well; And

One collector region has the shape of this first conductive state and a straight-flanked ring, and this collector region separates with this base region and be concentricity, and this collector region mixes and is higher than a concentration of this doped layer, and passes this doped layer and extend in this triple-well.

2. bipolarity as claimed in claim 1 engages transistor arrangement, has:

One gain constant β is distributed to 1200 by 130; And

One collector emitter-base bandgap grading breakdown voltage is above 10 volts.

3. bipolarity as claimed in claim 1 engages transistor arrangement, and wherein this gain constant β surpasses 1000.

4. bipolarity as claimed in claim 1 engages transistor arrangement, also comprises:

One field oxide is arranged on the surface of this second trap and this doped layer, and this field oxide separates this emitter region and this base region, and separates this base region and this collector region.

5. bipolarity as claimed in claim 1 engages transistor arrangement, also comprises a high resistance P-type material, a P type epitaxial material or a N-type epitaxial material.

6. bipolarity as claimed in claim 1 engages transistor arrangement, and wherein the doping content of this emitter region and this collector region is 2 * 10 ²⁰Atoms/cm ³

7. bipolarity as claimed in claim 1 engages transistor arrangement, and wherein the doping content of this base region is 10 ²⁰Atoms/cm ³

8. bipolarity as claimed in claim 1 engages transistor arrangement, wherein:

This first conductive state is N-type; And

This second conductive state is the P type.

9. bipolarity as claimed in claim 1 engages transistor arrangement, and wherein this first trap has 7 microns a degree of depth and 10 ¹⁶Atoms/cm ³A doping content.

10. bipolarity as claimed in claim 1 engages transistor arrangement, and wherein this second trap has 3 microns a degree of depth and 2 * 10 ¹⁶Atoms/cm ³A doping content.

11. bipolarity as claimed in claim 1 engages transistor arrangement, wherein this triple-well has 3 microns a degree of depth and 3 * 10 ¹⁶Atoms/cm ³A doping content.

12. bipolarity as claimed in claim 1 engages transistor arrangement, wherein this second trap is a square type ring, and around a central area of this first trap, and this triple-well is inserted this central area of this second trap.

13. a bipolarity engages the manufacture method of transistor arrangement, comprising:

One base wafer is provided;

Cloth is planted atom as one first conductive state of an alloy to a zone of this base wafer;

Order about this cloth and plant the enough degree of depth of rear atom to, to form a deep trap;

The atom that patterning and cloth are planted this first conductive state forms one second trap in this zone, a doping content of this second trap is greater than the concentration of this alloy in this zone;

Patterning and cloth are planted the atom of one second conductive state, form a triple-well in this second trap;

The atom that patterning and cloth are planted this first conductive state is covered in a doped layer on this second trap with formation;

Reach 4 hours by a temperature that makes this base wafer bear 1150 ℃, plant the enough degree of depth of rear atom to order about this cloth, to form a deep trap;

Carry out an oxidation technology, with definition and isolate an emitter region and a base region and this base region and a collector region, this emitter region has a rectangular shape, this emitter region is arranged at a core of this doped layer, this base region has the shape of a straight-flanked ring and concentricity with this emitter region, and this collector region has the shape of a straight-flanked ring and concentricity with this base region;

Patterning and cloth are planted the atom of this second conductive state in this emitter region and this collector region, so that this emitter region and this collector region are to mix to be higher than a concentration of this doped layer, and make this emitter region pass this doped layer to extend in this triple-well and this collector region extends in this second trap; And

Patterning and cloth are planted the atom of this second conductive state in this base region, are higher than a concentration of this triple-well so that mix in this base region, and make this base region pass this doped layer to extend to this triple-well.

14. bipolarity as claimed in claim 13 engages the manufacture method of transistor arrangement, wherein:

The cloth of the atom of this first conductive state is planted and is comprised that cloth plants the atom of a n type material; And

The cloth of the atom of this second conductive state is planted and is comprised that cloth plants the atom of a P-type material.

15. bipolarity as claimed in claim 14 engages the manufacture method of transistor arrangement, wherein this orders about step and comprises that ordering about this cloth plants the enough degree of depth of atom to, to form a N trap and a P trap.

16. a bipolarity engages transistor, is that the manufacture method of bipolarity joint transistor arrangement according to claim 13 forms.

17. bipolarity as claimed in claim 16 engages transistor, wherein this transistorized gain constant β is distributed to 1200 by 300.

18. bipolarity as claimed in claim 17 engages transistor, wherein has:

One gain constant β surpasses 1000; And

One collector emitter-base bandgap grading breakdown voltage is above 10 volts.

19. bipolarity as claimed in claim 13 engages the manufacture method of transistor arrangement, wherein:

This atom of this first conductive state is to be implanted in this base wafer, and forms the shape of one first square type;

Reach 12 hours by a temperature that makes this base wafer bear 1150 ℃, plant rear atom diffusion to order about this cloth; And

This second trap is positioned at this first rectangle and the shape of the straight-flanked ring that has.

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