CN102131347B - Circuit substrate and manufacturing method thereof - Google Patents
Circuit substrate and manufacturing method thereof Download PDFInfo
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- CN102131347B CN102131347B CN2010100030009A CN201010003000A CN102131347B CN 102131347 B CN102131347 B CN 102131347B CN 2010100030009 A CN2010100030009 A CN 2010100030009A CN 201010003000 A CN201010003000 A CN 201010003000A CN 102131347 B CN102131347 B CN 102131347B
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- insulating barrier
- dielectric layer
- chemical deposit
- blind hole
- layer
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Abstract
A method for manufacturing a circuit substrate comprises the following steps of: firstly, forming a medium layer on at least one surface of a substrate and forming an insulating layer on the medium layer; then, removing a part of the insulating layer and a part of the medium layer so as to form at least one blind hole in the medium layer and in the insulating layer; forming a chemical plating layer on the inner wall of the blind hole and on the un-removed insulating layer, wherein the bonding force between the insulating layer and the chemical plating layer is stronger than that between the medium layer and the chemical plating layer; and finally, electroplating a patterned conductive layer so as to cover the chemical plating layer.
Description
Technical field
The invention relates to a kind of circuit base plate and preparation method thereof, and particularly relevant for a kind of high-density lines base board that improves the processing procedure ability and preparation method thereof.
Background technology
The manufacture method of present fine rule road, highdensity circuit base plate; Be to use false add to become method to form required line layer, and false add become method mainly to divide into the semi-additive process of ABF (Ajinomotobuild-up film) film and non-ABF film according to insulating material characteristic difference.
ABF film surface can directly make conductive layer after alligatoring, the follow-up steps such as photoetching, plating, striping and etching of implementing false add one-tenth again are to form the line layer of fine circuit.But be subject to insulating material and be necessary for the ABF film, so cost is high.
The manufacture method of utilizing non-ABF film is at its surperficial first pressing one thin copper layer, and the follow-up steps such as photoetching, plating, striping and etching of implementing false add one-tenth again are to form the line layer of fine circuit.But being subject to thin copper layer is difficult for causing the processing procedure ability of utilizing non-ABF film to use the processing procedure ability of ABF film low attached on the non-ABF film.Therefore present false add becomes method, can be electroplating under the situation of copper of the no end except the ABF film of special material, and other the practice still adds that with the end copper electro-coppering is main.
Summary of the invention
The present invention provides a kind of circuit base plate and preparation method thereof, to improve the processing procedure ability.
The present invention provides a kind of circuit base plate and preparation method thereof, need not use the ABF film of special material, to reduce cost.
The present invention provides a kind of manufacture method of circuit base plate, comprises the following steps.At first, form a dielectric layer at least one surface of a substrate.Form an insulating barrier on dielectric layer.Then, remove partial insulative layer and dielectric layer, to form at least one blind hole in dielectric layer and insulating barrier.Form a chemical deposit on the inwall of blind hole and on the insulating barrier that does not remove, wherein the joint capacity between insulating barrier and the chemical deposit is greater than the joint capacity between dielectric layer and the chemical deposit.Afterwards, electroplate a patterned conductive layer, to cover chemical deposit.
The present invention provides a kind of circuit base plate, comprises a substrate, a dielectric layer, an insulating barrier, a chemical deposit, a patterned conductive layer and an electric connection pad.Dielectric layer is configured at least one surface of substrate.Insulating barrier is configured on the dielectric layer.On the inwall of chemical deposit cover part insulating barrier and at least one blind hole, wherein blind hole is formed in dielectric layer and the insulating barrier, and the joint capacity between insulating barrier and the chemical deposit is greater than the joint capacity between dielectric layer and the chemical deposit.Patterned conductive layer is configured on the chemical deposit and reaches in the blind hole.Electric connection pad is configured in the surface of substrate, and patterned conductive layer electrically connects via blind hole and electric connection pad.
In one embodiment of this invention, above-mentioned dielectric layer is a thermosetting resin.
In one embodiment of this invention, the material of above-mentioned dielectric layer comprises epoxy resin or glass epoxy resin.
In one embodiment of this invention, above-mentioned insulating barrier is a thermoplastic resin.
In one embodiment of this invention, the material of above-mentioned insulating barrier comprises Merlon, polyester or polyimide resin.
In one embodiment of this invention, above-mentioned formation insulating barrier on dielectric layer after, comprise that also insulating barrier is carried out a surface coarsening to be handled.
In one embodiment of this invention, the method for above-mentioned formation insulating barrier comprises coating or spray printing.
In one embodiment of this invention, the method for at least one blind hole of above-mentioned formation comprises laser punching.
In one embodiment of this invention, during at least one blind hole of above-mentioned formation, comprise also manifesting an electric connection pad that is positioned at the blind hole below that electric connection pad is positioned on the surface of substrate.
In one embodiment of this invention, before the above-mentioned plated pattern conductive layer, also comprise forming a patterning photoresist layer on chemical deposit.
In one embodiment of this invention, after the above-mentioned plated pattern conductive layer, also comprise removing the patterning photoresist layer and not being patterned the chemical deposit that conductive layer covers.
In one embodiment of this invention, the material of above-mentioned chemical deposit is selected from wherein a kind of metal in the group that copper, nickel, silver, chromium and tin forms.
In one embodiment of this invention, the material of above-mentioned patterned conductive layer comprises copper.
Based on above-mentioned; In circuit base plate of the present invention and preparation method thereof, form an insulating barrier earlier on dielectric layer, and the joint capacity between insulating barrier and the chemical deposit is greater than the joint capacity between dielectric layer and the chemical deposit; Form chemical deposit afterwards again on insulating barrier, to improve the processing procedure ability.
For letting the above-mentioned feature and advantage of the present invention can be more obviously understandable, hereinafter is special lifts embodiment, and conjunction with figs. elaborates as follows.
Description of drawings
Figure 1A～Fig. 1 F is the flow chart of manufacture method of the circuit base plate of one embodiment of the invention.
Fig. 2 is the sketch map of the circuit base plate of one embodiment of the invention.
The main element symbol description
10: circuit base plate
100: substrate
100a, 100b: surface
102: electric connection pad
104: patterned circuit
110: dielectric layer
120: insulating barrier
130: chemical deposit
140: patterned conductive layer
150: the patterning photoresist layer
152: opening
130a: chemical deposit
C: blind hole
Embodiment
Figure 1A～Fig. 1 F is the flow chart of manufacture method of the circuit base plate of one embodiment of the invention.Fig. 2 is the sketch map of the circuit base plate of one embodiment of the invention.
The manufacture method of circuit base plate comprises the following steps.Please earlier with reference to Figure 1A, it is last at two surperficial 100a, the 100b of a substrate 100 to form a dielectric layer 110.Substrate 100 for example is to pile up the circuit board that forms each other by multi-layered patterned line layer (not shown) and multi-layered patterned dielectric layer (not shown); Or by support plate that other insulating material constituted; The surperficial 100a of substrate 100,100b be last for example to have patterned circuit 104 or electric connection pad 102, and its material can be copper.Dielectric layer 110 can be thermosetting resin, and it can be via the film of coating semi-solid preparation attitude on a surface of substrate 110, and is heated to hardening temperature, so that have the film that the film of semi-solid preparation attitude of the deformation behavior of fluid is solidified as the cure states that can not flow.The material of dielectric layer 110 for example is that initial state is that liquid epoxy resin or glass epoxy resin or other initial states are liquid irreversible macromolecule material.
Then, please refer to Figure 1B and Fig. 1 C, form an insulating barrier 120 on dielectric layer 110, and remove partial insulative layer 120 and dielectric layer 110, to form at least one blind hole C in dielectric layer 110 and insulating barrier 120.Insulating barrier 120 is a thermoplastic resin, and it can form via the mode of coating or spray printing.Therefore, insulating barrier 120 softens into liquid resin when being heated, and is hardened to the resin of cure states during cooling.In addition, form insulating barrier 120 before on the dielectric layer 110, also can carry out a surface coarsening and handle, so that the dielectric layer 110 of cure states and the enhancing of the adhesion between the insulating barrier 120 avoid producing peeling off of interlayer to dielectric layer 110.
The method of at least one blind hole C of above-mentioned formation for example is a laser punching, and can carry out the step of de-smear after the laser punching, with residual glue material in the cleaning blind hole C.In the present embodiment, after laser penetration dielectric layer 110 and the insulating barrier 120, can manifest an electric connection pad 102 that is positioned at blind hole C below.In addition, the material of insulating barrier 120 can be selected Merlon, polyester or polyimide resin for use, or other initial conditions are solid-state, but is heated fusible and can after cooling, still can returns back to the thermal plastic high polymer material of initial condition.In addition, form insulating barrier 120 on dielectric layer 110 after, more can carry out a surface coarsening and handle, in order to the follow-up semi-additive process of carrying out insulating barrier 120.
Then, please refer to Fig. 1 D and Fig. 1 E, form a chemical deposit 130 on the inwall of blind hole C and on the insulating barrier 120 that does not remove, and electroplate a patterned conductive layer 140, to cover chemical deposit 130.It should be noted that; Insulating barrier 120 is a thermoplastic resin, and dielectric layer 110 is a thermosetting resin, if directly form chemical deposit 130 on dielectric layer 110; Being subject to chemical deposit 130, to be attached to the ability of thermosetting resin lower, so the processing procedure ability can't improve.Therefore; The present invention because the joint capacity between insulating barrier 120 and the chemical deposit 130 greater than the joint capacity between dielectric layer 110 and the chemical deposit 130; Form an insulating barrier 120 earlier on dielectric layer 110, form chemical deposit 130 afterwards again on insulating barrier 120, to improve the processing procedure ability.In the present embodiment, the material of chemical deposit 130 can be selected from wherein a kind of metal in the group that copper, nickel, silver, chromium and tin forms, and the present invention does not limit this.
In addition; Before plated pattern conductive layer 140; Can form a patterning photoresist layer 150 earlier on chemical deposit 130; One electric conducting material of re-plating afterwards is on the chemical deposit 130 that is not patterned photoresist layer 150 coverings (just in the opening 152 of patterning photoresist layer 150), to form required patterned conductive layer 140.In the present embodiment, patterned conductive layer 140 can be filled among the blind hole C, and electrically connects with the electric connection pad 102 of blind hole C below.The material of patterned conductive layer for example is a copper.
Then, please refer to Fig. 1 F, after the plated pattern conductive layer 140, more removable patterning photoresist layer 150 and be not patterned the chemical deposit 130 that conductive layer 140 covers has the line layer of a line pattern with formation.The method that removes chemical deposit 130 comprises etching, and chemical deposit 130 becomes the chemical deposit 130a with same line pattern after being etched.Though in the above embodiments; Formation second medium layer 110, two insulating barriers 120 and two chemical deposits 130 are gone up in two surfaces that are illustrated in substrate 100; And carry out two-sided plating; Forming two required patterned conductive layers 140 simultaneously, but but above-mentioned processing procedure single or double carry out, the present invention does not limit this.
As shown in Figure 2, circuit base plate 10 has a substrate 100, second medium layer 110, two insulating barriers 120, two chemical deposit 130a and a patterned conductive layer 140.It is last that this second medium layer 110 is configured in relative two surperficial 100a, the 100b of substrate 100 respectively.This two insulating barrier 120 is configured in second medium layer 110 respectively.On the inwall of two chemical deposit 130a difference cover part two insulating barriers 120 and at least one blind hole C; Wherein blind hole C can be formed in a dielectric layer 110 and the corresponding insulating barrier 120, and the joint capacity between insulating barrier 120 and the chemical deposit 130a is greater than the joint capacity between dielectric layer 110 and the chemical deposit 130a.This two patterned conductive layer 140 be configured in respectively that chemical deposit 130a goes up and blind hole C in, with form one have a line pattern line layer.In addition, for example have an electric connection pad 102 on the surperficial 100a of substrate 100, and patterned conductive layer 140 can electrically connect via blind hole C and electric connection pad 102.Though in the above embodiments, circuit base plate 10 has second medium layer 110, two insulating barriers 120 and two chemical deposit 130a and two patterned conductive layers 140, said structure can be single or double, and the present invention does not limit this.
In sum; In circuit base plate of the present invention and preparation method thereof, form an insulating barrier earlier on dielectric layer, and the joint capacity between insulating barrier and the chemical deposit is greater than the joint capacity between dielectric layer and the chemical deposit; Form chemical deposit afterwards again on insulating barrier, to improve the processing procedure ability.Therefore, the present invention need not be subject to insulating material and be necessary for the ABF film, can after alligatoring, carry out electroless plating or immersion plating equally with the formation chemical deposit, the follow-up steps such as photoetching, plating, striping and etching of implementing false add one-tenth again, so cost is lower.
Though the present invention with embodiment openly as above; Right its is not in order to limit the present invention; Has common knowledge the knowledgeable in the technical field under any; Do not breaking away from the spirit and scope of the present invention, when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking claims person of defining.
Claims (9)
1. the manufacture method of a circuit base plate comprises:
Form a dielectric layer at least one surface of a substrate, this dielectric layer is a thermosetting resin;
Form an insulating barrier on this dielectric layer, this insulating barrier is a thermoplastic resin;
Remove this insulating barrier of part and this dielectric layer, to form at least one blind hole in this dielectric layer and this insulating barrier;
Form a chemical deposit on the inwall of this blind hole and on this insulating barrier that does not remove, wherein the joint capacity between this insulating barrier and this chemical deposit is greater than the joint capacity between this dielectric layer and this chemical deposit; And
Electroplate a patterned conductive layer, to cover this chemical deposit.
2. the manufacture method of circuit base plate according to claim 1, the method that wherein forms this insulating barrier comprises coating or spray printing.
3. the manufacture method of circuit base plate according to claim 1, wherein form this insulating barrier on this dielectric layer after, comprise that also this insulating barrier is carried out a surface coarsening to be handled.
4. the manufacture method of circuit base plate according to claim 1, wherein forming should be at least one during blind hole, also comprises manifesting an electric connection pad that is positioned at below this blind hole, and this electric connection pad is positioned on this surface of this substrate.
5. according to the manufacture method of claim 1,2,3 or 4 described circuit base plates, the method that wherein forms this at least one blind hole comprises laser punching.
6. the manufacture method of circuit base plate according to claim 1 is wherein electroplated before this patterned conductive layer, also comprises forming a patterning photoresist layer on this chemical deposit.
7. according to the manufacture method of claim 1 or 6 described circuit base plates, wherein electroplate after this patterned conductive layer, also comprise this chemical deposit that removes this patterning photoresist layer and do not covered by this patterned conductive layer.
8. circuit base plate comprises:
One substrate;
One dielectric layer is configured at least one surface of this substrate, and this dielectric layer is a thermosetting resin;
One insulating barrier is configured on this dielectric layer, and this insulating barrier is a thermoplastic resin;
One chemical deposit; On the inwall of this insulating barrier of cover part and at least one blind hole; Wherein this blind hole is formed in this dielectric layer and this insulating barrier, and the joint capacity between this insulating barrier and this chemical deposit is greater than the joint capacity between this dielectric layer and this chemical deposit;
One patterned conductive layer, be configured on this chemical deposit and this blind hole in; And
One electric connection pad is configured in this surface of this substrate, and this patterned conductive layer electrically connects via this blind hole and this electric connection pad.
9. circuit base plate according to claim 8, wherein the material of this chemical deposit is selected from wherein a kind of metal in the group that copper, nickel, silver, chromium and tin forms.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010100030009A CN102131347B (en) | 2010-01-15 | 2010-01-15 | Circuit substrate and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010100030009A CN102131347B (en) | 2010-01-15 | 2010-01-15 | Circuit substrate and manufacturing method thereof |
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| Publication Number | Publication Date |
|---|---|
| CN102131347A CN102131347A (en) | 2011-07-20 |
| CN102131347B true CN102131347B (en) | 2012-11-28 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010100030009A Active CN102131347B (en) | 2010-01-15 | 2010-01-15 | Circuit substrate and manufacturing method thereof |
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Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106332444B (en) * | 2015-06-30 | 2021-03-23 | 鹏鼎控股(深圳)股份有限公司 | Circuit board and manufacturing method thereof |
| CN108337814A (en) * | 2018-01-04 | 2018-07-27 | 瑞声科技(新加坡)有限公司 | The production method and wiring board of wiring board |
| CN111954388B (en) * | 2019-05-17 | 2022-03-15 | 欣兴电子股份有限公司 | Circuit board and manufacturing method thereof |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1465212A (en) * | 2000-09-07 | 2003-12-31 | 奥克-三井有限公司 | Manufacturing fire retardant circuit boards without the use of fire retardant resin additives |
| CN101389189A (en) * | 2007-09-10 | 2009-03-18 | 南亚电路板股份有限公司 | Circuit board producing method |
-
2010
- 2010-01-15 CN CN2010100030009A patent/CN102131347B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1465212A (en) * | 2000-09-07 | 2003-12-31 | 奥克-三井有限公司 | Manufacturing fire retardant circuit boards without the use of fire retardant resin additives |
| CN101389189A (en) * | 2007-09-10 | 2009-03-18 | 南亚电路板股份有限公司 | Circuit board producing method |
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| CN102131347A (en) | 2011-07-20 |
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Effective date of registration: 20160122 Address after: 215000 No. 160 Feng Feng street, Suzhou Industrial Park, Suzhou, Jiangsu Patentee after: Unimicron Technology (SuZhou) Corp. Address before: China Taiwan Taoyuan County Patentee before: Xinxing Electronics Co., Ltd. |