CN102122614B - Method for manufacturing silicon oxynitride gate oxide layer - Google Patents
Method for manufacturing silicon oxynitride gate oxide layer Download PDFInfo
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- CN102122614B CN102122614B CN 201010022720 CN201010022720A CN102122614B CN 102122614 B CN102122614 B CN 102122614B CN 201010022720 CN201010022720 CN 201010022720 CN 201010022720 A CN201010022720 A CN 201010022720A CN 102122614 B CN102122614 B CN 102122614B
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Abstract
The invention provides a method for manufacturing a silicon oxynitride gate oxide layer of an MOS (metal oxide semiconductor) device, and the method comprises the following steps: firstly nitridizing on a provided silicon substrate for forming silicon oxynitride, then performing thermal oxidization for forming a first silicon oxide layer between the silicon oxynitride and the silicon substrate and a second silicon oxide layer on the silicon oxynitride, and then depositing polysilicon on the second silicon oxide layer after secondly annealing the silicon substrate; and etching for forming a gate and the silicon oxynitride gate oxide layer. The silicon oxide layer is introduced between the silicon substrate and the silicon oxynitride, thereby reducing dangling bonds between the silicon oxynitride gate oxide layer and the silicon substrate, further reducing the interface state charge density between the silicon oxynitride gate oxide layer and the substrate and improving certain properties of the MOS device, such as improving the stability of threshold voltage of the device, reducing the hot-carrier effect and the flicker noise of the device and the like.
Description
Technical field
The present invention relates to field of semiconductor manufacture, particularly a kind of silicon oxynitride grating oxide layer preparation method.
Background technology
Mos field effect transistor (Metal-Oxide Semiconductor FieldEffect Transistor, MOS) device architecture includes source region, source electrode, drain and gate, wherein, described active area is arranged in the semiconductor silicon substrate, described grid is positioned at the active area top, the active area of described grid both sides carries out respectively forming source electrode and drain electrode behind the Implantation, and the grid below has conducting channel, between described grid and the conducting channel gate oxide is arranged.Dissimilar according to Implantation, the MOS device is divided into again PMOS device and nmos device.In the manufacture process of MOS device, at first at semiconductor silicon Grown gate oxide and grid, other structure of regrowth MOS device.In order to control the short-channel effect of MOS device conducting channel, small geometry MOSFET requires further to improve grid capacitance.This can realize by continuous attenuate gate oxide thickness, but gate oxide thickness has reduced to cause simultaneously the increase of gate oxide leakage current.(be lower than 2.0 nanometers) when the gate oxide thickness of silicon oxide layer material is reduced to a certain degree, the gate oxide leakage current is excessive to cause device creepage excessive and can't work.Therefore, use at present silicon oxynitride (SiO
xN
y) substitute silicon oxide layer as gate oxide, be called the silicon oxynitride gate oxide.The main advantage of silicon oxynitride has: at first, the doping of nitrogen has improved the dielectric constant (k value) of gate oxide, has delayed the dependence of small size device to the gate oxide attenuate.Secondly, significantly reduce the quantity of boron from the gate diffusions to the gate oxide of mixing in the PMOS device, help to control the drift of threshold voltage; At last, the nmos device hot carrier's effect is further improved.
Traditional silicon oxynitride gate oxide manufacturing process is first silicon substrate to be carried out thermal oxidation to form silicon oxide layer-silicon substrate structure, again silicon oxide layer-silicon substrate structure is carried out nitrogenize.Nitrogenize is usually adopted in annealing and is passed into nitrous oxide (N
2O), ammonia (NH
3) or the nitrogenous reacting gas such as nitric oxide (NO), make reacting gas at high temperature penetrate silicon oxide layer, and silicon substrate react, generate silicon oxynitride.Obtain at last the silicon oxynitride gate oxide of silicon oxide layer-silicon oxynitride-silicon substrate structure.The important index that the content of nitrogen-atoms is in the silicon oxynitride gate oxide, the control by the nitriding process parameter can reach target content.
Cross-sectional view in conjunction with Fig. 1～4 prior art silicon oxynitride gate oxide manufacture processes illustrates prior art silicon oxynitride gate oxide manufacturing step.
Be noted that cross-sectional view only represents device architecture, does not represent the actual ratio of device each several part.
Step 1 referring to Fig. 1, provides silicon substrate 101, thermal oxide growth silicon oxide layer 102 on silicon substrate 101;
In this step, the thickness range of growing silicon oxide layer is that 10 dusts are to 100 dusts.
Step 2, nitrided silicon oxide layer-silicon substrate forms silicon oxynitride 103 at silicon substrate, referring to Fig. 2;
In this step, the method for nitrogenize is to pass into nitric oxide gas in annealing, when passing into nitric oxide gas, can also be with nitrogen as assist gas, and wherein, the shared proportion of nitric oxide is 2% to 100%;
In this step, annealing region is 800 degrees centigrade to 950 degrees centigrade;
In this step, the annealing time scope is 60 seconds to 3600 seconds;
In this step, described nitric oxide production range of flow is that 0.2 standard rises and whenever to assign to 5 standards and rise per minute;
In this step, nitric oxide can penetrate silicon oxide layer 102, reacts with the silicon substrate 101 of its below, forms silicon oxynitride 103 between silicon substrate and silicon oxide layer;
In this step, the content range of nitrogen-atoms is 0.1% to 3% in silicon oxide layer 102 and the silicon oxynitride 103.
Step 3, referring to Fig. 3, deposit spathic silicon 104 on the silicon oxide layer;
Step 4, referring to Fig. 4, after the photoetching, etch polysilicon, silicon oxide layer and silicon oxynitride form grid 106 and silicon oxynitride gate oxide 105 successively.
Transition interface between silicon substrate and the silicon oxynitride forms silicon nitrogen dangling bonds, silicon nitrogen dangling bonds are unsaturated bonds, when grid applies voltage, can absorb electronics (when applying positive voltage) or discharge electronics (when applying negative voltage), participate in grid capacitance and discharge and recharge.The conducting channel electric current of electronics below discharging and recharging of silicon-gate oxide interface makes grid is unstable, flicker noise occurs; Because scattering process, electronics enter gate oxide through collision when discharging and recharging, produce hot carrier's effect.Along with grid capacitance discharges and recharges the increase of number of times, finally cause the threshold voltage of device unstable, affect device reliability.
Summary of the invention
In view of this, the technical problem of the present invention's solution is:
Transition interface between silicon substrate and the silicon oxynitride forms silicon nitrogen dangling bonds makes grid capacitance participate in the charge density increase that discharges and recharges, and causes the MOS device threshold voltage unstable, and hot carrier's effect strengthens, and reliability reduces.
For addressing the above problem, technical scheme of the present invention specifically is achieved in that
A kind of silicon oxynitride grating oxide layer preparation method, the method comprises:
The silicon substrate that nitrogenize provides forms silicon oxynitride in described surface of silicon;
The described silicon oxynitride of thermal oxidation forms the first silicon oxide layer between silicon oxynitride and silicon substrate, form the second silicon oxide layer at silicon oxynitride;
The described silicon substrate of the second annealing;
Deposit spathic silicon on described the second silicon oxide layer;
The described polysilicon of etching, the second silicon oxide layer, silicon oxynitride and the first silicon oxide layer form polysilicon control grid and silicon oxynitride gate oxide successively.
The method of described nitrogenize is that the first annealing passes into nitrogenous and oxygen containing reacting gas simultaneously.
Described nitrogenous and oxygen containing reacting gas is nitric oxide gas.
As assist gas, the shared proportion of described nitric oxide is 2% to 100% to described nitric oxide with nitrogen.
Described the first annealing region is 700 degrees centigrade to 950 degrees centigrade.
Described the first annealing time scope is 60 seconds to 3600 seconds.
Described silicon oxynitride gate oxide thickness scope is that 10 dusts are to 100 dusts.
The content range of nitrogen-atoms is 0.1% to 3% in the described silicon oxynitride gate oxide.
As seen from the above technical solutions, the present invention proposes a kind of manufacture method of gate oxide, the silicon oxynitride gate oxide of silicon oxide layer-silicon oxynitride that the method forms-silicon oxide layer structure, between silicon substrate and silicon oxynitride, add one deck silicon oxide layer, can make silicon substrate and silicon oxide layer interface formation silicon oxygen bond, compare silazine link, dangling bonds reduce at the interface, thereby participate in the charge density attenuating that grid capacitance discharges and recharges, improved the MOS device reliability.
Description of drawings
Fig. 1～Fig. 4 is the cross-sectional view that prior art silicon oxynitride gate oxide is made;
Fig. 5～Fig. 8 is the cross-sectional view that silicon oxynitride oxide layer of the present invention is made.
Embodiment
For make purpose of the present invention, technical scheme, and advantage clearer, referring to the accompanying drawing embodiment that develops simultaneously, the present invention is described in more detail.
Cross-sectional view in conjunction with Fig. 5～Fig. 8 silicon oxynitride gate oxide of the present invention is made illustrates silicon oxynitride gate oxide manufacturing step of the present invention.
Step 1, referring to Fig. 5, the silicon substrate 101 that provides, the described silicon substrate 101 of simultaneously nitrogenize forms silicon oxynitride 202 at silicon substrate;
In this step, the method that the silicon nitride substrate forms silicon oxynitride is to pass into nitrous oxide (N in to silicon substrate the first annealing
2O), or the nitrogenous and oxygen containing reacting gas such as nitric oxide (NO), present embodiment adopts nitric oxide gas.When passing into nitric oxide gas, can also be with nitrogen as assist gas, the shared proportion of nitric oxide is 2% to 100%, for example 2%, 50% or 100%;
In this step, described the first annealing region is 700 degrees centigrade to 950 degrees centigrade, for example 700 degrees centigrade, 900 degrees centigrade or 950 degrees centigrade;
In this step, described the first annealing time scope is 60 seconds to 3600 seconds, for example 60 seconds, 1800 seconds or 3600 seconds;
In this step, described nitric oxide production range of flow is that 0.2 standard rises and whenever to assign to 5 standards and rise per minute, and for example 0.2 standard rises per minute, 2 standards rise per minute or 5 standards rise per minute.
In this step, the nitric oxide that passes into directly reacts with silicon substrate, forms silicon oxynitrides 202 at silicon substrate 101, and wherein, the content of nitrogen-atoms is because can the reduction nitrogen atom content in the subsequent thermal oxidation step greater than target content in the silicon oxynitride.
The first annealing that provides except present embodiment passes into the nitriding method of nitrogenous and oxygen containing reacting gas simultaneously, also has the method for chemical vapour deposition (CVD) and physical vapour deposition (PVD) to form silicon oxynitride in surface of silicon.
Step 2, referring to Fig. 6, thermal oxidation silicon oxynitride 202 forms the first silicon oxide layer 203 between silicon oxynitride 202 and silicon substrate 101, form the second silicon oxide layer 204 at silicon oxynitride;
In this step, thermal oxidation process can be that the dry method thermal oxidation also can be means of wet thermal oxidation, present embodiment adopts the dry method thermal oxidation, particularly, silicon substrate places reaction chamber, the heating reaction chamber also passes into oxygen, under the high temperature, part of oxygen can penetrate the meeting silicon oxynitride, and with the silicon substrate reaction of its below, reaction generates the first silicon oxide layer 203 between silicon oxynitride and silicon substrate, some oxygen and silicon oxynitride reaction, part nitrogen-atoms in the replace oxygen SiClx makes the silicon oxynitride thickness reduction, forms the second silicon oxide layer 204 at the silicon nitride upper surface;
In this step, the temperature range of thermal oxidation is 650 degrees centigrade to 900 degrees centigrade, for example 650 degrees centigrade, 850 degrees centigrade or 900 degrees centigrade;
In this step, the total thickness of the first silicon oxide layer 203, silicon oxynitride 202 and the second silicon oxide layer 204 be 10 dusts to 100 dusts, for example 10 dusts, 50 dusts or 100 dusts.
In this step, the content range of nitrogen-atoms is 0.1% to 3% in the first silicon oxide layer 203, silicon oxynitride 202 and the second silicon oxide layer 204, for example 0.1%, 2.5% or 3% can control by the thermal oxidation technology parameter, such as time, temperature, pressure etc., make the content of nitrogen-atoms reach target content.
Step 3, the described silicon substrate 101 of the second annealing;
In this step, the temperature of the second annealing is 900 degrees centigrade, and the time is 8 minutes, can pass into simultaneously nitrogen or helium as protective gas;
In this step, the second annealing makes the silicon oxygen bond reconstruct at the interface of silicon substrate 101 and the first silicon oxide layer 203, the dangling bonds decreased number in the silicon oxygen bond, and interface state density reduces, and forms fine and close the second silicon oxide layer, silicon oxynitride and the first silicon oxide layer structure.
Step 4, referring to Fig. 7, deposit spathic silicon 205 on the second silicon oxide layer 204;
Step 5, referring to Fig. 8, etch polysilicon 205, the second silicon oxide layer 204, silicon oxynitride 202 and the first silicon oxide layer 203 form grid 207 and silicon oxynitride gate oxide 206 successively.
The present invention proposes a kind of manufacture method of silicon oxynitride gate oxide, the silicon oxynitride gate oxide that the method forms is silicon oxide layer-silicon oxynitride-silicon oxide layer structure, between silicon substrate and silicon oxynitride, add one deck silicon oxide layer, make silicon substrate and silicon oxide layer interface formation silicon oxygen bond, compare silazine link, dangling bonds reduce at the interface, thereby participate in the charge density attenuating that grid capacitance discharges and recharges, and have improved the MOS device reliability.
The above is preferred embodiment of the present invention only, is not for limiting protection scope of the present invention.Within the spirit and principles in the present invention all, any modification of doing, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (5)
1. silicon oxynitride grating oxide layer preparation method, the method comprises:
The silicon substrate that nitrogenize provides, form silicon oxynitride in described surface of silicon, the method of described nitrogenize is that the first annealing passes into nitrogenous and oxygen containing reacting gas simultaneously, described nitrogenous and oxygen containing reacting gas is nitric oxide gas, as assist gas, the shared proportion of described nitric oxide is 2% to 100% to described nitric oxide with nitrogen;
The described silicon oxynitride of thermal oxidation forms the first silicon oxide layer between silicon oxynitride and silicon substrate, form the second silicon oxide layer at silicon oxynitride;
The described silicon substrate of the second annealing;
Deposit spathic silicon on described the second silicon oxide layer;
The described polysilicon of etching, the second silicon oxide layer, silicon oxynitride and the first silicon oxide layer form polysilicon control grid and silicon oxynitride gate oxide successively.
2. the method for claim 1 is characterized in that, described the first annealing region is 700 degrees centigrade to 950 degrees centigrade.
3. the method for claim 1 is characterized in that, described the first annealing time scope is 60 seconds to 3600 seconds.
4. the method for claim 1 is characterized in that, described silicon oxynitride gate oxide thickness scope is that 10 dusts are to 100 dusts.
5. the method for claim 1 is characterized in that, the content range of nitrogen-atoms is 0.1% to 3% in the described silicon oxynitride gate oxide.
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| CN108695375A (en) * | 2017-04-10 | 2018-10-23 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor structure and forming method thereof |
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| CN102427042B (en) * | 2011-08-04 | 2015-05-20 | 上海华力微电子有限公司 | Method of improving carrier mobility of NMO (N-Mental-Oxide-Semiconductor) device |
| CN102427043B (en) * | 2011-08-04 | 2015-06-17 | 上海华力微电子有限公司 | Method for improving carrier mobility of PMOS (P-channel Metal Oxide Semiconductor) device |
| CN102779735A (en) * | 2012-08-16 | 2012-11-14 | 上海华力微电子有限公司 | Preparation method of multi-layer metal-silicon oxide-metal capacitor |
| CN103165432B (en) * | 2013-03-15 | 2016-08-03 | 上海华力微电子有限公司 | A kind of preparation method of gate oxide |
| CN104183470B (en) * | 2013-05-21 | 2017-09-01 | 中芯国际集成电路制造(上海)有限公司 | A kind of manufacture method of semiconductor devices |
| CN103489771A (en) * | 2013-09-22 | 2014-01-01 | 上海华力微电子有限公司 | Silicon oxynitride insulation structure and manufacturing method thereof |
| TWI679703B (en) * | 2016-04-25 | 2019-12-11 | 聯華電子股份有限公司 | Method of manufacturing gate dielectric layer |
| CN110459462B (en) * | 2019-08-08 | 2022-02-15 | 武汉新芯集成电路制造有限公司 | Method for forming semiconductor device |
| CN112490119A (en) * | 2020-12-21 | 2021-03-12 | 上海华力微电子有限公司 | Method for improving reliability of tunneling oxide layer |
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| CN1705088A (en) * | 2004-06-01 | 2005-12-07 | 旺宏电子股份有限公司 | Tunnel oxynitride in flash memories |
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| CN108695375A (en) * | 2017-04-10 | 2018-10-23 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor structure and forming method thereof |
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