CN102111130B - Duty cycle correction circuit - Google Patents
Duty cycle correction circuit Download PDFInfo
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- CN102111130B CN102111130B CN200910244047.1A CN200910244047A CN102111130B CN 102111130 B CN102111130 B CN 102111130B CN 200910244047 A CN200910244047 A CN 200910244047A CN 102111130 B CN102111130 B CN 102111130B
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Abstract
The invention provides a duty cycle correction circuit which can correct the duty cycle of input square wave to be 50%. The duty cycle correction circuit comprises a first charge pump, a second charge pump, a third charge pump, a mean circuit and a comparison circuit. When one of the first charge pump and the second charge pump is charged to obtain a voltage value at high level of a square wave cycle; when the other one of the first charge pump and the second charge pump is charged to obtain the other voltage valve at low level of the square wave cycle; the two voltage values are averaged to obtain a mean voltage; and then the third charge pump is charged to the mean voltage, wherein the required time is just a half of the cycle, thus a square signal with a duty cycle being 50% is obtained.
Description
[technical field]
The present invention relates to circuit design field, particularly relate to a kind of duty ratio correction circuit.
[background technology]
Many digital circuit receive clock signals are to operate.With in the memory circuit of high-frequency work, in order to allow the acting in agreement of each several part work, the clock signal being approximately the duty ratio of 50% is used to be very important.In addition, also have the clock signal needing the duty ratio of use 50% in a lot of application, just do not list one by one herein.
Usual clock signal is provided by oscillator, such as crystal oscillator and clock circuit, but the clock signal that oscillator and clock circuit provide generally does not have the duty ratio of 50%, such as clock signal may have the duty ratio of 40%, wherein the high level stage is 40% of a clock cycle, and the low level stage be the clock cycle all the other 60%.In order to obtain the clock signal that duty ratio is 50%, a lot of duty ratio correction circuit is there is in prior art, for the clock signal of non-50% duty ratio being corrected to the clock signal of 50% duty ratio, it also can realize with analog circuit by digital circuit, can open loop realize also can closed loop realizing.
But, existing duty ratio correction circuit general structure all more complicated.Therefore, be necessary to propose the simple duty ratio correction circuit of a kind of new structure.
[summary of the invention]
The object of this part is some aspects of general introduction embodiments of the invention and briefly introduces some preferred embodiments.May do in the specification digest and denomination of invention of this part and the application a little simplify or omit with avoid making this part, specification digest and denomination of invention object fuzzy, and this simplification or omit and can not be used for limiting the scope of the invention.
The object of the present invention is to provide a kind of duty ratio correction circuit, input square wave can be corrected to the output square wave that duty ratio is 50% by it.
The invention provides a kind of duty ratio correction circuit, for by input square wave duty ratio correction be 50 percent, it is characterized in that, it comprises: the first charge pump, by described first charge pump discharge reduction before input square wave is high level, be, between high period, the first voltage is obtained to described first charge pump charging at input square wave; Second charge pump, by described second charge pump discharge reduction before input square wave is low level, is obtain the second voltage to the second charge pump charging between low period at input square wave; Tricharged pump, in the hopping edge of input square wave by described tricharged pump discharge reduction, obtains tertiary voltage to the charging of tricharged pump subsequently, until the input next hopping edge of square wave after a square-wave cycle; Average circuit, for obtaining the equal threshold voltage of the first voltage and the second voltage; Export the comparison circuit of square wave, when described equal threshold voltage is equal with described tertiary voltage, overturn described output square wave.
Further, it also comprises the first holding circuit, described first holding circuit is used for terminating the first voltage described in post-sampling in the first charge pump charging, and the first voltage of sampling is kept a clock cycle, the first voltage of sampling is exported to described average circuit simultaneously.
Further, it also comprises the second holding circuit, described second holding circuit is used for terminating the second voltage described in post-sampling in the second charge pump charging, and the second voltage of sampling is kept a square-wave cycle, the second voltage of sampling is exported to described average circuit simultaneously.
Further, describedly to be included in before to input square wave be high level when inputting the trailing edge of square wave, when to input square wave be low level or when inputting the rising edge of square wave, described when being included in the rising edge of input square wave before to input square wave be low level, when to input square wave be high level or when inputting the trailing edge of square wave.
Further, described average circuit is resistor voltage divider circuit.
Further, when described equal threshold voltage is greater than described tertiary voltage, described comparison circuit exports high level or low level; When described equal threshold voltage is less than described tertiary voltage, described comparison circuit output low level or high level.
Further, the selection of the circuit parameter (comprising charging current and capacitance) in described first charge pump, described second charge pump and described tricharged pump needs to meet following condition: the first magnitude of voltage that the third voltage value obtained after carrying out the charging of a square-wave cycle to tricharged pump obtains after equaling to carry out the charging in the high level stage of a square-wave cycle to the first charge pump and the second magnitude of voltage sum obtained after carrying out the charging in the low level stage of a square-wave cycle to the second charge pump.
Further, the first charge pump, the second charge pump are identical with capacitance with the charging current of tertiary voltage pump.
Further, first charge pump comprises the first charge switch, the first discharge switch and the first electric capacity, wherein before input square wave is high level, described first charge switch disconnects, and described first discharge switch conducting, carries out discharge reduction to described first electric capacity, when input square wave is high level, described first charge switch conducting, described first discharge switch disconnects, and obtains the first voltage to the first capacitor charging.
Further, second charge pump comprises the second charge switch, the second discharge switch and the second electric capacity, wherein before input square wave is low level, described second charge switch disconnects, and described second discharge switch conducting, carries out discharge reduction to described second electric capacity, when input square wave is low level, described second charge switch conducting, described second discharge switch disconnects, and obtains the second voltage to the second capacitor charging.
Further, tricharged pump comprises the 3rd charge switch, the 3rd discharge switch and the 3rd electric capacity, wherein input square wave be rising edge or trailing edge, described 3rd charge switch disconnects, and described 3rd discharge switch conducting, carries out discharge reduction to described 3rd electric capacity, be next rising edge after a square-wave cycle or trailing edge at input square wave, described 3rd charge switch conducting, described 3rd discharge switch disconnects, and obtains tertiary voltage to the 3rd capacitor charging.
Compared with prior art, in duty ratio correction circuit of the present invention, when the high level of square-wave cycle, charging is carried out in two charge pumps and obtain a magnitude of voltage, when the low level of square-wave cycle, charging is carried out to another in two charge pumps and obtain another magnitude of voltage, afterwards two magnitudes of voltage are on average obtained equal threshold voltage, then by another one charge pump is charged to this equal threshold voltage, the then required time is exactly just in time half period, thus obtains the square-wave signal of 50% duty ratio.
[accompanying drawing explanation]
In conjunction with reference accompanying drawing and ensuing detailed description, the present invention will be easier to understand, the structure member that wherein same Reference numeral is corresponding same, wherein:
Fig. 1 is the circuit diagram of an embodiment of duty ratio correction circuit in the present invention;
Fig. 2 is the circuit diagram of another embodiment of duty ratio correction circuit in the present invention; With
Fig. 3 is the time m-voltage curve of the first charge pump, the second charge pump and tricharged pump output voltage in an embodiment of duty ratio correction circuit in the present invention.
[embodiment]
Detailed description of the present invention carrys out the running of direct or indirect simulation technical solution of the present invention mainly through program, step, logical block, process or other symbolistic descriptions.For thorough understanding the present invention, in ensuing description, set forth a lot of specific detail.And when not having these specific detail, the present invention then may still can realize.Affiliated those of skill in the art use the work that these describe and statement effectively introduces them to the others skilled in the art in affiliated field herein essential.In other words, be object of the present invention of avoiding confusion, because method, program, composition and the circuit known is readily appreciated that, therefore they are not described in detail.
Alleged herein " embodiment " or " embodiment " refers to special characteristic, structure or the characteristic that can be contained at least one implementation of the present invention.Different local in this manual " in one embodiment " occurred not all refers to same embodiment, neither be independent or optionally mutually exclusive with other embodiments embodiment.In addition, represent sequence of modules in the method for one or more embodiment, flow chart or functional block diagram and revocablely refer to any particular order, not also being construed as limiting the invention.
Fig. 1 is the circuit diagram of an embodiment of duty ratio correction circuit 100 in the present invention.Please refer to shown in Fig. 1, described duty ratio correction circuit 100 is for being 50 percent by the duty ratio correction of input square wave, and it comprises the first charge pump 110, second charge pump 120, tricharged pump 130, average circuit 140, comparison circuit (CMP) 150 and the first holding circuit 160.
By described first charge pump 110 discharge reduction before input square wave is high level, be, between high period, the first voltage V1 is obtained to described first charge pump charging at input square wave.In one embodiment, described first charge pump 110 comprises the first charge switch S2, the first discharge switch S1 and the first electric capacity C1, one end ground connection of described first discharge switch S1, the charging end of another termination first electric capacity C1, one end of described first charge switch S2 is connected with power supply via charging circuit, the charging end of another termination first electric capacity C1, another node ground connection of the first electric capacity C1.The charging end of described first electric capacity C1 is used as the output of the first charge pump 110.Represent described charging circuit with the form of current source in Fig. 1, in fact described charging circuit is just to provide a current path, can show as various forms, and the simplest a kind of mode arranges a resistance exactly as charging circuit.
Introduce the carrying out practically process of described first charge pump 110 below: when inputting the rising edge of square wave, described first charge switch S2 disconnects, described first discharge switch S1 conducting, described first electric capacity C1 is carried out repid discharge to ground, also discharge reduction can be referred to as, this process can be very fast, therefore negligible in time; When input square wave is high level, described first charge switch S2 conducting, described first discharge switch S1 disconnects, and obtains the first voltage V1 to the first electric capacity C1 charging; When input square wave is low level, described first charge switch S2 disconnects, and described first discharge switch S1 disconnects, and keep the first constant voltage V1, now the value of the first voltage V1 can be designated as V10.Please refer to shown in Fig. 3, it illustrates the first charge pump 110 in an embodiment of duty ratio correction circuit in the present invention, second charge pump 120 and tricharged pump 130 output voltage time m-voltage curve, wherein between 0 to t1, V1 increases, between t1 to T, V1 is remained on V10 constant, when next cycle (T-2T), V1 also will repeat above-mentioned waveform (not shown), wherein 0-t1 is the high level stage of input square wave, t1 to T is the low level stage of input square wave, therefore then I1*t1=C1*V10 is had, I1 represents the charging current of the charging circuit of the first charge pump, C1 represents the capacitance of the first electric capacity.
Described first holding circuit 160 is charged at the first charge pump 110 and is terminated the first voltage V1 described in post-sampling, and the first voltage V1 of sampling is kept a clock cycle, first voltage V1 of sampling is exported to described average circuit 140, the value of the first voltage V1 now sampled is V10 simultaneously.Described when can be input square wave after the first charge pump 110 charging terminates being low level, also can be when inputting the trailing edge of square wave.In any case, as long as constant in after V10 and when not discharging to the first voltage V1, the described first voltage V1 that just can sample obtains V10 at the first voltage V1.
In other embodiments, can also be carried out some to the running of the first charge pump 110 to change, such as can after described first holding circuit 160 be sampled to the first charge pump 110, such as when input square wave is low level or when inputting the trailing edge of square wave, just discharge reduction is carried out to described first charge pump 110, and by the time need not input the rising edge of square wave.
By described second charge pump 120 discharge reduction before input square wave is low level, be, between low period, the second voltage V2 is obtained to the second charge pump 120 charging at input square wave.In one embodiment, described second charge pump 120 comprises the second charge switch S4, the second discharge switch S3 and the second electric capacity C2, one end ground connection of described second discharge switch S3, the charging end of another termination second electric capacity C2, one end of described second charge switch S4 is connected with power supply via charging circuit, the charging end of another termination second electric capacity C2, another node ground connection of the second electric capacity C2.The charging end of described second electric capacity C2 is used as the output of the second charge pump 120.Equally, represent described charging circuit in Fig. 1 with the form of current source, it can show as various forms, and the simplest a kind of mode arranges a resistance exactly as charging circuit.
Introduce the running of described second charge pump 120 below: when inputting the trailing edge of square wave, described second charge switch S4 disconnects, described second discharge switch S3 conducting, described second electric capacity C2 is carried out repid discharge to ground, also discharge reduction can be referred to as, this process can be very fast, therefore negligible in time; When input square wave is low level, described second charge switch S4 conducting, described second discharge switch S3 disconnects, and obtains the second voltage V2 to the second electric capacity C2 charging; When input square wave is high level, described second charge switch S4 disconnects, and described second discharge switch S3 disconnects, and keep the second constant voltage V2, now the value of the second voltage V2 can be designated as V20.Please refer to shown in Fig. 3, between time t1 to T, V2 increases, between time T to T+t1, V2 is remained on V20 constant, when next cycle (T+t1 to 2T+t1), V2 also will repeat above-mentioned waveform (not shown), therefore then have I2* (T-t1)=C2*V20, I2 to represent the charging current of the charging circuit of the second charge pump, C2 represents the capacitance of the second electric capacity.
Described average circuit 140 is for being averaged to obtain equal threshold voltage V to the first voltage and the second voltage
aVE.In one embodiment, described average circuit 140 is for being connected on the valued resistor such as between the output of the first holding circuit 160 and the output of the second charge pump 120 two, and the voltage on the intermediate node between these two resistance is equal threshold voltage V
aVE.Certainly, also have a lot of scheme can obtain the equal threshold voltage of the first voltage and the second voltage, just do not describe one by one herein.It should be noted that the first voltage for being averaged is the first voltage that the first holding circuit 160 samples, namely constant is first voltage of V10, and the second voltage is then the second voltage that the second charge pump 120 directly exports.In fact, main still concern of described average circuit 140 has kept the second constant voltage V20.Please refer to shown in Fig. 3, V between time T to T+t1
aVEkeep constant, V wherein and between not shown t1 to T
aVEwaveform, when next cycle (T+t1 to 2T+t1), V
aVEalso will repeat above-mentioned waveform (not shown).
Input the trailing edge of square wave by described tricharged pump 130 discharge reduction, subsequently tertiary voltage is being obtained to tricharged pump 130 charging, until the next trailing edge of input square wave after a square-wave cycle.In one embodiment, described tricharged pump 130 comprises the 3rd charge switch S6, the 3rd discharge switch S5 and the 3rd electric capacity C3, one end ground connection of described 3rd discharge switch S5, the charging end of another termination the 3rd electric capacity C3, one end of described 3rd charge switch S6 is connected with power supply via charging circuit, the charging end of another termination the 3rd electric capacity C3, another node ground connection of the 3rd electric capacity C3.The charging end of described 3rd electric capacity C3 is used as the output of tricharged pump 130.Equally, described charging circuit is represented with the form of current source in Fig. 1.
Introduce the running of described tricharged pump 130 below: input square wave be trailing edge, described 3rd charge switch S6 disconnects, described 3rd discharge switch S5 conducting, discharge reduction is carried out to described 3rd electric capacity C3, at next trailing edge that input square wave is after a square-wave cycle, described 3rd charge switch conducting S6, described 3rd discharge switch S5 disconnects, and obtains tertiary voltage V3 to the 3rd electric capacity C3 charging.Please refer to shown in Fig. 3, constantly increase from 0 from V3 between time t1-T+t1, when next cycle (T+t1-2T+t1), V3 also will repeat above-mentioned waveform (not shown), therefore then have I3*T=(V10+V20) * C3, such V3 is from 0 to equal threshold voltage V
aVEthe required time is just in time T/2, i.e. t2-t1=T/2.
In general, the circuit parameter (comprising charging current I and capacitance C) in described first charge pump 110, described second charge pump 120 and described tricharged pump 130 if selection meet following condition and just can be used in the present invention: the first magnitude of voltage that the third voltage value obtained after carrying out the charging of a square-wave cycle to tricharged pump 130 obtains after equaling to carry out the charging in the high level stage of a square-wave cycle to the first charge pump 110 with the charging in the low level stage of a square-wave cycle is carried out to the second charge pump 120 after the second magnitude of voltage sum of obtaining.In a preferred embodiment, described first charge pump 110, described second charge pump 120 are identical with capacitance with the charging current of described tertiary voltage pump 140, i.e. I1=I2=I3, C1=C2=C3.
Described comparison circuit 150 for exporting square-wave signal, and overturns described output square wave when described equal threshold voltage is equal with described tertiary voltage V3.In one embodiment, when described equal threshold voltage is greater than described tertiary voltage, described comparison circuit 150 exports high level, when described equal threshold voltage is less than described tertiary voltage, and described comparison circuit 150 output low level.In another embodiment, when described equal threshold voltage is greater than described tertiary voltage, described comparison circuit 150 also can output low level, and when described equal threshold voltage is less than described tertiary voltage, described comparison circuit 150 also can export high level.Described like this comparison circuit 150 just can obtain the square-wave signal that duty ratio is 50%.
In sum, in duty ratio correction circuit of the present invention, when the high level of square-wave cycle, charging is carried out to the first charge pump 110 and obtain the first magnitude of voltage, when the low level of square-wave cycle, charging is carried out to the second charge pump 120 and obtain the second magnitude of voltage, afterwards two magnitudes of voltage are on average obtained equal threshold voltage, then by tricharged pump 130 is charged to this equal threshold voltage, then the required time is exactly just in time half period, thus obtains the square-wave signal of 50% duty ratio.
Fig. 2 is the circuit diagram of another embodiment of duty ratio correction circuit 200 in the present invention.As shown in Figure 2, described duty ratio correction circuit 200 is for being 50 percent by the duty ratio correction of input square wave, and it comprises the first charge pump 210, second charge pump 220, tricharged pump 230, average circuit 240, comparison circuit 250, first holding circuit 260 and the second holding circuit 270.Comparison diagram 1 and Fig. 2 can find out, described duty ratio correction circuit 200 is also to comprise second holding circuit 270 with the difference of described duty ratio correction circuit 100, described second holding circuit 270 terminates the second voltage that post-sampling second charge pump 220 exports for charging at the second charge pump 220, and the second voltage of sampling is kept a square-wave cycle, the second voltage of sampling is exported to described average circuit 240 simultaneously.
Because the first holding circuit 260 the first magnitude of voltage obtained of sampling can keep a square-wave cycle, and when this end cycle, the first holding circuit 260 can be sampled again and obtained new first magnitude of voltage and keep.Equally, because the second holding circuit 270 the second magnitude of voltage obtained of sampling can keep a square-wave cycle, and when this end cycle, the second holding circuit 270 can be sampled again and obtained new second magnitude of voltage and keep.Therefore, for tricharged pump 230, both can at the trailing edge of input square wave by described tricharged pump 230 discharge reduction, subsequently tertiary voltage is obtained to tricharged pump 230 charging, until the next trailing edge of input square wave after a square-wave cycle, also at the rising edge of input square wave by described tricharged pump discharge reduction, tertiary voltage can be obtained to tricharged pump 230 charging subsequently, until the next rising edge of input square wave after a square-wave cycle.
Duty ratio correction circuit of the present invention by duty ratio be not 50% square wave be corrected as the square-wave signal that duty ratio is 50%, thus achieve the correction of duty ratio.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, within the spirit and principles in the present invention all, any amendment done, equivalent replacement etc., all should be included within protection scope of the present invention.
Claims (10)
1. a duty ratio correction circuit, for being 50 percent by the duty ratio correction of input square wave, it is characterized in that, it comprises:
First charge pump, by described first charge pump discharge reduction before input square wave is high level, is obtain the first voltage to described first charge pump charging between high period at input square wave;
Second charge pump, by described second charge pump discharge reduction before input square wave is low level, is obtain the second voltage to the second charge pump charging between low period at input square wave;
Tricharged pump, in the hopping edge of input square wave by described tricharged pump discharge reduction, obtains tertiary voltage to the charging of tricharged pump subsequently, until the input next hopping edge of square wave after a square-wave cycle;
Average circuit, for obtaining the equal threshold voltage of the first voltage and the second voltage; With
Export the comparison circuit of square wave, when described equal threshold voltage is equal with described tertiary voltage, overturn described output square wave,
The selection comprising the circuit parameter of charging current and capacitance in described first charge pump, described second charge pump and described tricharged pump needs to meet following condition: the first magnitude of voltage that the third voltage value obtained after carrying out the charging of a square-wave cycle to tricharged pump obtains after equaling to carry out the charging in the high level stage of a square-wave cycle to the first charge pump and the second magnitude of voltage sum obtained after carrying out the charging in the low level stage of a square-wave cycle to the second charge pump.
2. duty ratio correction circuit according to claim 1, it is characterized in that, it also comprises the first holding circuit, described first holding circuit is used for terminating the first voltage described in post-sampling in the first charge pump charging, and the first voltage of sampling is kept a clock cycle, the first voltage of sampling is exported to described average circuit simultaneously.
3. duty ratio correction circuit according to claim 2, it is characterized in that, it also comprises the second holding circuit, described second holding circuit is used for terminating the second voltage described in post-sampling in the second charge pump charging, and the second voltage of sampling is kept a square-wave cycle, the second voltage of sampling is exported to described average circuit simultaneously.
4. duty ratio correction circuit according to claim 1, it is characterized in that, described when being included in the trailing edge of input square wave before to input square wave be high level, when to input square wave be low level or when inputting the rising edge of square wave, described when being included in the rising edge of input square wave before to input square wave be low level, when to input square wave be high level or when inputting the trailing edge of square wave.
5. duty ratio correction circuit according to claim 1, is characterized in that, described average circuit is resistor voltage divider circuit.
6. duty ratio correction circuit according to claim 1, is characterized in that, when described equal threshold voltage is greater than described tertiary voltage, described comparison circuit exports high level or low level; When described equal threshold voltage is less than described tertiary voltage, described comparison circuit output low level or high level.
7. duty ratio correction circuit according to claim 1, is characterized in that, the first charge pump, the second charge pump are identical with capacitance with the charging current of tertiary voltage pump.
8. the duty ratio correction circuit according to any one of claim 1-7, it is characterized in that, first charge pump comprises the first charge switch, the first discharge switch and the first electric capacity, and wherein before input square wave is high level, described first charge switch disconnects, described first discharge switch conducting, discharge reduction is carried out to described first electric capacity, when input square wave is high level, described first charge switch conducting, described first discharge switch disconnects, and obtains the first voltage to the first capacitor charging.
9. duty ratio correction circuit according to claim 8, it is characterized in that, second charge pump comprises the second charge switch, the second discharge switch and the second electric capacity, and wherein before input square wave is low level, described second charge switch disconnects, described second discharge switch conducting, discharge reduction is carried out to described second electric capacity, when input square wave is low level, described second charge switch conducting, described second discharge switch disconnects, and obtains the second voltage to the second capacitor charging.
10. duty ratio correction circuit according to claim 9, it is characterized in that, tricharged pump comprises the 3rd charge switch, the 3rd discharge switch and the 3rd electric capacity, wherein input square wave be rising edge or trailing edge, described 3rd charge switch disconnects, described 3rd discharge switch conducting, discharge reduction is carried out to described 3rd electric capacity, be next rising edge after a square-wave cycle or trailing edge at input square wave, described 3rd charge switch conducting, described 3rd discharge switch disconnects, and obtains tertiary voltage to the 3rd capacitor charging.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200910244047.1A CN102111130B (en) | 2009-12-28 | 2009-12-28 | Duty cycle correction circuit |
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|---|---|---|---|
| CN200910244047.1A CN102111130B (en) | 2009-12-28 | 2009-12-28 | Duty cycle correction circuit |
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| CN102111130A CN102111130A (en) | 2011-06-29 |
| CN102111130B true CN102111130B (en) | 2015-01-07 |
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| CN107222188B (en) * | 2017-05-27 | 2020-06-19 | 珠海格力电器股份有限公司 | Clock circuit, chip and electronic equipment |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1542861A (en) * | 2003-03-28 | 2004-11-03 | ���ǵ�����ʽ���� | Integrated circuit devices having improved duty cycle correction and methods of operating the same |
| CN1848687A (en) * | 2005-04-15 | 2006-10-18 | 尔必达存储器股份有限公司 | Duty detection circuit and method for controlling the same |
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| KR100557580B1 (en) * | 2004-02-23 | 2006-03-03 | 주식회사 하이닉스반도체 | Clock duty ratio correction circuit |
| KR100712537B1 (en) * | 2005-10-26 | 2007-04-30 | 삼성전자주식회사 | Clock generating circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1542861A (en) * | 2003-03-28 | 2004-11-03 | ���ǵ�����ʽ���� | Integrated circuit devices having improved duty cycle correction and methods of operating the same |
| CN1848687A (en) * | 2005-04-15 | 2006-10-18 | 尔必达存储器股份有限公司 | Duty detection circuit and method for controlling the same |
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