CN102098852A - Small-area power tube-based low-mismatching multi-channel light-emitting diode (LED) constant current source driving circuit - Google Patents

Abstract

The invention provides a small-area power tube-based low-mismatching multi-channel light-emitting diode (LED) constant current source driving circuit structure, and belongs to the technical field of microelectronics and LED driving. The LED constant current source driving circuit comprises an identity (ID) generation module IDGen, a current mirror and n channels, wherein the ID generation module comprises an operational amplifier and a metal oxide semiconductor (MOS) tube; the current ID of the current mirror generates n equal currents Iref1, Iref2, ..., and Irefn; the n channels have a uniform structure and comprise an operational amplifier and two MOS tubes; and one MOS tube is a power tube, and the width to length ratio of the power tube is m times that of the other MOS tube. The matching design can be performed on the layout so as to reduce mismatching to the minimum extent.

Description

Low mismatch multi-channel LED constant current source driving circuit based on the small size power tube

Technical field

The present invention relates to a kind of low mismatch multi-channel LED constant current source driving circuit structure, belong to microelectronics and LED Driving technique field based on the small size power tube.

Background technology

Along with the widespread adoption of LED screen, the led drive circuit of low mismatch and small size improves LED screen life-span and LED screen display quality to reducing cost, and important effect is all arranged.I causes the acute variation of electric current on it because the characteristics of luminescence of LED lamp, its both end voltage change very, so need constant-current driving.In order to obtain the brightness uniformity of different pixels point, the electric current between the different pixels point should equate as far as possible.And,, be affected in the life-span of LED if current mismatch is too big between the different LED owing to have inconsistency between the different LED fluorescent tubes.

A kind of typical LED drive circuit is seen Fig. 1.This structure comprise a voltage generating module VGEN and n passage (Channel 1, and Channel 2 ..., Channel n).The VGEN module provides reference voltage for passage, comprises two amplifier Opa1 and Opa2, a current mirror (Current Source Mirror) and two feedback metal-oxide-semiconductor M0 and Mref.This structure uses DAC (not providing among the figure) to produce a variable voltage Vref1, and Rext is an outer meeting resistance.Because the Opa1 multiplication factor is very big, makes the drain terminal voltage of M0 equal Vref1 by feedback, utilizes the different ID of combination results of different Vref1 and Rext, different application can have different ID, and is adjustable.For the same Rext, regulate the value that the digital signal code value D that exports to DAC regulates Vref1 in the practical application and just can realize different output currents.ID copies to the Iref electric current by current mirror, Vref2 is for example fixed voltage of Bandgap (not providing among the figure) generation of a reference source, suppose that Opa2 ideal or multiplication factor are very big, because the existence of Mref makes the D terminal voltage of Mref equal Vref2, have different VG for different electric currents, realize duplicating of electric current by duplicating VG and Vref2 between the different passages.Each passage comprises an amplifier and two power tubes (is M1 and Mo1 for passage 1), because the current ratio of LED is bigger, promptly the current ratio that flows through on M1 and the Mo1 is bigger, needs the M1 and the Mo1 of bigger area.Be duplicate on circuit structure between n the passage, the coupling that different passages duplicate Mref has determined different interchannel consistency.Because power tube M1 is generally operational in linear zone, its current replication mismatch may be calculated:

$\frac{\mathrm{\ΔIout}}{\mathrm{Iout}}=\frac{\mathrm{\Δ}\left(\frac{W}{L}\right)}{\left(\frac{W}{L}\right)}+\frac{\mathrm{\Δ}\left(V_{\mathrm{TH}}\right)}{(V_{\mathrm{GS}}-V_{\mathrm{TH}})}+\frac{\mathrm{\Δ}\left({\mathrm{\μC}}_{\mathrm{ox}}\right)}{\left(\mathrm{\μ}{C}_{\mathrm{ox}}\right)}+\frac{\mathrm{\Δ}\left(V_{\mathrm{ref}2}\right)}{\left(V_{\mathrm{ref}2}\right)}$

Can see that the different interchannel mismatches of this structure are mainly from the mismatch of duplicating of threshold mismatch and Vref2, for breadth length ratio item mismatch and μ C _OxMismatch, every kind of structure has.For different passages, its identical amount is grid voltage VG and the Vref2 voltage on the Mref.Because in actual domain, different interchannel amplifiers and output loading Guan Jun are in different positions, so there is bigger mismatch.And each passage all needs two metal-oxide-semiconductors that flow through big electric current, and area requirements is bigger.

Fig. 1 structure is simple relatively, and interchannel mismatch can do smaller, so present led drive circuit mostly adopts this structure.Yet different interchannel mismatches depend on the absolute value error between the different passage output loading pipes in this structure, and this value is relatively large.In addition, each passage of the structure that Fig. 1 provides needs two power tubes, all flows through big electric current on it, needs very big chip area.

Summary of the invention

The present invention proposes a kind of low mismatch multi-channel LED constant current source driving circuit structure based on the small size power tube, solved the large tracts of land problem that single channel adopts two power tubes to cause, and different interchannel duplicates mismatch problem.

The circuit structure that the present invention proposes comprises ID generation module IDGen, current mirror (Current Source Mirror) and n passage.Described ID generation module comprises an amplifier and a metal-oxide-semiconductor, described ID generation module needs a reference voltage V ref1, be generally voltage or other modes of a DAC output, described ID generation module also needs an outer meeting resistance Rext, finally produces the current source ID of a variation relevant with actual needs.Described current mirror can be a cascodes, also can be other structures, and described current mirror is accepted electric current I D, produces n electric current I ref1 that equates, Iref2 ..., Irefn.The structure unanimity of a described n passage, comprise an amplifier and two metal-oxide-semiconductors, one of them metal-oxide-semiconductor is that (for first passage is Mo1 to power tube, this sentences first passage is example), this power tube need flow through big electric current, so its area is bigger, another one MOS is M1 (for first passage), this metal-oxide-semiconductor does not need big electric current, and its area is less.M1 flows through the electric current I ref1 (is Iref2 for second passage) that current mirror produces, because the multiplication factor of amplifier is very big, the voltage of two input equates, for M1 and Mo1, four terminal voltages of its metal-oxide-semiconductor equate, and the size of Mo1 breadth length ratio be M1 breadth length ratio m doubly, realize m current amplification factor doubly.

Described circuit structure provides a kind of optimization circuit.This optimization circuit comprises an ID detection module and corresponding switch, described ID detection module detects the size of ID, ID is divided into several intervals, and with it coding, corresponding different respectively output digital logic signals, the corresponding switch of described Digital Signals, the size of described switch control ID and the m number of Mo1.

Described circuit structure provides the another kind of circuit of optimizing.This optimization circuit comprises two clamp circuit a, b.Described clamp circuit a comprises several NMOS and a resistance, each NMOS is the grid leak short circuit, and the source of each NMOS connects the leakage of a NMOS, and uppermost NMOS receives the input DX of amplifier, nethermost NMOS receives ground, and resistance is connected on DX point and the LED negative terminal.Clamp circuit b clamps down on low pressure, this magnitude of voltage is between 50mV-200mV, point is clamped down on the DX point voltage thereby described clamp circuit is connected on DX, and when LED negative terminal voltage during less than given voltage, the voltage that DX is ordered descends owing to clamp down on that the existence of circuit b begins to slow down or constant.

The channel design that the present invention adopts is used single power tube, makes the D terminal voltage of M1 accurately duplicate output end voltage with an amplifier, i.e. the D terminal voltage of Mo1, and M1 and Mo1 can do the matching design on domain, can make mismatch be reduced to minimum.And the electric current that flows through M1 and M2 duplicates by current mirror, and this is replicated in and also belongs to local mismatches on the domain, can do quite accurately.

Description of drawings

Fig. 1 is a kind of typical multi-channel LED constant current source driving circuit;

The drive circuit that Fig. 2 adopts for the present invention;

Fig. 3 is the m value assurance linear zone by switch current and MOS;

Fig. 4 is the clamp circuit in the circuit structure of the present invention; Wherein, (a) for comprising the access diagram of high voltage clamp circuit a; (b) for comprising the access diagram of low-voltage clamp circuit b.

Embodiment

Below in conjunction with accompanying drawing, technical scheme of the present invention is described in further detail by specific embodiment.

Fig. 2 is the physical circuit figure of the structure embodiment of the present invention's proposition, and as shown in Figure 2, this structure has provided the schematic diagram of two passages.IDGen produces ID, and current mirror produces Iref, offers different passages.To duplicate more accurately in order making, to make power tube be operated in linear zone, its mismatch is provided by following formula:

$\frac{\mathrm{\ΔIout}}{\mathrm{Iout}}=\frac{\mathrm{\Δ}\left(\frac{W}{L}\right)}{\left(\frac{W}{L}\right)}+\frac{\mathrm{\Δ}\left(V_{\mathrm{TH}}\right)}{(V_{\mathrm{GS}}-V_{\mathrm{TH}}-\frac{1}{2}{V}_{\mathrm{DS}})}+\frac{\mathrm{\Δ}\left({\mathrm{\μC}}_{\mathrm{ox}}\right)}{\left({\mathrm{\μC}}_{\mathrm{ox}}\right)}+\frac{[(V_{\mathrm{GS}}-V_{\mathrm{TH}})-V_{\mathrm{DS}}]\mathrm{\Δ}\left(V_{\mathrm{DS}}\right)}{(V_{\mathrm{GS}}-V_{\mathrm{TH}})V_{\mathrm{DS}}-\frac{1}{2}{V_{\mathrm{DS}}}^2}$

Because VGS-VTH is bigger, can further be reduced to:

$\frac{\mathrm{\ΔIout}}{\mathrm{Iout}}=\frac{\mathrm{\Δ}\left(\frac{W}{L}\right)}{\left(\frac{W}{L}\right)}+\frac{\mathrm{\Δ}\left(V_{\mathrm{TH}}\right)}{(V_{\mathrm{GS}}-V_{\mathrm{TH}})}+\frac{\mathrm{\Δ}\left({\mathrm{\μC}}_{\mathrm{ox}}\right)}{\left(\mathrm{\μ}{C}_{\mathrm{ox}}\right)}+\frac{\mathrm{\Δ}\left(V_{\mathrm{DS}}\right)}{\left(V_{\mathrm{DS}}\right)}$

Compare with said structure, remove Δ (V _DS) item quite outside, all the other several are all smaller.This is to be in closer position because above-mentioned formula produces the metal-oxide-semiconductor of mismatch in domain structure, belong to relative mismatch, and the mismatch of the structure that provides among Fig. 1 depends on the absolute value of metal-oxide-semiconductor, has bigger mismatch.Some extreme cases at circuit also might enter the saturation region, at this moment Δ (V _DS) influence of mismatch reduce a lot, and other several sum of errors linear zone basically identicals.

Fig. 3 optimizes structure one for provided by the invention.Can see from above-mentioned formula,, should make power tube be operated in linear zone as far as possible in order to obtain better matching.Be operated in linear zone and not only can obtain better accuracy, its W/L also can obtain less.Suppose that output current Iout scope is Imin～Imax, obtain easily that it is big that the grid voltage of its power tube becomes along with the change of Iout is big.So its power tube might enter the saturation region at electric current hour.In order hour to obtain big VG, adopt the mentality of designing of Fig. 3 among the present invention at Iout.Fig. 3 has provided two schematic diagrames that ID detects, and 0～ID/2 is encoded to 1, and ID/2～ID is encoded to 0, opens ID road electric current when being encoded to 1, and the ID value is changed to twice, closes one road Mo, and its breadth length ratio becomes 1/2.Can obtain from structure chart, the maximum current of circuit does not increase.In practical operation, only need to detect output current Iout, the digital signal decision that this value is generally provided by numerical portion, so need not comparator etc., testing circuit is also simple relatively.

Fig. 4 optimizes structure two for provided by the invention, and (a) figure has provided the schematic diagram of clamping down on high voltage 5V, and (b) figure has provided the schematic diagram of clamping down on 200mV voltage.Because the electrology characteristic of LED, LED power on or turn off process in, the instantaneous voltage of DX end may be greater than 5V; In addition in LED tandem-type connection structure, if LED short circuit for a certain reason may make DX hold on the voltage that is shorted to greater than 5V.Adopt the structure of clamping down on of Fig. 4 a among the present invention, make the DX terminal voltage be not more than 5V, reach by 3 VGS and to clamp down on effect, when LED negative terminal voltage Vo is higher than 3 VGS, begin conducting from the branch road of resistance to these three NMOS to ground, the change in voltage amplitude that DX is ordered is very little, is stabilized in a voltage that is lower than 5V basically.Because the imperfection of amplifier, may there be offset voltage in its two ends input.So have error condition in the circuit: very low and with offset voltage when suitable at output voltage DX, because the existence of imbalance, amplifier may be exported 5V voltage, and this moment is very big owing to the load pipe, and big electric current can be provided, the state of this moment is abnormal condition, so need clamp down on the DX terminal voltage, make it can not be too little, Fig. 4 b has provided an example that clamp voltage is 200mV, when the DX point voltage was lower than 200mV, its value no longer descended.

Can obtain from above analysis, the particularity that the present invention is directed to this structure proposes different optimizing structure, take optimized Measures after, can obtain better matching.

Claims (5)

1. a LED constant current source driving circuit is characterized in that, comprises ID generation module IDGen, a current mirror and n passage, described ID generation module comprise an amplifier and a metal-oxide-semiconductor, and described mirror currents ID produces n electric current I ref1 that equates, Iref2, ..., Irefn, the structure unanimity of a described n passage, comprise an amplifier and two metal-oxide-semiconductors, wherein, a metal-oxide-semiconductor is a power tube, the breadth length ratio of this power tube be another metal-oxide-semiconductor breadth length ratio m doubly.

2. LED constant current source driving circuit as claimed in claim 1, it is characterized in that, comprise an ID detection module and corresponding switch, described ID detection module detects the size of ID, ID is divided into several intervals, and with it coding, corresponding different respectively output digital logic signals, the corresponding switch of described Digital Signals, the size of described switch control ID and the m number of power tube.

3. LED constant current source driving circuit as claimed in claim 1, it is characterized in that, comprise a clamp circuit, this clamp circuit comprises several NMOS and a resistance, each NMOS is the grid leak short circuit, and the source of each NMOS connects the leakage of a NMOS, and uppermost NMOS receives the input DX of amplifier, nethermost NMOS receives ground, and resistance is connected on DX point and the LED negative terminal.

4. LED constant current source driving circuit as claimed in claim 1 is characterized in that, connects clamp circuit at the input DX of amplifier, and this clamp circuit is clamped down on low pressure, and this magnitude of voltage is between 50mV-200mV.

5. LED constant current source driving circuit as claimed in claim 1, it is characterized in that, described ID generation module needs a reference voltage V ref1, be voltage or other modes of a DAC output, described ID generation module also needs an outer meeting resistance Rext, finally produces a current source ID with the actual needs associated change.

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