CN102082182B - Polycrystalline diode applying germanium-silicon process and manufacturing method thereof - Google Patents
Polycrystalline diode applying germanium-silicon process and manufacturing method thereof Download PDFInfo
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- CN102082182B CN102082182B CN 200910201867 CN200910201867A CN102082182B CN 102082182 B CN102082182 B CN 102082182B CN 200910201867 CN200910201867 CN 200910201867 CN 200910201867 A CN200910201867 A CN 200910201867A CN 102082182 B CN102082182 B CN 102082182B
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Abstract
The invention discloses a polycrystalline diode applying a germanium-silicon process and a manufacturing method thereof. The polycrystalline diode comprises a field oxidation area; a first polycrystalline silicon layer is arranged on the field oxidation area; a polycrystalline germanium-silicon layer is arranged on the first polycrystalline silicon layer; a second polycrystalline silicon layer is arranged on the polycrystalline germanium-silicon layer; and a metal layer is led out on the first polycrystalline silicon layer and the second polycrystalline silicon layer, and a metal layer is led out on the polycrystalline germanium-silicon layer. In the invention, on the basis of the existing germanium-silicon process, a heterojunction longitudinal diode structure is developed and can be used for applications such as electrostatic protection and the like.
Description
Technical field
The present invention relates to a kind of semiconductor device and preparation method thereof, be specifically related to a kind of diode and preparation method thereof.
Background technology
Static is masty problem for the injury of electronic product always, and based on different technique, requirement, we seek, optimize different structure to reach the requirement of electrostatic protection.The maximum electrostatic preventing structure of current use uses gate grounding NMOS structure (GGNMOS, Ground Gate NMOS) more.Yet in the radio frequency products that uses germanium silicon material, much do not have integrated CMOS, consider based on cost, just greatly limited the use of electrostatic preventing structure.
Summary of the invention
Technical problem to be solved by this invention provides a kind of polycrystalline diode, and it adopts existing germanium silicon technology, can be used as electrostatic preventing structure and uses.
In order to solve above technical problem, the invention provides a kind of polycrystalline diode of using the germanium silicon technology; Comprise: oxide in field; The ground floor polysilicon is arranged on oxide in field; On the ground floor polysilicon, be provided with the polycrystalline germanium silicon layer; On the polycrystalline germanium silicon layer, be provided with second layer polysilicon; Draw metal level at described ground floor polysilicon and second layer polysilicon, draw metal level at the polycrystalline germanium silicon layer.
Beneficial effect of the present invention is: based on existing germanium silicon technology, develop the vertical diode structure of heterojunction, can be used for the utilizations such as electrostatic protection.Because technological process does not increase, provide many a kind of low-cost solutions for the germanium silicon product that does not have integrated CMOS, described this element device has 2 N-P contact-making surfaces, has namely increased the N-P junction area, thereby has reduced the shared chip area of device.
The present invention also provides the manufacture method of the polycrystalline diode of above-mentioned application germanium silicon technology, may further comprise the steps:
Step 4, make isolated area on the first polysilicon layer top;
Step 5, make the germanium silicon layer on the first polysilicon layer top, and germanium silicon layer top makes isolated area;
Description of drawings
Below in conjunction with the drawings and specific embodiments the present invention is described in further detail.
Fig. 1 is the schematic diagram of the described vertical polycrystalline diode structure of the embodiment of the invention;
Fig. 2 is the schematic diagram of the described method step one of the embodiment of the invention;
Fig. 3 is the schematic diagram of the described method step two of the embodiment of the invention;
Fig. 4 is the schematic diagram of the described method step three of the embodiment of the invention;
Fig. 5 is the schematic diagram of the described method step four of the embodiment of the invention;
Fig. 6 is the schematic diagram of the described method step five of the embodiment of the invention;
Fig. 7 is the schematic diagram of the described method step six of the embodiment of the invention;
Fig. 8 is the schematic diagram of the described method step seven of the embodiment of the invention;
Fig. 9 is the schematic diagram of the described method step eight of the embodiment of the invention;
Figure 10 is the schematic diagram of the described method step nine of the embodiment of the invention;
Figure 11 is the schematic flow sheet of the described method of the embodiment of the invention;
Figure 12 is that the described diode applications of the embodiment of the invention is at the schematic diagram of electrostatic discharge protective circuit.
Embodiment
The present invention utilizes the polysilicon (in the existing technique as polysilicon resistance) of the N-type in the existing technique, and the poly-SiGe of the P type base stage of heterojunction NPN diode (in the existing technique as) and N-type polysilicon (having in the technique emitter as heterojunction NPN diode now) be stacking to form vertical polycrystalline diode.As shown in Figure 1 be New Polycrystalline diode structure of the present invention.The N utmost point of this diode and P very ground floor polysilicon 2, poly-SiGe 3, second layer polysilicon 10 vertical stacks form.
In the germanium silicon technology, there are multilayer polysilicon, germanium silicon, have respectively N-type or P type to mix.Based on this technique, the present invention proposes a kind of novel polycrystalline diode structure.This structure can be used for electrostatic protection.Because this new construction is based on existing technological design, can not increase extra light shield, technological process, so can not increase cost.Based on existing germanium silicon technology, develop the vertical diode of heterojunction, can be used for the utilizations such as electrostatic protection.Because technological process does not increase, many a kind of low-cost solutions are provided for the germanium silicon product that does not have integrated CMOS.
The invention provides a kind of New Polycrystalline diode structure, as shown in Figure 1.Comprise: oxide in field 1; Ground floor polysilicon 2 is arranged on oxide in field 1; On ground floor polysilicon 2, be provided with polycrystalline germanium silicon layer 3; On polycrystalline germanium silicon layer 3, be provided with second layer polysilicon 10; Draw metal level 5 at described ground floor polysilicon 2 and second layer polysilicon 10, draw metal level 5 at polycrystalline germanium silicon layer 3.Be heterojunction between described ground floor polysilicon 2 and polycrystalline germanium silicon layer 3, polycrystalline germanium silicon layer 3 and the second layer polysilicon 10.Draw metal level as the diode N utmost point at described ground floor polysilicon and second layer polysilicon.Draw metal level as the diode P utmost point at described polycrystalline germanium silicon layer.
As shown in figure 11, make the method for polycrystalline diode of the present invention, may further comprise the steps: step 1, fabricating yard oxide regions 1; Step 2, on field oxide region, 1 make the first polysilicon layer 2; Step 3, make oxide side wall 8 in the first polysilicon layer 2 both sides; Step 4, make isolated area on the first polysilicon layer 2 tops; Step 5, make germanium silicon layer 3 on the first polysilicon layer 2 tops, and germanium silicon layer 3 tops make isolated area; Step 6, make the second polysilicon layer 10 on germanium silicon layer 3 tops; Step 7, unnecessary germanium silicon and the polysilicon of removal; Step 8, make oxide side wall 9 in germanium silicon layer 3 and the second polysilicon layer 10 both sides; Step 9, make through holes 4 and draw metal level 5 at described ground floor polysilicon 2 and second layer polysilicon 10, make through holes 4 and draw metal level 5 at polycrystalline germanium silicon layer 3.
Such as Fig. 2-shown in Figure 10, the present invention can adopt the step in the existing germanium silicon technology to realize, comprising:
Realize fabricating yard oxide regions 1 in the step 1 of the present invention with the definition active area step in the existing germanium silicon technology.
Utilize making polysilicon resistance (if the technique of integrated CMOS then simultaneously can be made grid) step in the existing germanium silicon technology to realize making the first polysilicon layer 2 at field oxide region 1 in the step 2 of the present invention.
Utilize making gate oxide side wall step in the existing germanium silicon technology to realize making oxide side wall 8 steps in the first polysilicon layer 2 both sides in the step 3 of the present invention.
Utilize the intrinsic base region definition step in the existing germanium silicon technology, realize removing the step that silica 6 and polysilicon 7 define the first polysilicon 2 and the contact-making surface of poly-SiGe 3, the device size definition flexibly.
Utilize the making emitter-window step in the existing germanium silicon technology, realize removing the step that silica 6 and polysilicon 7 define the second polysilicon 10 and the contact-making surface of poly-SiGe 3.
Utilize the making emitter-polysilicon step in the existing germanium silicon technology, be implemented in the step that germanium silicon layer 3 tops make the second polysilicon layer 10.
Utilize the making base germanium silicon step in the existing germanium silicon technology to realize germanium silicon layer 3 steps of making on the first polysilicon layer 2 tops of the present invention.
Utilize the step of the making base oxide side wall in the existing germanium silicon technology to realize making oxide side wall 9 steps at germanium silicon layer and the second polysilicon layer both sides among the present invention.
The step of utilizing the rear end metal in the existing germanium silicon technology to connect realizes making through holes 4 and drawing metal level 5 at described ground floor polysilicon 2 and second layer polysilicon 10 in the step 9 of the present invention, makes through holes 4 and draws the step of metal level 5 at polycrystalline germanium silicon layer 3.
Can find out that by following table the method for the invention does not increase technological process, can adopt existing germanium silicon technology to realize fully.Many a kind of low-cost solutions are provided for the germanium silicon product that does not have integrated CMOS.
This structure can be used for electrostatic protection.Wherein diode all can be realized by structure of the present invention as shown in figure 12; when being used for side circuit enforcement protection; diode structure shown in Figure 2 is connected to the I/O end of protected circuit; when the I/O end that has electrostatic charge from circuit enters; by described electrostatic prevention protection device construction bleed off; guarantee that protected circuit can not impacted, ensure circuit safety.
The present invention is not limited to execution mode discussed above.More than the description of embodiment is intended in order to describe and illustrate the technical scheme that the present invention relates to.Based on the apparent conversion of the present invention enlightenment or substitute and also should be considered to fall into protection scope of the present invention.Above embodiment is used for disclosing best implementation method of the present invention, so that those of ordinary skill in the art can use numerous embodiments of the present invention and multiple alternative reaches purpose of the present invention.
Claims (6)
1. polycrystalline diode of using the germanium silicon technology; It is characterized in that, comprising:
Oxide in field;
On oxide in field, be provided with the ground floor polysilicon, for N-type is mixed;
On the ground floor polysilicon, be provided with the polycrystalline germanium silicon layer, for the P type mixes;
On the polycrystalline germanium silicon layer, be provided with second layer polysilicon, for N-type is mixed;
Draw metal level at described ground floor polysilicon and second layer polysilicon, as the N utmost point of diode, draw metal level at the polycrystalline germanium silicon layer, as the P utmost point of diode.
2. the polycrystalline diode of application germanium silicon technology as claimed in claim 1 is characterized in that, is heterojunction between described ground floor polysilicon and polycrystalline germanium silicon layer, polycrystalline germanium silicon layer and the second layer polysilicon.
3. the manufacture method of the polycrystalline diode of application germanium silicon technology as claimed in claim 1 is characterized in that, may further comprise the steps:
Step 1, fabricating yard oxide regions;
Step 2, make the first polysilicon layer at field oxide region;
Step 3, make oxide side wall in the first polysilicon layer both sides;
Step 4, make isolated area on the first polysilicon layer top;
Step 5, make the polycrystalline germanium silicon layer on the first polysilicon layer top, and polycrystalline germanium silicon layer top makes isolated area;
Step 6, make the second polysilicon layer on polycrystalline germanium silicon layer top;
Step 7, unnecessary germanium silicon and the polysilicon of removal;
Step 8, make oxide side wall in polycrystalline germanium silicon layer and the second polysilicon layer both sides;
Step 9, make through hole at described ground floor polysilicon and second layer polysilicon and draw metal level, make through hole at the polycrystalline germanium silicon layer and draw metal level.
4. the manufacture method of the polycrystalline diode of application germanium silicon technology as claimed in claim 3 is characterized in that, is heterojunction between described ground floor polysilicon and polycrystalline germanium silicon layer, polycrystalline germanium silicon layer and the second layer polysilicon.
5. the manufacture method of the polycrystalline diode of application germanium silicon technology as claimed in claim 4 is characterized in that, draws metal level as the diode N utmost point at described ground floor polysilicon and second layer polysilicon.
6. the manufacture method of the polycrystalline diode of application germanium silicon technology as claimed in claim 5 is characterized in that, draws metal level as the diode P utmost point at described polycrystalline germanium silicon layer.
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| CN 200910201867 CN102082182B (en) | 2009-11-26 | 2009-11-26 | Polycrystalline diode applying germanium-silicon process and manufacturing method thereof |
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| CN102082182B true CN102082182B (en) | 2013-01-09 |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2826700Y (en) * | 2005-08-30 | 2006-10-11 | 浙江大学 | Poly-GeSi Schottky diode |
| CN1856880A (en) * | 2003-09-22 | 2006-11-01 | 皇家飞利浦电子股份有限公司 | Dynamic control of capacitance elements in field effect semiconductor devices |
| CN101064309A (en) * | 2006-04-28 | 2007-10-31 | 日产自动车株式会社 | Semiconductor device and manufacturing method thereof |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1856880A (en) * | 2003-09-22 | 2006-11-01 | 皇家飞利浦电子股份有限公司 | Dynamic control of capacitance elements in field effect semiconductor devices |
| CN2826700Y (en) * | 2005-08-30 | 2006-10-11 | 浙江大学 | Poly-GeSi Schottky diode |
| CN101064309A (en) * | 2006-04-28 | 2007-10-31 | 日产自动车株式会社 | Semiconductor device and manufacturing method thereof |
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