CN102074274A - Method for detecting errors of and automatically resetting encryption chip in encryption card - Google Patents
Method for detecting errors of and automatically resetting encryption chip in encryption card Download PDFInfo
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- CN102074274A CN102074274A CN2010105362161A CN201010536216A CN102074274A CN 102074274 A CN102074274 A CN 102074274A CN 2010105362161 A CN2010105362161 A CN 2010105362161A CN 201010536216 A CN201010536216 A CN 201010536216A CN 102074274 A CN102074274 A CN 102074274A
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Abstract
The invention provides a method for detecting errors of and automatically resetting an encryption chip in an encryption card. The method is characterized by comprising a monitoring control chip and comprises the following steps: high-level application software sends an encryption/decryption command or data to the encryption chip via the monitoring control chip; the monitoring control chip automatically adds a chip monitoring command to the head of the encryption/decryption command; after the monitoring command enters into the encryption chip, the encryption chip returns own inner state information; the monitoring control chip judges the inner state information of the encryption chip, sends a reset command and resets the encryption chip if the inner state information is inconsistent with the expected value and continuously carries out encryption/decryption if the inner state information is consistent with the expected value; and in the encryption/decryption process, the monitoring control chip monitors the data return time of the encryption chip, considers that the encryption card has errors if the data return time exceeds the preset value and sends the reset command to reset the encryption card. The method has the beneficial effects of effectively solving the problem that the encryption card has errors in the encryption/decryption process and improving the working efficiency of the encryption card.
Description
Technical field
The present invention relates on the encrypted card to the control method of encryption chip encryption chip error-detecting and automatically reset method in particularly a kind of encrypted card.
Background technology
In the encrypted card application, encryption chip is the core devices of encrypted card, and all encryption and decryption operations all need to finish by encryption chip.But encryption chip can mistake occur owing to the reason of internal logic or applications, and this mistake can cause the mistake of encrypted result, thereby makes upper layer application mistake occur, makes data expendable fatal result occur when serious.
The way of encrypted card is to implement monitoring by upper layer software (applications) at present, and the end time is detected encrypted card at interval, if pinpoint the problems, by software transmission chip replacement or reset command encryption chip is resetted.Perhaps some encrypted card does not carry out error-detecting, if run into the encryption chip mistake, can only again server be restarted.It is elongated at interval that the previous case make to be encrypted the detection time of makeing mistakes, the centre have some packets by the carrying out of mistake encryption and decryption.Under the latter event, the service of encryption and decryption stops because of server outage, and practical application has been caused adverse effect.
Summary of the invention
At above or a plurality of problems, the present invention proposes encryption chip error-detecting and automatically reset method in a kind of encrypted card, solve encrypted card defective in use, the present invention adopts increases encryption chip Monitoring and Controlling chip on encrypted card, can monitor the running status of encrypted card in real time, in time make the encryption chip reset instruction.
Encryption chip error-detecting and automatically reset method comprise the Monitoring and Controlling chip in a kind of encrypted card, and step is as follows:
A, upper application software send to encryption and decryption order or data in the encryption chip by the Monitoring and Controlling chip;
B, Monitoring and Controlling chip add chip monitoring order to the encryption and decryption command header automatically;
After C, monitoring order entered encryption chip, encryption chip returned its internal state information;
D, Monitoring and Controlling chip are judged the encryption chip internal state information, if be not inconsistent with desired value, then the Monitoring and Controlling chip sends reset command, and encryption chip is resetted; If conform to, then proceed the operation of encryption and decryption with desired value.
In E, the encryption and decryption process, Monitoring and Controlling chip monitoring encryption chip data time of return if the data time of return exceeds preset value, thinks that then encrypted card makes mistakes, and the Monitoring and Controlling chip sends the reset command encryption chip that resets.
A kind of optimal technical scheme of the present invention is: described Monitoring and Controlling chip can be FPGA or CPLD chip, can realize monitoring and reset operation to encryption chip by the configuration internal logic.
Another optimal technical scheme of the present invention is: described Monitoring and Controlling chip can carry out communication by general purpose interface bus and main frame or host interface chip.
The present invention efficiently solves the situation of makeing mistakes in the encrypted card encryption and decryption process, has improved the work efficiency of encrypted card.
Description of drawings
Fig. 1 is the synoptic diagram that is connected with encryption chip according to Monitoring and Controlling chip on the encrypted card of the present invention.
Fig. 2 is according to the direct-connected synoptic diagram of Monitoring and Controlling chip and main frame on the encrypted card of the present invention.
Fig. 3 is the synoptic diagram that is connected with the host interface chip according to Monitoring and Controlling chip on the encrypted card of the present invention.
Specific embodiments
The present invention has added a Monitoring and Controlling chip on encrypted card, be connected between host interface and the encryption chip.Main frame sends the order and the data of encryption and decryption by the Monitoring and Controlling chip.Main frame does not need encryption chip is sent independent monitoring or reset command, the Monitoring and Controlling chip can be added the monitoring order automatically in the encryption and decryption order of main frame and data, monitor the result of return command simultaneously, if the discovery encryption chip occurs wrong or do not make at the appointed time and replying, promptly send reset command.
Fig. 1 is according to the Monitoring and Controlling chip of encrypted card of the present invention and the connection diagram of encryption chip.As shown in Figure 1, encrypted card according to the present invention comprises that encryption chip circuit 102 also comprises a Monitoring and Controlling chip 104, is used for encryption chip is monitored and resetted.
Fig. 2 is according to the direct-connected synoptic diagram of Monitoring and Controlling chip and main frame on the encrypted card of the present invention.As shown in Figure 2, also comprise host interface 103 according to encrypted card of the present invention.Monitoring and Controlling chip in the encrypted card can be connected with host interface 103 by the versabus mode, as: PCIe, USB.
Fig. 3 is the synoptic diagram that is connected with the host interface chip according to Monitoring and Controlling chip on the encrypted card of the present invention.As shown in Figure 3, also comprise host interface chip 105 according to encrypted card of the present invention.Monitoring and Controlling chip in the encrypted card is connected with host interface chip 105 by general or non-versabus mode, as: GPIO.
Claims (3)
1. encryption chip error-detecting and automatically reset method in the encrypted card, it is characterized in that: comprise the Monitoring and Controlling chip, step is as follows:
A, upper application software send to encryption and decryption order or data in the encryption chip by the Monitoring and Controlling chip;
B, Monitoring and Controlling chip add chip monitoring order to the encryption and decryption command header automatically;
After C, monitoring order entered encryption chip, encryption chip returned its internal state information;
D, Monitoring and Controlling chip are judged the encryption chip internal state information, if be not inconsistent with desired value, then the Monitoring and Controlling chip sends reset command, and encryption chip is resetted; If conform to, then proceed the operation of encryption and decryption with desired value.
In E, the encryption and decryption process, Monitoring and Controlling chip monitoring encryption chip data time of return if the data time of return exceeds preset value, thinks that then encrypted card makes mistakes, and the Monitoring and Controlling chip sends the reset command encryption chip that resets.
2. encryption chip error-detecting and automatically reset method in a kind of according to claim 1 encrypted card, it is characterized in that: described Monitoring and Controlling chip can be FPGA or CPLD chip, can realize monitoring and reset operation by the configuration internal logic to encryption chip.
3. encryption chip error-detecting and automatically reset method in a kind of according to claim 1 secret card is characterized in that: described Monitoring and Controlling chip can carry out communication by general purpose interface bus and main frame or host interface chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010105362161A CN102074274A (en) | 2010-11-04 | 2010-11-04 | Method for detecting errors of and automatically resetting encryption chip in encryption card |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010105362161A CN102074274A (en) | 2010-11-04 | 2010-11-04 | Method for detecting errors of and automatically resetting encryption chip in encryption card |
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| Publication Number | Publication Date |
|---|---|
| CN102074274A true CN102074274A (en) | 2011-05-25 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010105362161A Pending CN102074274A (en) | 2010-11-04 | 2010-11-04 | Method for detecting errors of and automatically resetting encryption chip in encryption card |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102571488A (en) * | 2011-12-21 | 2012-07-11 | 北京星网锐捷网络技术有限公司 | Failure processing method, device and system for encryption card |
| CN106411498A (en) * | 2016-12-23 | 2017-02-15 | 艾体威尔电子技术(北京)有限公司 | Method of achieving cryptographic algorithm |
| CN110971315A (en) * | 2019-12-06 | 2020-04-07 | 广东汇泰龙科技股份有限公司 | Method and system for detecting communication signal between CPU (Central processing Unit) induction card and intelligent lock |
| CN113703838A (en) * | 2021-08-30 | 2021-11-26 | 远景智能国际私人投资有限公司 | Device control method, device and storage medium |
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| CN1838289A (en) * | 2006-04-13 | 2006-09-27 | 上海交通大学 | Hard disk encryption system based on MEMS cipher lock |
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| CN1838289A (en) * | 2006-04-13 | 2006-09-27 | 上海交通大学 | Hard disk encryption system based on MEMS cipher lock |
| CN101281504A (en) * | 2008-05-29 | 2008-10-08 | 上海交通大学 | Hard disc enciphering system based on MEMS enciphered lock and FPGA |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102571488A (en) * | 2011-12-21 | 2012-07-11 | 北京星网锐捷网络技术有限公司 | Failure processing method, device and system for encryption card |
| CN102571488B (en) * | 2011-12-21 | 2015-02-25 | 北京星网锐捷网络技术有限公司 | Failure processing method, device and system for encryption card |
| CN106411498A (en) * | 2016-12-23 | 2017-02-15 | 艾体威尔电子技术(北京)有限公司 | Method of achieving cryptographic algorithm |
| CN106411498B (en) * | 2016-12-23 | 2019-07-30 | 艾体威尔电子技术(北京)有限公司 | A method of realizing national secret algorithm |
| CN110971315A (en) * | 2019-12-06 | 2020-04-07 | 广东汇泰龙科技股份有限公司 | Method and system for detecting communication signal between CPU (Central processing Unit) induction card and intelligent lock |
| CN113703838A (en) * | 2021-08-30 | 2021-11-26 | 远景智能国际私人投资有限公司 | Device control method, device and storage medium |
| CN113703838B (en) * | 2021-08-30 | 2024-01-05 | 远景智能国际私人投资有限公司 | Equipment control method, device, equipment and storage medium |
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Address after: 100193 Beijing, Haidian District, northeast Wang West Road, building 8, building 36, floor 5 Applicant after: Beijing Shuguang Tianyan Information Technology Co., Ltd. Address before: 100084 Beijing city Haidian District Street office building No. 64 West mill Applicant before: Beijing Shuguang Tianyan Information Technology Co., Ltd. |
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Address after: 100193 Beijing, Haidian District, northeast Wang West Road, building 8, building 36, floor 5 Applicant after: Shuguang Cloud Computing Technology Co., Ltd. Address before: 100193 Beijing, Haidian District, northeast Wang West Road, building 8, building 36, floor 5 Applicant before: Beijing Shuguang Tianyan Information Technology Co., Ltd. |
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Free format text: CORRECT: APPLICANT; FROM: SHUGUANG TIANYAN INFORMATION TECH CO LTD, BEIJING TO: SUGON CLOUD COMPUTING TECHNOLOGY CO., LTD. |
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Application publication date: 20110525 |