CN102073777A - Script based method and device for verifying chip performance - Google Patents
Script based method and device for verifying chip performance Download PDFInfo
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- CN102073777A CN102073777A CN2011100283191A CN201110028319A CN102073777A CN 102073777 A CN102073777 A CN 102073777A CN 2011100283191 A CN2011100283191 A CN 2011100283191A CN 201110028319 A CN201110028319 A CN 201110028319A CN 102073777 A CN102073777 A CN 102073777A
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- 238000012795 verification Methods 0.000 description 13
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Abstract
The invention provides a script based method and device for verifying the chip performance. The method comprises the following steps: setting a monitor module outside a script module for verifying a chip; acquiring and recording running parameters by the monitor module in the script module running process; calculating the running parameters by a statistic module every preset time interval to acquire a statistic result related to time; and generating a statistic result display image by a display module according to the statistic result. By adopting the monitor module outside the script module, the monitor module does not influence the simulating process of the script module for verifying the chip, so the verifying process has small operation quantity and good inheritance.
Description
Technical field
The present invention relates to the verification technique of large scale integrated circuit, particularly relate to a kind of method and apparatus of the proofing chip performance based on script.
Background technology
Large scale integrated circuit is in the design phase, will carry out functional verification and performance verification to chip also in the design phase, functional verification is meant by software emulation simulates this chip, looks at whether it can realize the function of expecting, so functional verification mainly is to see whether analog result is correct; Performance verification then is the every performance index in the statistics chip operational process, sees whether it reaches requirement, so performance verification mainly is to see the process performance.Comparatively speaking, performance verification is difficult realizing, this is or not the module of certain simple function because performance verification relates to, but entire chip, whether the cooperation of investigating each intermodule is reasonable, and whether collaborative efficient, whether total system can satisfy performance index.So how to obtain with the relevant data of performance, and how to handle obtain the difficult point that raw data is a performance verification.
Wherein, performance verification is called Performance Evaluation again, can directly instruct chip design, so its success or failure to project play crucial effects.In order to finish Performance Evaluation, a lot of slip-stick artists attempt to increase work efficiency with automated method.Simply realize design object and carry out the bus indicator-specific statistics with the C/systemC language, can just begin Performance Evaluation at the project initial stage, but can not obtain accurate result as emulation with the C language.
The present way based on emulation is normally used verilog (a kind of hardware description language, can be used for carrying out various levels of logical design, also can carry out the logic synthesis of digital display circuit, simulating, verifying and time series analysis etc.) the monitor bus access process, with some important indexs of counters count, write as document by the slip-stick artist then.Do having a lot of counters like this, revising at every turn or increasing statistical indicator all needs emulation again, causes inheritance not good, makes debugging (debug) produce certain degree of difficulty.Therefore, the performance verification of prior art exists the not good technical matters of inheritance.
In addition, in order to make the checking result more directly perceived, chart is the more common form of expression.Present MATLAB (matrix experiment chamber, a kind of business mathematics software, be used for algorithm development, data visualization, data analysis and numerical evaluation or the like) be the common tool that deal with data generates chart, but this instrument needs the data of matrix format, and be not easy on workstation, use.Therefore, the performance verification of prior art also exists and is difficult to the technical matters that shows the checking result directly perceived.
Summary of the invention
The method and apparatus that the purpose of this invention is to provide a kind of proofing chip performance based on script, by adopting the monitor module of script module outside, make monitor module not influence the simulation process of the script module of proofing chip itself, make that the proof procedure operand is little and inheritance good.
To achieve these goals, on the one hand, provide a kind of method of the proofing chip performance based on script, having comprised:
Outside in the script module that is used for proofing chip is provided with monitor module;
In described script module operational process, described monitor module obtains and the record operational factor;
Every the preset time section, by statistical module described operational factor is added up, obtain statistics with time correlation;
Generate the statistical result showed image by display module according to described statistics.
Preferably, in the above-mentioned method, described statistical result showed image is described operational factor time history plot.
Preferably, in the above-mentioned method, also comprise: described statistics and threshold value are compared, obtain comparative result.
Preferably, in the above-mentioned method, described display module also generates the comparative result display image according to described comparative result.
Preferably, in the above-mentioned method, described operational factor is bandwidth, data volume, time-delay and/or frame per second.
To achieve these goals, the embodiment of the invention also provides a kind of device of the proofing chip performance based on script, comprising:
Script module is used for: proofing chip;
Monitor module is arranged on the outside of described script module, is used for: at described script module operational process, obtain also record operational factor;
Statistical module is used for: every the preset time section, described operational factor is added up, obtain the statistics with time correlation;
Display module is used for: generate the statistical result showed image according to described statistics.
Preferably, in the above-mentioned device, described statistical result showed image is described operational factor time history plot.
Preferably, in the above-mentioned device, also comprise: comparison module is used for: described statistics and threshold value are compared, obtain comparative result.
Preferably, in the above-mentioned device, described operational factor is bandwidth, data volume, time-delay and/or frame per second.
Preferably, in the above-mentioned device, described display module is the interactive drawing instrument of order line.
There is following technique effect at least in the present invention:
1) the present invention is by adopting the monitor module of script module outside, make monitor module not influence the simulation process of the script module of proofing chip itself, and external monitor module arithmetic amount is little, substantially do not influence simulation time and simulation process, and external monitor is revised easily, and inheritance is good.
2) statistical module generates statistics automatically according to the record of monitor module, has realized the Performance Evaluation checking of robotization fully, has saved the huge workload of complicate statistics.
3) display module adopts the GNUPLOT instrument, does not need matrix data just can use in workstation easily.
4) described statistics and threshold value are compared, make the people can open-and-shutly know satisfactory time period of performance index and undesirable time period, the people is had more the chip performance in the proof procedure get information about.
Description of drawings
The flow chart of steps of the method that Fig. 1 provides for the embodiment of the invention;
The structural drawing of the device that Fig. 2 provides for the embodiment of the invention.
The comparative result displayed map that Fig. 3 provides for the embodiment of the invention.
Embodiment
For the purpose, technical scheme and the advantage that make the embodiment of the invention is clearer, specific embodiment is described in detail below in conjunction with accompanying drawing.
The flow chart of steps of the method that Fig. 1 provides for the embodiment of the invention, as shown in Figure 1, the embodiment of the invention provides a kind of method of the proofing chip performance based on script, comprising:
As seen, the present invention make monitor module not influence the simulation process of the script module of proofing chip itself, and external monitor module arithmetic amount is little by adopting the monitor module of script module outside, does not influence simulation time and simulation process substantially.And statistical module generates statistics automatically according to the record of monitor module, has realized the Performance Evaluation checking of robotization fully, has saved the huge workload of complicate statistics.
Wherein, described statistical result showed image is described operational factor time history plot.Therefore, display module is to generate two dimensional image according to time shaft, do not need to adopt the data of matrix format, so display module can be by GNUPLOT (command-driven interactive function plotting program, the interactive drawing instrument of order line) instrument is realized, with respect to existing MATLAB instrument, can in workstation, use easily.
Wherein, also comprise: described statistics and threshold value are compared, obtain comparative result, described display module also generates the comparative result display image according to described comparative result.Make the people can open-and-shutly know satisfactory time period of performance index and undesirable time period, the people is had more the chip performance in the proof procedure get information about.Wherein, described operational factor is bandwidth, data volume, time-delay and/or frame per second or the like.
Corresponding above method, for the embodiment of the invention also provides a kind of device of the proofing chip performance based on script, Fig. 2 is the structural drawing of this device.As shown in Figure 2, this device comprises:
Can also comprise: comparison module 205 is used for: described statistics and threshold value are compared, obtain comparative result.
Described statistical result showed image is described operational factor time history plot.Described operational factor is bandwidth, data volume, time-delay and/or frame per second.
The comparative result displayed map that Fig. 3 provides for the embodiment of the invention.As shown in Figure 3, wherein, transverse axis X represents the time, and longitudinal axis Y represents the performance parametric statistics, and curve S is the time dependent curve of performance parameter statistics, and K is a threshold value.Can open-and-shutly know satisfactory time period of performance index and undesirable time period among Fig. 3, the people be had more the chip performance in the proof procedure get information about.
In the embodiment of the invention, script module can realize that script is to use a kind of specific descriptive language by script (script), and the executable file according to certain form is write is called grand or autoexec again.
In the embodiment of the invention, monitor module (monitor) is verified all information and the record of process, obtain the result that some each circulations (cycle) all will be added up by SV, at each time period (timescale) print result, also the time-write interval supplies script hardwood rate to obtain vdec/lcdc (video decode/LCD control) interruption by SV, these information all are recorded in same daily record (LOG) file, resolve the final statistics that obtains chip performance with script, generate the data file (each time period statistics once) of some important statistics targets by script, and call the curve map that the generation of GNUPLOT instrument changed by the time, can also arrive local mailbox by email at last.
As from the foregoing, the embodiment of the invention has following advantage:
1) the present invention is by adopting the monitor module of script module outside, make monitor module not influence the simulation process of the script module of proofing chip itself, and external monitor module arithmetic amount is little, substantially do not influence simulation time and simulation process, and external monitor is revised easily, and inheritance is good.
2) statistical module generates statistics automatically according to the record of monitor module, has realized the Performance Evaluation checking of robotization fully, has saved the huge workload of complicate statistics.
3) display module adopts the GNUPLOT instrument, does not need matrix data just can use in workstation easily.
4) described statistics and threshold value are compared, make the people can open-and-shutly know satisfactory time period of performance index and undesirable time period, the people is had more the chip performance in the proof procedure get information about.
5) data storage is used the Hash structure of iteration, and the analysis result of script is very detailed, can the various statistical items of combination in any.
6) monitor (monitor) can directly be printed detector information, and the transplanting of sundry item is convenient in relatively good realization
7) script has only hundreds of capable, maintains easily the succession with sundry item.
The above only is a preferred implementation of the present invention; should be pointed out that for those skilled in the art, under the prerequisite that does not break away from the principle of the invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.
Claims (10)
1. the method based on the proofing chip performance of script is characterized in that, comprising:
Outside in the script module that is used for proofing chip is provided with monitor module;
In described script module operational process, described monitor module obtains and the record operational factor;
Every the preset time section, by statistical module described operational factor is added up, obtain statistics with time correlation;
Generate the statistical result showed image by display module according to described statistics.
2. method according to claim 1 is characterized in that, described statistical result showed image is described operational factor time history plot.
3. method according to claim 1 is characterized in that, also comprises: described statistics and threshold value are compared, obtain comparative result.
4. method according to claim 3 is characterized in that, described display module also generates the comparative result display image according to described comparative result.
5. method according to claim 1 is characterized in that, described operational factor is bandwidth, data volume, time-delay and/or frame per second.
6. the device based on the proofing chip performance of script is characterized in that, comprising:
Script module is used for: proofing chip;
Monitor module is arranged on the outside of described script module, is used for: at described script module operational process, obtain also record operational factor;
Statistical module is used for: every the preset time section, described operational factor is added up, obtain the statistics with time correlation;
Display module is used for: generate the statistical result showed image according to described statistics.
7. device according to claim 6 is characterized in that, described statistical result showed image is described operational factor time history plot.
8. device according to claim 6 is characterized in that, also comprises: comparison module is used for: described statistics and threshold value are compared, obtain comparative result.
9. device according to claim 6 is characterized in that, described operational factor is bandwidth, data volume, time-delay and/or frame per second.
10. device according to claim 6 is characterized in that, described display module is the interactive drawing instrument of order line.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102622471A (en) * | 2012-02-22 | 2012-08-01 | 山东华芯半导体有限公司 | Integrated circuit front-end verification method |
CN105718661A (en) * | 2016-01-21 | 2016-06-29 | 烽火通信科技股份有限公司 | Universal chip performance verifying device and method |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1756257A (en) * | 2004-09-30 | 2006-04-05 | 北京航空航天大学 | Host performance collection proxy in large-scale network |
CN1863245A (en) * | 2005-12-31 | 2006-11-15 | 华为技术有限公司 | Apparatus and method for verificating chip standard coincidence degree |
CN101043543A (en) * | 2006-03-24 | 2007-09-26 | 中兴通讯股份有限公司 | Automatized test tool and method for program controlled exchanger |
US20090112553A1 (en) * | 2007-10-30 | 2009-04-30 | I-Yin Li | Display design system and method |
US20100004904A1 (en) * | 2008-07-03 | 2010-01-07 | I-Yin Li | Display designing system and method for designing a display |
-
2011
- 2011-01-26 CN CN2011100283191A patent/CN102073777A/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1756257A (en) * | 2004-09-30 | 2006-04-05 | 北京航空航天大学 | Host performance collection proxy in large-scale network |
CN1863245A (en) * | 2005-12-31 | 2006-11-15 | 华为技术有限公司 | Apparatus and method for verificating chip standard coincidence degree |
CN101043543A (en) * | 2006-03-24 | 2007-09-26 | 中兴通讯股份有限公司 | Automatized test tool and method for program controlled exchanger |
US20090112553A1 (en) * | 2007-10-30 | 2009-04-30 | I-Yin Li | Display design system and method |
US20100004904A1 (en) * | 2008-07-03 | 2010-01-07 | I-Yin Li | Display designing system and method for designing a display |
Non-Patent Citations (1)
Title |
---|
刘绪红: ""基于脚本的芯片自动测试及数据采集系统的研究与开发"", 《万方学位论文数据库》 * |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102622471A (en) * | 2012-02-22 | 2012-08-01 | 山东华芯半导体有限公司 | Integrated circuit front-end verification method |
CN102622471B (en) * | 2012-02-22 | 2014-07-09 | 山东华芯半导体有限公司 | Integrated circuit front-end verification method |
CN105718661A (en) * | 2016-01-21 | 2016-06-29 | 烽火通信科技股份有限公司 | Universal chip performance verifying device and method |
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