CN102026047A - Method, device and system for transmitting reset signals and rate indication signals - Google Patents
Method, device and system for transmitting reset signals and rate indication signals Download PDFInfo
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- CN102026047A CN102026047A CN2009101619893A CN200910161989A CN102026047A CN 102026047 A CN102026047 A CN 102026047A CN 2009101619893 A CN2009101619893 A CN 2009101619893A CN 200910161989 A CN200910161989 A CN 200910161989A CN 102026047 A CN102026047 A CN 102026047A
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Abstract
The embodiment of the invention discloses a method, a device and a system for transmitting reset signals and rate indication signals and relates to the field of communication. For reducing pins used by optical line terminal (OLT) receiving optical module and the like, the embodiment of the invention adopts a technical scheme that: after receiving a reset signal and a rate indication signal, which are sent by a media access control equipment or superior equipment, a signal multiplexer multiplexes the reset signal and the rate indication signal to generate a multiplex signal and sends the multiplex signal to a signal de-multiplexer; and after receiving the multiplex signal, the signal de-multiplexer de-multiplexes the multiplex signal and restores the resetting signal and rate indication signal from the multiplex signal. The invention is applicable to a passive optical network (PON) system.
Description
Technical field
The present invention relates to the communications field, relate in particular to transfer approach, the Apparatus and system of a kind of reset signal and rate indicator signal.
Background technology
Along with EPON (Ethernet Passive Optical Network, Ethernet passive optical network) and GPON (Gigabit Passive Optical Network, gigabit passive optical network) technology is increasingly mature, operator and communications equipment manufacturer are transferred to the emphasis of technical research on NG-PON (Next Generation Passive Optical Network, the next-generation passive optical network) Study on Technology from existing EPON and GPON.One of problem of research is the how compatible EPON that has disposed or ONU (the Optical Network Unit of GPON in NG-PON, optical network unit), this just needs OLT (the OpticalLine Termination of NG-PON, optical line terminal) not only can receive the signal of the ONU transmission of NG-PON, and can receive the signal of the ONU transmission of EPON or GPON.
The speed of the data that ONU sent of the ONU of NG-PON and EPON or GPON is different, and this just requires the OLT of NG-PON to receive the input signal that function receives different rates.For existing receiver technology, receiver need be adjusted receiver to reach optimum receiver performance according to different input data rates, and this just needs a rate of received data index signal to be provided for the OLT receiver.
In addition, each ONU among the PON inserts by the time division multiple access multiplex mode, make the received signal of OLT have the burst feature, reception for burst, because the signal amplitude and the phase place of each burst packets have nothing in common with each other, make the corresponding different input bag data of OLT receiver will carry out level and timing recovery again.For receiver, level recovers and timing recovery all is a very time-consuming procedure, and the time requirement to level recovery and timing recovery is all very strict in the PON system, at the nanosecond order of magnitude, need to require the OLT receiver between bag, will reset for so tight sequential, otherwise can influence the reception of follow-up signal.
The OLT receiver of NG PON needs receiving velocity index signal and reset signal, but existing OLT receives the pin resource-constrained of optical module and OLT optical assembly wherein (as ROSA (Receiver Optical Sub-Assembly) or BOSA (Bi-directional Optical Sub Assembly)), is difficult to spare two pins transfer rate index signal and reset signal respectively.
Summary of the invention
Embodiments of the invention provide transfer approach, the Apparatus and system of a kind of reset signal and rate indicator signal, can save the pin usage quantity that OLT receives optical module etc.
For achieving the above object, embodiments of the invention adopt following technical scheme:
The transfer approach of a kind of reset signal and rate indicator signal comprises:
Reset signal and rate indicator signal that reception is sent by medium access control equipment or upper layer device;
The reset signal and the rate indicator signal that receive are carried out multiplexing process to generate multiplexed signals;
Send described multiplexed signals to the signal demodulation multiplexer.
A kind of signal multiplexer comprises:
Signal receiving unit is used to receive reset signal and the rate indicator signal that is sent by medium access control equipment or upper layer device;
Signal processing unit, the reset signal and the rate indicator signal that are used for described signal receiving unit is received are carried out multiplexing process to generate multiplexed signals;
Signal transmitting unit is used for sending the multiplexed signals that described signal processing unit generates to the signal demodulation multiplexer.
The transfer approach of a kind of reset signal and rate indicator signal comprises:
The multiplexed signals that reception is sent by signal multiplexer, described multiplexed signals is by reset signal and rate indicator signal is multiplexing forms;
Described multiplexed signals is carried out demultiplexing to be handled to recover described reset signal and rate indicator signal from described multiplexed signals.
A kind of signal demodulation multiplexer comprises:
Signal receiving unit is used to receive the multiplexed signals that is sent by signal multiplexer, and wherein said multiplexed signals is by reset signal and rate indicator signal is multiplexing forms;
The signal recovery unit is used for that the multiplexed signals that described signal receiving unit receives is carried out demultiplexing and handles to recover described reset signal and rate indicator signal from described multiplexed signals.
The transfer system of a kind of reset signal and rate indicator signal,
Comprise medium access control equipment or upper layer device, and signal multiplexer and signal demodulation multiplexer;
Described medium access control equipment or upper layer device are used for the transmission situation according to current data, send reset signal and rate indicator signal to described signal multiplexer;
Described signal multiplexer, be used to receive reset signal and the rate indicator signal that sends by medium access control equipment or upper layer device, the reset signal and the rate indicator signal that receive are carried out multiplexing process with the generation multiplexed signals, and send described multiplexed signals to described signal demodulation multiplexer;
Described signal demodulation multiplexer is used to receive the multiplexed signals that is sent by described signal multiplexer, and described multiplexed signals is carried out demultiplexing handle to recover reset signal and rate indicator signal from described multiplexed signals.
The reset signal that the embodiment of the invention provides and the transfer approach of rate indicator signal, Apparatus and system, utilize single pin to transmit reset signal and rate indicator signal simultaneously by multiplexing mode, can save the pin that transmits these two signals, therefore, can simplify OLT and receive the interface that the many speed of optical module receive control signal when using, can also simplify the quantity of OLT optical assembly (ROSA/BOSA) control pin.
Description of drawings
In order to be illustrated more clearly in the technical scheme of the embodiment of the invention, the accompanying drawing of required use is done an introduction simply in will describing embodiment below, apparently, accompanying drawing in describing below only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
The formation schematic diagram of a kind of reset signal that Fig. 1 provides for the embodiment of the invention and the transfer system of rate indicator signal;
The schematic flow sheet of a kind of reset signal that Fig. 2 provides for the embodiment of the invention and the transfer approach of rate indicator signal;
The circuit theory diagrams of the signal multiplexer that 4 amplitude signals that Fig. 3 provides for the embodiment of the invention are multiplexing;
The circuit theory diagrams of the signal multiplexer that 3 amplitude signals that Fig. 4 provides for the embodiment of the invention are multiplexing;
The schematic diagram that Fig. 5 provides for the embodiment of the invention at the signal multiplexer of multiplexing reset signal in sequential territory and rate indicator signal;
The schematic flow sheet of the another kind of reset signal that Fig. 6 provides for inventive embodiments and the transfer approach of rate indicator signal;
The circuit theory diagrams of the signal demodulation multiplexer that 4 amplitude signals that Fig. 7 provides for the embodiment of the invention are multiplexing;
The circuit theory diagrams of the signal demodulation multiplexer that 3 amplitude signals that Fig. 8 provides for the embodiment of the invention are multiplexing;
The schematic diagram that Fig. 9 provides for the embodiment of the invention at the signal demodulation multiplexer of multiplexing reset signal in sequential territory and rate indicator signal;
The formation schematic diagram of a kind of signal multiplexer that Figure 10 provides for inventive embodiments;
The formation schematic diagram of a kind of signal demodulation multiplexer that Figure 11 provides for inventive embodiments.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the invention, the technical scheme in the embodiment of the invention is clearly and completely described, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making the every other embodiment that is obtained under the creative work prerequisite.
In order to save the usage quantity of pins such as OLT optical module, the embodiment of the invention provides the transfer system of a kind of reset signal and rate indicator signal, as shown in Figure 1, comprise medium access control (Media AccessControl, MAC) equipment or upper layer device 101, and signal multiplexer 102 and signal demodulation multiplexer 103.
Described medium access control equipment or upper layer device 101 are used for the transmission situation according to current data, send reset signal and rate indicator signal to described signal multiplexer 102.
Described signal multiplexer 102, be used to receive reset signal and the rate indicator signal that sends by medium access control equipment or upper layer device 101, the reset signal and the rate indicator signal that receive are carried out multiplexing process with the generation multiplexed signals, and send described multiplexed signals to described signal demodulation multiplexer 103.
Described signal demodulation multiplexer 103 is used to receive the multiplexed signals that is sent by described signal multiplexer 102, and described multiplexed signals is carried out demultiplexing handle to recover reset signal and rate indicator signal from described multiplexed signals.
In the present embodiment, can be at the described signal demodulation multiplexer 103 of optical assembly (ROSA/BOSA) internal configurations, and, can also receive the inside of optical module and at the described signal demodulation multiplexer 103 of optical assembly (ROSA/BOSA) exterior arrangement at OLT.
In the transfer system of described reset signal and rate indicator signal, realize utilizing single pin to transmit reset signal and rate indicator signal simultaneously by multiplexing mode, can save pin, therefore, the interface that the many speed of OLT optical module receive control signal when using can be simplified, the quantity of OLT optical assembly (ROSA/BOSA) control pin can also be simplified.
As shown in Figure 2, in the transfer system of above-described reset signal and rate indicator signal, the reset signal that the signal multiplexer employing embodiment of the invention provides and the transfer approach of rate indicator signal, the step that sends reset signal and rate indicator signal comprises:
201, signal multiplexer receives reset signal and the rate indicator signal that is sent by medium access control equipment or upper layer device.
202, signal multiplexer carries out multiplexing process to generate multiplexed signals to the reset signal and the rate indicator signal that receive.Particularly, in the method that present embodiment provides, signal multiplexer can be multiplexing or the sequential territory is multiplexing by described reset signal and rate indicator signal being carried out the amplitude territory, thereby generate corresponding multiplexed signals.
203, signal multiplexer sends described multiplexed signals to described signal demodulation multiplexer, so that the signal demodulation multiplexer can be handled by described multiplexed signals being carried out demultiplexing, recovers described reset signal and rate indicator signal.
In embodiments of the present invention, reset signal and rate indicator signal that signal multiplexer receives are essentially two amplitude signals, and promptly reset signal and rate indicator signal comprise " 0 " and " 1 " two range values.For example, the range value of reset signal is 0 o'clock, and the expression reset signal is invalid; The range value of reset signal is 1 o'clock, and the expression reset signal is effective; The range value of rate indicator signal is 1 o'clock, and the indication input data rate is 10G; The range value of rate indicator signal is 0 o'clock, and the indication input data rate is 1G.In addition, can also exchange the range value 0 and the 1 pairing implication of reset signal and rate indicator signal.And the input data rate value of rate indicator signal indication is not limited to 1G or 10G, can also be other values.
First kind of mode, signal amplitude territory are multiplexing
The signal amplitude territory is multiplexing to change into several value signals with reset signal and rate indicator signal by coding exactly.Along with signal can increase with the range value number, the information that can transmit on the single holding wire also increases thereupon.In the present embodiment, reset signal and rate indicator signal can be multiplexed into 3 amplitude signals, 4 amplitude signals and even several value signals more.
Respectively with reset signal with rate indicator signal is multiplexed into 4 amplitude signals and 3 amplitude signals are example, the implementation method multiplexing to the signal amplitude territory is elaborated below.
Fig. 3 is the circuit theory diagrams of the multiplexing signal multiplexer of 4 amplitude signals.Described signal multiplexer comprises first current source 301, second current source 302, first electronic switch 303, quadrielectron switch 304, divider resistance 305 and output (not indicating).Wherein, divider resistance 305 1 terminations are received supply voltage VDD, and the other end is connected to described output, and is connected to described first current source 301 and second current source 302 by described first electronic switch 303 and second electronic switch 304 respectively.And the control end of described first electronic switch 303 and second electronic switch 304 receives described reset signal and rate indicator signal respectively.
By the foregoing circuit structure, reset signal can be by first electronic switch, 303 controls, first current source 301, and rate indicator signal can be by second electronic switch, 304 controls, second current source 302, modulate the voltage on the divider resistance 305 thus, and then the voltage magnitude of the multiplexed signals of adjusting output output, the amplitude of promptly regulating multiplexed signals.
In specific embodiment, the current value of current source 301 can be 2I, and the current value of current source 302 can be I, and the resistance value of resistance 305 is R, and I * R=VDD/4, and VDD is a supply voltage.Can be according to the corresponding relation shown in the following table, obtain the multiplexed signals of respective amplitude by the amplitude of the amplitude of reset signal and rate indicator signal.
| Reset signal | Rate indicator signal | Multiplexed signals |
| 0 | 0 | VDD |
| 0 | 1 | (3/4)×VDD |
| 1 | 0 | (2/4)×VDD |
| 1 | 1 | (1/4)×VDD |
As seen from the above table, range value in reset signal and rate indicator signal is 0, be that the invalid and rate indicator signal of reset signal indication input data rate is when being 1G, electronic switch 303 and 304 all disconnects, the current value of divider resistance 305 of flowing through is 0, therefore, the voltage of described divider resistance 305 carryings is 0, and the amplitude of the multiplexed signals of output is VDD.
The range value of reset signal be 0 and the range value of rate indicator signal be 1, be that the invalid and rate indicator signal of reset signal indication input data rate is when being 10G, first electronic switch 303 disconnects, second electronic switch, 304 closures, the current value of divider resistance 305 of flowing through is I, therefore, the voltage of described divider resistance 305 carryings is I * R=(1/4) * VDD, and the amplitude of the multiplexed signals of output is (3/4) * VDD.
The range value of reset signal be 1 and the range value of rate indicator signal be 0, be reset signal effectively and rate indicator signal indication input data rate when being 1G, first electronic switch, 303 closures, second electronic switch 304 disconnects, the current value of divider resistance 305 of flowing through is 2I, therefore, the voltage of described divider resistance 305 carryings is 2I * R=(2/4) * VDD, and the amplitude of the multiplexed signals of output is (3/4) * VDD.
Range value in reset signal and rate indicator signal is 1, be reset signal effectively and rate indicator signal indication input data rate when being 10G, electronic switch 303 and 304 is all closed, the current value of divider resistance 305 of flowing through is 3I, therefore, the voltage of described divider resistance 305 carryings is 3I * R=(3/4) * VDD, and the amplitude of the multiplexed signals of output is (1/4) * VDD.
Be to be understood that, above example is a kind of specific embodiment, in other alternate embodiments, the reset signal and the rate indicator signal that can also exchange table are newly shown, and, obtain the multiplexed signals of respective amplitude by the amplitude of the amplitude of reset signal and rate indicator signal according to the corresponding relation shown in the new table.
Thus, described signal multiplexer just can be multiplexed into reset signal and rate indicator signal the signal of one 4 amplitude, and each amplitude is represented a kind of state of a described reset signal and a speed index signal respectively.
Fig. 4 is the circuit theory diagrams of the multiplexing signal multiplexer of 3 amplitude signals.
Described signal multiplexer comprises logical operation circuit 400, first electronic switch 401, second electronic switch 402, first current source 403, second current source 404, pull-up resistor 405, pull down resistor 406 and output.Wherein, described first current source 403 and second current source 404 are connected to described output by described first electronic switch 401 and second electronic switch 402 respectively.Described output receives supply voltage VDD by described pull-up resistor 405 on the one hand, on the other hand by described pull down resistor 406 ground connection.And, 400 pairs of reset signals of described logical operation circuit and rate indicator signal are handled through logical operation, generate first control signal and second control signal, and the control end that exports described first electronic switch 401 and second electronic switch 402 respectively to is to control its on off state.Particularly, described logical operation circuit 400 can comprise first NOR gate 407, second NOR gate 409 and not gate 408.Reset signal provides simultaneously to one of them logic input terminal of described first NOR gate 407 and described second NOR gate 409; Rate indicator signal provides to another logic input terminal of described first NOR gate 407 by described not gate 408 on the one hand, provides on the other hand to another logic input terminal of described second NOR gate 409.And the logic output terminal of described first NOR gate 407 and second NOR gate 409 is respectively applied for the control end that described first control signal and second control signal is exported to described first electronic switch 401 and second electronic switch 402.
By the foregoing circuit structure, when reset signal effectively when (being that its amplitude is " 1 "), no matter the range value of rate indicator signal is 0 or 1, result reset signal and rate indicator signal or non-(being described second control signal), reset signal and reverse rate index signal or non-result (being described first control signal) be 0, controlling first electronic switch 401 of first current source 403 and second electronic switch 402 of control second current source 404 all disconnects, the identical resistance 405 and 406 (or other partial pressure devices) of resistance value this moment carries out dividing potential drop to supply voltage VDD respectively, the amplitude of the multiplexed signals that obtains at described output is generally VDD/2 thus.
When reset signal invalid (be its amplitude for " 0 "), the amplitude of multiplexed signals is determined by rate indicator signal, if the range value of rate indicator signal is 1 o'clock, reset signal and reverse rate index signal or non-result (being described first control signal) be 1, control first electronic switch, 401 closures of first current source 403, result reset signal and rate indicator signal or non-(being described second control signal) is 0, and second electronic switch 402 of controlling second current source 404 disconnects.The electric current that is provided by first current source 403 pull down resistor 406 of flowing through makes the multiplexed signals of output output have higher amplitude, as the multiplexed signals of range value greater than (2/3) * VDD thus.
If reset signal is invalid, and the range value of rate indicator signal is 0 o'clock, reset signal and reverse rate index signal or non-result (being described first control signal) be 0, first electronic switch 401 of controlling first current source 403 disconnects, result reset signal and rate indicator signal or non-(being described second control signal) is 1, controls second electronic switch, 402 closures of second current source 404.Under the shunting action of second current source 404, the multiplexed signals of output output has lower amplitude, as the multiplexed signals of range value less than (1/3) * VDD.
The second way, signal sequence territory are multiplexing
Fig. 5 is the schematic diagram at the signal multiplexer of multiplexing reset signal in sequential territory and rate indicator signal.Signal multiplexer 501 is when determining that according to the amplitude of reset signal reset signal is effective, and output comprises the signal of hopping edge, and this signal that comprises the hopping edge is multiplexed signals, for example, and output " 01 " or " 10 ".Signal multiplexer 501 is determining that according to the amplitude of reset signal reset signal is invalid, and when determining that according to the amplitude of rate indicator signal rate indicator signal indication input data rate is 10G, export the signal of long-time high level, this high level signal is multiplexed signals, for example output " 11 ".Signal multiplexer 501 is determining that according to the amplitude of reset signal reset signal is invalid, and when determining that according to the amplitude of rate indicator signal rate indicator signal indication input data rate is 1G, export long-time low level signal, this low level signal is multiplexed signals, for example output " 00 ".
In the transfer approach of described reset signal and rate indicator signal, signal multiplexer utilizes single pin to send reset signal and rate indicator signal simultaneously by multiplexing mode, can save the pin that transmits these two signals, therefore, the interface that the many speed of OLT optical module receive control signal when using can be simplified, the quantity of OLT optical assembly (ROSA/BOSA) control pin can also be simplified.
As shown in Figure 6, in the transfer system of above-described reset signal and rate indicator signal, the reset signal that the signal demodulation multiplexer employing embodiment of the invention provides and the transfer approach of rate indicator signal, the step that receives reset signal and rate indicator signal comprises:
601, the signal demodulation multiplexer receives the multiplexed signals that is sent by signal multiplexer, and described multiplexed signals is by reset signal and rate indicator signal is multiplexing forms;
602, the signal demodulation multiplexer carries out the demultiplexing processing to recover described reset signal and rate indicator signal from described multiplexed signals to described multiplexed signals.
The dual mode that reset signal and rate indicator signal can be described by above embodiment is at least realized multiplexing: the signal amplitude territory is multiplexing and the signal sequence territory is multiplexing.Accordingly, described signal demodulation multiplexer can recover reset signal and rate indicator signal by signal amplitude territory demultiplexing and signal sequence territory demultiplexing dual mode at least from described multiplexed signals.
First kind of mode, signal amplitude territory demultiplexing
Fig. 7 is the circuit theory diagrams of the multiplexing signal demodulation multiplexer of 4 amplitude signals.Described signal demodulation multiplexer is corresponding to signal multiplexer shown in Figure 3, it mainly comprises comparator 701,702 and 703, and the positive input of comparator 701,702,703 all receives the multiplexed signals of signal multiplexer output shown in Figure 3, and reverse input end receives reference voltage (7/8) * VDD, (5/8) * VDD, (3/8) * VDD respectively.Can the multiplexed signals of input be quantized by comparator 701,702 and 703, obtain signal B0, B1 and B2.In addition, can also introduce a little sluggishness in the comparator to strengthen noise robustness.
For example, can recover reset signal and rate indicator signal by signal B0, B1 and B2 after quantizing according to the corresponding relation shown in the following table.
| B0 | B1 | B2 | Reset signal | Rate indicator signal |
| 1 | 1 | 1 | 0 | 0 |
| 1 | 1 | 0 | 0 | 1 |
| 1 | 0 | 0 | 1 | 0 |
| 0 | 0 | 0 | 1 | 1 |
As seen from the above table, if the range value of multiplexed signals is greater than (7/8) * VDD, then the range value of signal B0, B1 and B2 is 1, show that reset signal is invalid, rate indicator signal indication input data rate is 1G, recovers range value and be 0 reset signal and range value and be 0 rate indicator signal.
If the range value of multiplexed signals is between (5/8) * VDD and (7/8) * VDD, then the range value of signal B0 and B1 is 1, the range value of signal B2 is 0, show that reset signal is invalid, rate indicator signal indication input data rate is 10G, recovers range value and be 0 reset signal and range value and be 1 rate indicator signal.
If the range value of multiplexed signals is between (3/8) * VDD and (5/8) * VDD, then the range value of signal B0 is 1, the range value of signal B1 and B2 is 0, show reset signal effectively, rate indicator signal indication input data rate is 1G, recovers range value and be 1 reset signal and range value and be 0 rate indicator signal.
If the range value of multiplexed signals is less than (3/8) * VDD, then the range value of signal B0, B1 and B2 is 0, show reset signal effectively, rate indicator signal indication input data rate is 10G, recovers range value and be 1 reset signal and range value and be 1 rate indicator signal.
Fig. 8 is the circuit theory diagrams of the multiplexing signal demodulation multiplexer of 3 amplitude signals.Described signal demodulation multiplexer is corresponding to signal multiplexer shown in Figure 4, it comprises comparator 801 and 802, and the positive input of comparator 801,802 all receives the multiplexed signals of signal multiplexer output shown in Figure 4, and reverse input end receives reference voltage (2/3) * VDD, (1/3) * VDD respectively.Multiplexed signals by comparator 801 and 802 pairs of inputs quantizes, and obtains signal B0 and B1.In addition, can also introduce a little sluggishness in the comparator to strengthen noise robustness.If the range value of multiplexed signals is between (1/3) * VDD and (2/3) * VDD, then the range value of signal B0 is 1, and the range value of B1 is 0, shows that reset signal is effective, recovers range value and be 1 reset signal.If the range value of multiplexed signals is greater than (2/3) * VDD, then the range value of signal B0 and B1 is 1, shows that rate indicator signal indication input data rate is 10G, recovers range value and be 1 rate indicator signal.If the range value of multiplexed signals is less than (1/3) * VDD, then the range value of signal B0 and B1 is 0, shows that rate indicator signal indication input data rate is 1G, recovers range value and be 1 rate indicator signal.
The second way, signal sequence territory demultiplexing
Fig. 9 is the basic circuit diagram at the signal demodulation multiplexer of multiplexing reset signal in sequential territory and rate indicator signal.Described signal demodulation multiplexer is corresponding to signal multiplexer shown in Figure 5, and it comprises comparator 901, and the positive input of comparator 901 receives the multiplexed signals of signal multiplexer output shown in Figure 5, and reverse input end receives reference voltage (1/2) * VDD.Comparator 901 is used for the detection rates index signal.When the amplitude that detects multiplexed signals when comparator 901 was 1, expression rate indicator signal indication input data rate was 10G, and it is 1 rate indicator signal that comparator 901 recovers range value.When the amplitude that detects multiplexed signals when comparator 901 was 0, expression rate indicator signal indication input data rate was 1G, and it is 0 rate indicator signal that comparator 901 recovers range value.
The signal demodulation multiplexer also comprises edge detection module 902 and pulse stretching module 903, edge detection module 902 and pulse stretching module 903 common formation reset signal test sections.Whether the multiplexed signals that edge detection module 902 detects input comprises the hopping edge, if detecting, edge detection module 902 comprises the hopping edge in the multiplexed signals, then pulse stretching module 903 to needed pulse duration, recovers reset signal with this multiplexed signals broadening.
In the transfer approach of described reset signal and rate indicator signal, the signal demodulation multiplexer utilizes single pin to receive reset signal and rate indicator signal simultaneously by multiplexing mode, can save pin, therefore, the interface that the many speed of OLT optical module receive control signal when using can be simplified, the quantity of OLT optical assembly (ROSA/BOSA) control pin can also be simplified.
As shown in figure 10, in the transfer system of above-described reset signal and rate indicator signal, signal multiplexer comprises:
Signal receiving unit 1001 is used to receive reset signal and the rate indicator signal that is sent by medium access control equipment or upper layer device;
Signal transmitting unit 1003 is used for sending the multiplexed signals that described signal processing unit 1002 generates to the signal demodulation multiplexer.
Further, when described signal processing unit 1002 adopted amplitude territory multiplex mode to carry out multiplexing process, it can specifically comprise:
The amplitude determination module is used for determining the amplitude of described reset signal and the amplitude of described rate indicator signal;
The signal generation module is used for the signal amplitude definite according to described amplitude determination module, generates the multiplexed signals of respective amplitude.
In this case, the physical circuit of described signal processing unit 1002 is realized consulting Fig. 4 or Fig. 5.
When described signal processing unit 1002 adopted sequential territory multiplex mode to carry out multiplexing process, it can specifically comprise:
Detection module is used to detect the amplitude of described reset signal to judge whether it is effective;
Hopping edge signal generation module is used for when described reset signal is effective, generates to comprise the signal of hopping edge as multiplexed signals;
The range signal generation module is used for when described reset signal is invalid, generates the multiplexed signals of respective amplitude according to the amplitude of described rate indicator signal.
In this case, the physical circuit of described signal processing unit 1002 is realized consulting Fig. 6.
In the present embodiment, signal multiplexer utilizes single pin to send reset signal and rate indicator signal simultaneously by multiplexing mode, can save pin, therefore, the interface that the many speed of OLT optical module receive control signal when using can be simplified, the quantity of OLT optical assembly (ROSA/BOSA) control pin can also be simplified.
As shown in figure 11, in the transfer system of above-described reset signal and rate indicator signal, the signal demodulation multiplexer comprises:
Signal receiving unit 1101 is used to receive the multiplexed signals that is sent by signal multiplexer, and wherein said multiplexed signals can be multiplexing or the signal sequence territory is multiplexing obtains by reset signal and rate indicator signal being carried out the signal amplitude territory;
Signal recovery unit 1102 is used for that the multiplexed signals that described signal receiving unit 1101 receives is carried out demultiplexing and handles to recover described reset signal and rate indicator signal from described multiplexed signals.
Wherein, described signal recovery unit 1102 can recover reset signal and rate indicator signal by signal amplitude territory demultiplexing mode or signal sequence territory demultiplexing mode from described multiplexed signals.
Further, when described signal recovery unit 1102 employing signal amplitude territory demultiplexing modes, it can specifically comprise:
The amplitude detection module is used to detect the amplitude of described multiplexed signals, and exports testing result;
Signal recover module is used for testing result and predefined amplitude corresponding relation according to described amplitude detection module output, recovers reset signal and rate indicator signal.
In this case, the physical circuit of described signal recovery unit 1102 is realized consulting Fig. 7 or Fig. 8.
When described signal recovery unit 1102 employing signal sequence territory demultiplexing modes, it can specifically comprise:
The edge detection module is used to detect described multiplexed signals and whether comprises the hopping edge;
The amplitude detection module is used for detecting its amplitude when described multiplexed signals does not comprise the hopping edge detecting, and recovers rate indicator signal by testing result;
The pulse stretching module is used for when described edge detection module detects described multiplexed signals and comprises the hopping edge described multiplexed signals broadening to the predetermined pulse width, being recovered reset signal.
In this case, the physical circuit of described signal recovery unit 1102 is realized consulting Fig. 9.
In the present embodiment, the signal demodulation multiplexer utilizes single pin to receive reset signal and rate indicator signal simultaneously by multiplexing mode, can save pin, therefore, the interface that the many speed of OLT optical module receive control signal when using can be simplified, the quantity of OLT optical assembly (ROSA/BOSA) control pin can also be simplified.
One of ordinary skill in the art will appreciate that all or part of flow process that realizes in the foregoing description method, be to instruct relevant hardware to finish by computer program, described program can be stored in the computer read/write memory medium, this program can comprise the flow process as the embodiment of above-mentioned each side method when carrying out.Wherein, described storage medium can be magnetic disc, CD, read-only storage memory body (Read-Only Memory, ROM) or at random store memory body (Random Access Memory, RAM) etc.
The above; only be the specific embodiment of the present invention, but protection scope of the present invention is not limited thereto, anyly is familiar with those skilled in the art in the technical scope that the present invention discloses; can expect easily changing or replacing, all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection range of claim.
Claims (13)
1. the transfer approach of reset signal and rate indicator signal is characterized in that, comprising:
Reset signal and rate indicator signal that reception is sent by medium access control equipment or upper layer device;
The reset signal and the rate indicator signal that receive are carried out multiplexing process to generate multiplexed signals;
Send described multiplexed signals to the signal demodulation multiplexer.
2. the transfer approach of reset signal according to claim 1 and rate indicator signal is characterized in that, the step of described generation multiplexed signals comprises:
Determine the amplitude of described reset signal and the amplitude of described rate indicator signal;
According to the amplitude of described reset signal and the amplitude of described rate indicator signal, generate the multiplexed signals of respective amplitude.
3. the transfer approach of reset signal according to claim 1 and rate indicator signal is characterized in that, the step of described generation multiplexed signals comprises:
The amplitude that detects described reset signal is to judge whether it is effective;
When described reset signal is effective, generate comprise the signal of hopping edge and with it as multiplexed signals; When described reset signal is invalid, generate the multiplexed signals of respective amplitude according to the amplitude of described rate indicator signal.
4. the transfer approach of reset signal and rate indicator signal is characterized in that, comprising:
The multiplexed signals that reception is sent by signal multiplexer, described multiplexed signals is by reset signal and rate indicator signal is multiplexing forms;
Described multiplexed signals is carried out demultiplexing to be handled to recover described reset signal and rate indicator signal from described multiplexed signals.
5. the transfer approach of reset signal according to claim 4 and rate indicator signal is characterized in that, describedly multiplexed signals is carried out the step that demultiplexing handles comprises:
Determine the amplitude of described multiplexed signals;
Amplitude and predefined amplitude corresponding relation according to described multiplexed signals recover described reset signal and rate indicator signal.
6. the transfer approach of reset signal according to claim 4 and rate indicator signal is characterized in that, describedly multiplexed signals is carried out the step that demultiplexing handles comprises:
Detect described multiplexed signals and whether comprise the hopping edge;
When described multiplexed signals comprises the hopping edge, described multiplexed signals broadening is arrived the predetermined pulse width, to recover reset signal;
When described multiplexed signals does not comprise the hopping edge, recover rate indicator signal according to the amplitude of described multiplexed signals.
7. a signal multiplexer is characterized in that, comprising:
Signal receiving unit is used to receive reset signal and the rate indicator signal that is sent by medium access control equipment or upper layer device;
Signal processing unit, the reset signal and the rate indicator signal that are used for described signal receiving unit is received are carried out multiplexing process to generate multiplexed signals;
Signal transmitting unit is used for sending the multiplexed signals that described signal processing unit generates to the signal demodulation multiplexer.
8. signal multiplexer according to claim 7 is characterized in that, described signal processing unit comprises:
The amplitude determination module is used for determining the amplitude of described reset signal and the amplitude of described rate indicator signal;
The signal generation module is used for the signal amplitude definite according to described amplitude determination module, generates the multiplexed signals of respective amplitude.
9. signal multiplexer according to claim 7 is characterized in that, described signal processing unit comprises:
Detection module is used to detect the amplitude of described reset signal to judge whether it is effective;
Hopping edge signal generation module is used for when described reset signal is effective, generates to comprise the signal of hopping edge as multiplexed signals;
The range signal generation module is used for when described reset signal is invalid, generates the multiplexed signals of respective amplitude according to the amplitude of described rate indicator signal.
10. a signal demodulation multiplexer is characterized in that, comprising:
Signal receiving unit is used to receive the multiplexed signals that is sent by signal multiplexer, and wherein said multiplexed signals is by reset signal and rate indicator signal is multiplexing forms;
The signal recovery unit is used for that the multiplexed signals that described signal receiving unit receives is carried out demultiplexing and handles to recover described reset signal and rate indicator signal from described multiplexed signals.
11. signal demodulation multiplexer according to claim 10 is characterized in that, described signal recovery unit comprises:
The amplitude detection module is used to detect the amplitude of described multiplexed signals, and exports testing result;
Signal recover module is used for testing result and predefined amplitude corresponding relation according to described amplitude detection module output, recovers reset signal and rate indicator signal.
12. signal demodulation multiplexer according to claim 10 is characterized in that, described signal recovery unit comprises:
The edge detection module is used to detect described multiplexed signals and whether comprises the hopping edge;
The amplitude detection module is used for detecting its amplitude when described multiplexed signals does not comprise the hopping edge detecting, and recovers rate indicator signal by testing result;
The pulse stretching module is used for when described edge detection module detects described multiplexed signals and comprises the hopping edge described multiplexed signals broadening to the predetermined pulse width, being recovered reset signal.
13. the transfer system of reset signal and rate indicator signal is characterized in that, comprises medium access control equipment or upper layer device, and signal multiplexer and signal demodulation multiplexer;
Described medium access control equipment or upper layer device are used for the transmission situation according to current data, send reset signal and rate indicator signal to described signal multiplexer;
Described signal multiplexer, be used to receive reset signal and the rate indicator signal that sends by medium access control equipment or upper layer device, the reset signal and the rate indicator signal that receive are carried out multiplexing process with the generation multiplexed signals, and send described multiplexed signals to described signal demodulation multiplexer;
Described signal demodulation multiplexer is used to receive the multiplexed signals that is sent by described signal multiplexer, and described multiplexed signals is carried out demultiplexing handle to recover reset signal and rate indicator signal from described multiplexed signals.
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| CN2009101619893A CN102026047A (en) | 2009-09-10 | 2009-09-10 | Method, device and system for transmitting reset signals and rate indication signals |
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| CN2009101619893A CN102026047A (en) | 2009-09-10 | 2009-09-10 | Method, device and system for transmitting reset signals and rate indication signals |
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| CN2009101619893A Pending CN102026047A (en) | 2009-09-10 | 2009-09-10 | Method, device and system for transmitting reset signals and rate indication signals |
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Application publication date: 20110420 |