CN102024067A - Method for technology transplant of analog circuit - Google Patents
Method for technology transplant of analog circuit Download PDFInfo
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- CN102024067A CN102024067A CN2009100928828A CN200910092882A CN102024067A CN 102024067 A CN102024067 A CN 102024067A CN 2009100928828 A CN2009100928828 A CN 2009100928828A CN 200910092882 A CN200910092882 A CN 200910092882A CN 102024067 A CN102024067 A CN 102024067A
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Abstract
The present invention discloses a method for the technology transplant of an analog circuit, wherein the method comprises: receiving the data assigned by a user in the form of graphical interface or command line; analyzing and dividing the data based on the circuit functions of analog circuit function structure characteristic database to generate a new hierarchical design based on functions; generating constraint conditions based on the function structure characteristics; generating a test circuit based on the test circuit template database of the analog circuit function performance indexes; generating measure instructions based on the measure instruction template database of analog circuit function performance indexes; calculating the performance index values by using the performance index value test circuit and the measure instructions; mapping the original technology to the object technology by using the hierarchical design based on functions; performing the parallel optimization of the object circuit from bottom to top by using the independence between the hierarchical design units based on functions; and outputting the optimized hierarchical circuit design netlist based on functions under the object technology. An analog circuit having been designed under a technology is automatically optimized to an analog circuit in which the circuit performance index values accord with the requirement under another technology by utilizing the invention.
Description
Technical field
The present invention relates generally to electric design automation (EDA) software technology field, especially a kind of method under another integrated circuit technology (target process) is transplanted in Analogous Integrated Electronic Circuits under the integrated circuit technology (former technology) design.
Background technology
Through a series of processing, the process that is optimized for the integrated circuit under the target process abbreviates process transplanting as with the integrated circuit under the former technology.Fortunately, process transplanting is used for many years in Design of Digital Circuit.Though process transplanting is ripe especially in Design of Digital Circuit, for Analog Circuit Design, the process transplanting robotization still is in the starting stage.In the prior art, the mimic channel process transplanting is mainly finished by SPICE (integrated circuit simulating program) by circuit designer.As research in advance, adopted some optimization tools to accelerate process transplanting, some in them are utilized circuit simulation and simulated annealing method, and other utilize circuit equation to add the method for genetic planning and protruding optimization.
There are some shortcomings in traditional mimic channel process transplanting method: entire circuit is regarded as a huge problem to be solved make optimization become complicated; The speed of finding the solution becomes the ultralinear relation with the scale of circuit, so the scale of mimic channel has been limited in process transplanting; The user needs the input constraint condition just can obtain satisfied separating.
In order to overcome these shortcomings, be necessary big mimic channel optimization problem is divided into some independently little optimization problems, reduce the complicacy that mimic channel is optimized, thereby make it near linear problem, automatically produce the constraint condition of circuit optimization, further reduce the complexity of circuit optimization problem, correctly divide circuit and make optimization problem can access parallel processing.
In these areas, the method of the mimic channel process transplanting that the present invention proposes is very different with traditional concept and design in the former technology, the result who does has like this provided methodology and tissue, the architectural feature that mainly is based on the mimic channel functional unit is carried out circuit analysis and is divided hierarchical structure and the generative circuit optimization constraint condition that produces based on function, performance index item according to circuit function generates test circuit and measures instruction, further calculate the over-all properties desired value of each functional circuit, to shine upon to target process from former technology based on the circuit design of the stratification formula of function, to carry out circuit optimization from bottom to top based on the hierarchy type circuit design of function.Because the process transplanting problem is decomposed into some independently problems effectively, parallel computing can fully be used to accelerate the process transplanting process at this.
Summary of the invention
(1) technical matters that will solve
Consider the intrinsic shortcoming of mimic channel process transplanting method of known type, the invention provides the method for the automatic simulation circuit technology transplanting that comprises parallel computation, this method mainly is based on the architectural feature of mimic channel functional unit and carries out circuit analysis and division, generation is based on the hierarchical structure of function, and generative circuit is optimized constraint condition, performance index item according to circuit function generates test circuit and measures instruction, further calculate the over-all properties desired value of each functional circuit, to shine upon to target process from former technology based on the circuit design of the stratification formula of function, to carry out circuit optimization from bottom to top based on the hierarchy type circuit design of function.
In the present invention, because the process transplanting problem is decomposed into some independently problems effectively, parallel computing can fully be used to accelerate the process transplanting process at this.
General objects of the present invention is for circuit design automated method in the mimic channel process transplanting is provided, at least comprise automatic circuit analysis and the technology of dividing with the circuit design of recombinating based on function stratification formula ground based on mimic channel functional structure feature, constraint condition generates automatically, test circuit generates automatically, measuring instruction automatically generates, performance index value calculates automatically, the automatic mapping of circuit from former technology to target process, automatic circuit optimization, circuit parallel is optimized, and the deeper combination of these features, this makes automatic mimic channel process transplanting have the advantage that above-mentioned mimic channel process transplanting is had, and new feature is arranged, this is that former mimic channel process transplanting can't be expected and abundant enforcement, or even can't imply, no matter be a kind of or their combination in any wherein.
(2) technical scheme
For achieving the above object, the invention provides a kind of method of mimic channel process transplanting, this method comprises:
Receive the user by graphical interfaces or order line form data designated, these data comprise the circuit meshwork list under the former technology at least, the model card of former technology, the model card of target process, former technology is to the PCell mapping and the PCell parameter maps of target process, and model mapping (enum) data from former technology to target process, based on mimic channel function moral architectural feature storehouse, performance index item tabulation based on the mimic channel function, based on mimic channel function moral character energy index item test circuit template base, can measure the instruction template storehouse by index item based on mimic channel function moral character, and power supply and earth mat circuit-switched data;
Based on the circuit function analysis and the division of mimic channel functional structure feature database, to produce design based on the new stratification formula of function;
Produce constraint condition based on the functional structure feature;
Test circuit template base based on mimic channel functional performance index item generates test circuit;
Measurement instruction template storehouse based on mimic channel functional performance index item generates the measurement instruction;
Utilizing performance index value test circuit and measurement instruction to carry out performance index value calculates;
To be mapped to target process from former technology based on the design of function moral stratification formula;
Utilization is based on the parallel optimization objective circuit from bottom to top of the independence between the stratification design cell of function; And
Circuit design net table under the export target technology based on the stratification of the optimization of function.
In the such scheme, describedly carry out circuit function analysis and division,, comprising to generate step based on the design of the new stratification formula of function based on mimic channel functional structure feature templates storehouse:
Receive the input data, these input data comprise circuit meshwork list under the former technology at least, based on the template base of mimic channel functional structure feature, the model card of former technology, and electric former and zone network;
Pre-service input net table;
Follow the trail of direct current path and signal path;
Function isomorphism according to architectural feature template base check circuit;
Carry out that circuit is divided and based on the reconstruct design of functional hierarchyization ground according to the function isomorphism;
Produce the constraint condition of circuit optimization according to the functional structure feature; And
Output is based on the design of the stratification formula of function, menu and constraint condition table.
In the such scheme, described test circuit template base based on mimic channel functional performance index item generates the step of test circuit, comprising:
Receive the input data, these data comprise under the former technology at least based on the design of the stratification formula of function, the menu of design, and based on the performance index item test circuit template base of function;
Search the function of subelement;
The performance index item of locating function;
Search the test circuit template of performance index item;
Produce the test circuit of performance index item; And
Output test circuit table.
In the such scheme, described measurement instruction template storehouse based on mimic channel functional performance index item generates the step of measuring instruction, comprising:
Receive data: based on design, the circuit function table of the stratification formula of function, and based on the measurement instruction template storehouse of mimic channel functional performance index item;
Search the function of subelement;
The performance index item of locating function;
Search the measurement instruction template of performance index item;
Produce the measurement instruction of performance index item; And
Instruction list is measured in output.
In the such scheme, described test circuit template base based on mimic channel functional performance index item generates test circuit and described measurement instruction template storehouse generation measurement instruction based on mimic channel functional performance index item, by the computer cluster executed in parallel in the network.
In the such scheme, the described step of utilizing performance index value test circuit and measurement instruction to carry out performance index value calculating comprises:
Receive data, these data comprise function design, test platform table and the test instruction table based on level at least;
Produce circuit simulation net table;
Circuit meshwork list emulation;
Carry out and measure; And
Output performance desired value table.
In the such scheme, the described performance index value test circuit that utilizes carries out performance index value calculating with measuring to instruct, and reaches executed in parallel by different level by the computer cluster in the network.
In the such scheme, describedly will be mapped to the step of target process from former technology, comprise based on the design of function moral stratification formula:
Receive data, these data comprise under the former technology at least based on PCell mapping and PCell parameter maps, the model card of target process and the model card of former technology between model mapping, former technology and the target process between design, former technology and the target process of the stratification formula of function;
Copy under the former technology design based on the stratification formula of function;
Replace the model card name of former technology with target process model card name according to the mapping of the model between former technology and the target process;
Determine the PCell parameter value of target process;
Replace PCell name, PCell parameter name and parameter value under the former technology according to the PCell between former technology and target process mapping and PCell parameter maps with the PCell name under the target process, PCell parameter name and parameter value; And
Under the export target technology based on the design of the stratification formula of function.
In the such scheme, described utilization comprises based on the step of the parallel optimization objective circuit from bottom to top of the independence between the stratification design cell of function:
Receive data, these data comprise under the target process based on design, the test circuit table of the stratification formula of function at least, measure instruction list, constraint condition table and performance index value table;
Produce circuit meshwork list;
Executive circuit emulation;
The measurement of execution performance desired value;
Whether the check measurement result satisfies;
Under ungratified situation, revise parameter value and return the executive circuit simulation process;
Under the export target technology based on the design of the stratification formula of the optimization of function.
(3) beneficial effect
From technique scheme as can be seen, the present invention has following beneficial effect:
1, utilize the present invention, because circuit function analysis and the design of division generation based on the new stratification formula of function, according to the independence between the bottom circuit unit, determine the performance index desired value of each bottom circuit unit, the large-scale circuit optimization problem of high complexity changes the small scale in circuitry optimization problem of the low complex degree of some independent or weak associations into, this has improved optimal speed, the circuit optimization problem of these low complex degrees is because its mutual independence or weak relevance make them can utilize abundant computational resource to remove to implement the parallel optimization of a plurality of circuit units simultaneously, this has improved optimal speed from another lattice angle, so this method can improve the speed of mimic channel process transplanting effectively.
2, utilize the present invention, apply to circuit optimization owing to produce constraint condition based on the functional structure feature, dwindled the solution space of optimizing work, avoided the trial of solution trivial effectively, so reduced unnecessary calculating, improve optimal speed, thereby improved the speed of mimic channel process transplanting effectively.
3, utilize the present invention, owing to obtained the function of circuit unit by the circuit function analysis, test circuit template base based on mimic channel functional performance index item generates test circuit, and generate based on the measurement instruction template storehouse of mimic channel functional performance index item and to measure instruction, this determines to provide technical support for the performance index item desired value of circuit unit, the means of evaluation and test also are provided for the optimization of objective circuit unit, support the large-scale circuit optimization problem of high complexity to change the small scale in circuitry optimization problem of low complex degree into from the angle of evaluation and test to reach the purpose that promotes global optimization speed, so this method can improve the speed of mimic channel process transplanting effectively.
4, utilize the present invention, owing to utilize based on the parallel optimization objective circuit from bottom to up of the independence between the stratification design cell of function, the computing machine of multi-core CPU, many CPU and the computational resource of many computing machines on the network can be served a complete Analog Circuit Design process transplanting project simultaneously, so this method can improve the speed of mimic channel process transplanting effectively.
5, utilize the present invention, thereby generating to support obtaining performance index value accurately based on the evaluation and test of the performance index item of accurate circuit simulation because method has adopted test circuit to generate and measured instruction, is accurate so this method can guarantee last circuit optimization result.
6, utilize the present invention, because method adopts the test circuit template base based on mimic channel functional performance index item to generate test circuit, the designer need not manually to determine test circuit for each lattice circuit unit, this has saved the time, this method shortened the design cycle, so can improve the speed of mimic channel process transplanting effectively.
7, utilize the present invention, because method has adopted the measurement instruction template storehouse based on mimic channel functional performance index item to generate the measurement instruction, the designer need not manually to determine to measure instruction for each performance index item of each circuit unit, this has saved the time, this method shortened the design cycle, so can improve the speed of mimic channel process transplanting effectively.
8, utilize the present invention, because method has adopted the mapping (enum) data between the different process PCell, automatically generate the novel circuit under the target process, the designer need not manually to be the novel circuit net table under the generation target process of each circuit unit, this has saved the time, this method shortened the design cycle, so can improve the speed of mimic channel process transplanting effectively.
9, utilize the present invention, because the required constraint condition of circuit optimization when generating each circuit unit process transplanting automatically, the designer need not manual appointment, and this has saved the time, and this has shortened the design cycle, so this method can improve the speed of mimic channel process transplanting effectively.
10, utilize the present invention, because the robotization of each step in the mimic channel process transplanting process has been facilitated mimic channel process transplanting process automation, so this method can improve the speed of mimic channel process transplanting effectively.
11, utilize the present invention, because method has reduced the technical difficulty of Analog Circuit Design process transplanting, and the speed of mimic channel process transplanting is greatly improved, shortened the design cycle, reduced design cost, this method improved the contention of product, so can provide technical support from method for designing for the integrated circuit foundries attracts rival's client.
Description of drawings
In order to understand the present invention more fully, need with reference to the accompanying drawings.What need know is, should not be limited to these charts in the category of the present invention, has narrated the present invention's described concrete application at present with extra details and has understood its best mode by accompanying drawing.
Fig. 1 describes input of Analogous Integrated Electronic Circuits process transplanting and the synoptic diagram of exporting.
Fig. 2 is a process flow diagram of describing the Analogous Integrated Electronic Circuits process transplanting.
Fig. 3 describes to carry out circuit function analysis and division result synoptic diagram based on Analogous Integrated Electronic Circuits functional structure feature templates storehouse.
Fig. 4 describes the synoptic diagram that carries out the input and output of circuit function analysis and division based on Analogous Integrated Electronic Circuits functional structure feature templates storehouse.
Fig. 5 describes the process flow diagram that carries out circuit function analysis and division based on Analogous Integrated Electronic Circuits functional structure feature templates storehouse.
Fig. 6 is the input and output synoptic diagram of describing test circuit generation method in the Analogous Integrated Electronic Circuits process transplanting.
Fig. 7 is a process flow diagram of describing test circuit generation method in the Analogous Integrated Electronic Circuits process transplanting.
Fig. 8 describes the input and output synoptic diagram of measuring instruction generation method in the Analogous Integrated Electronic Circuits process transplanting.
Fig. 9 describes the process flow diagram of measuring instruction generation method in the Analogous Integrated Electronic Circuits process transplanting.
Figure 10 is the input and output synoptic diagram of describing performance index value computing method in the mimic channel process transplanting.
Figure 11 is a process flow diagram of describing performance index value calculating operation method in the mimic channel process transplanting.
Figure 12 be describe in the mimic channel process transplanting will be former based on the stratification design of the function input when former technology is mapped to target process with export synoptic diagram.
Figure 13 describes in the mimic channel process transplanting from the process flow diagram of former stratification design based on function when former technology is mapped to target process.
Figure 14 is the input and output synoptic diagram when describing in the mimic channel process transplanting under target process parallel optimization circuit.
Figure 15 is the process flow diagram when describing in the mimic channel process transplanting under target process parallel optimization circuit.
Figure 16 describes and a concrete synoptic diagram of using corresponding to mimic channel process transplanting computer system of the present invention.
Embodiment
In order to understand details better, also, summarized key character of the present invention here quite widely in order to make this technology better obtain paying attention to.Some other features of the present invention will be described hereinafter.
In this respect, before describing at least one concrete application of the present invention in detail, need know that the present invention is not confined to its application on the layout of CONSTRUCTED SPECIFICATION and assembly, can be set forth in this narration below, perhaps represent with synoptic diagram.The present invention can be competent at other concrete application, and can realize with multiple mode.Simultaneously, word herein and term are in order to describe, should not to be used as a kind of restriction.
In various concrete application, provide a kind of method of automatic mimic channel process transplanting.This method comprises automatic circuit analysis and partitioning technology based on mimic channel functional structure feature, constraint condition generates automatically, test circuit generates automatically, measuring instruction generates automatically, the automatic performance index is calculated, the automatic mapping of circuit from former technology to target process, and automatic circuit optimization.
In concrete the application, in order to carry out the mimic channel process transplanting, computer program is stored in the readable medium of computing machine.Computer program comprises receiving imports data code: the circuit meshwork list under the former technology, the model card of former technology, the model card of target process, PCell mapping and PCell parameter maps between former technology and the target process, and model mapping (enum) data from former technology to target process; Automatically based on the circuit analysis in mimic channel functional structure feature templates storehouse with divide to produce code based on the stratification design of function; Automatically produce the code of constraint condition; Automatically generate the code of test circuit; Automatically generate the code of test instruction; Automatically realize the code that performance index value calculates; Automatically with under the former technology based on the stratification design map of the function code under the target process; The code of automatic paralleling optimization aim circuit; The code of the stratification design circuit net table of optimizing under the automatic export target technology.
In further specifically using, the system that carries out the mimic channel process transplanting has comprised processor and has stored the instruction set that processor moves, and processor receives and comprises former process modeling card during execution, circuit meshwork list under the former technology, target process model card, parameter maps between former technology and the target process between PCell mapping and the PCell, model mapping (enum) data from former technology to target process, based on mimic channel functional structure feature templates storehouse, performance index item tabulation based on function, based on functional performance index item test circuit template base, measure the instruction template storehouse based on the functional performance index item; Circuit analysis based on mimic channel functional structure feature templates storehouse designs with the stratification that division produces based on function; Produce constraint condition; Produce test circuit; Generate and measure instruction; Determine performance index value; The stratification design map is arrived target process; The parallel optimization objective circuit; Target design circuit meshwork list after output is optimized.
For the reader, other targets of the present invention and advantage are conspicuous, and these targets and advantage are the meanings that should have of the present invention.In order to reach relevant target above finishing, adopt form concrete manifestation the present invention of accompanying drawing, should be noted that this fact, these icons only are schematically, may need to change in concrete structure.
Begin to describe in detail process flow diagram of the present invention and synoptic diagram now, assembly like the similar reference word representation class in these figure, accompanying drawing has been set forth the method for mimic channel process transplanting, comprise automatically and carry out circuit function analysis and partitioning technology based on mimic channel functional structure feature templates storehouse, the automatic generation of constraint condition, test circuit generates automatically, measuring instruction generates automatically, circuit under the target process generates automatically, performance index are calculated automatically, the automatic mapping of circuit from former technology to target process, the device size of Automatic Optimal independent circuits unit concurrently.
In the various imbody described herein, provide the method for mimic channel process transplanting.Method comprises PCell mapping and PCell parameter maps between circuit meshwork list, target process model card, former technology and the target process that receives under former process modeling card, the former technology, the model mapping (enum) data from former technology to target process, mimic channel functional structure feature templates storehouse, the tabulation of mimic channel functional performance index item, based on the test circuit template base of mimic channel functional performance index item with measure the instruction template storehouse, and power supply and zone network (optional); Based on carrying out the circuit function analysis and divide in mimic channel functional structure feature templates storehouse to produce new stratification design based on function; Produce constraint condition; Test circuit template based on the performance index item of functional circuit generates test circuit; Generate based on the measurement instruction template of the performance index item of functional circuit and to measure instruction; More according to test circuit and the performance index value of measuring the definite functional circuit unit of instruction; To be mapped to target process from former technology based on the design of the stratification of function; Utilization is based on the parallel optimization objective circuit from bottom to up of the independence between the stratification design cell of function; The stratification circuit design net table of optimizing under the export target technology based on function.
In Fig. 1, the circuit design net table 104 under the former technology, model mapping 106 between former technology and the target process, PCell mapping and PCell parameter maps 108 between former technology and the target process, the model card 110 of target process, former process modeling card 116, architectural feature storehouse 118 based on the mimic channel function, performance index item tabulation 120 based on function, performance index item test circuit template base 122 based on function, performance index item based on function is measured instruction template storehouse 124, and power supply and zone network data 126 (optional) conduct input, Analog Circuit Design process transplanting engine 102 receives the net table, the 112nd, output, under the export target technology based on the stratification design netlist 152 of function.
In Fig. 2, mimic channel process transplanting method 102 comprises the mapping, the model mapping (enum) data from former technology to target process of model card, the mapping of the PCell from former technology to target process and the PCell parameter of the model card that connects former technology, the circuit design net table under the former technology, target process, based on the architectural feature template base of function, based on the performance index item tabulation of function, based on the performance index item test circuit template base of function, measure instruction template storehouse, power supply and zone network data (optional) 202 based on the performance index item of function; Carrying out Di Nalu functional analysis and circuit level based on mimic channel functional structure feature templates storehouse divides with reconstruct based on the new stratification design of function and generate corresponding circuit optimization constraint condition 204; Determine the performance index item 205 of circuit unit based on circuit function; Generate corresponding performance index item test circuit 206 based on the function of circuit unit with based on functional performance index item test circuit template; Measure the performance index item measurement instruction 208 that instruction template generates correspondence based on the function of circuit unit with based on the functional performance index item; Utilize performance index item test circuit and measure the value 210 that corresponding performance index item is determined in instruction; To be mapped to target process 212 from former technology based on the stratification design of function; According to the circuit unit functional independence circuit under the parallel optimization target process from bottom to up, in optimizing iteration, utilize test circuit and measure the command calculations performance index value to judge that whether optimize the result meets 214; The circuit design net table 216. based on the stratification of function of the optimization under the export target technology
In Fig. 3, circuit function analysis and partitioning technology based on mimic channel functional structure feature read in the tabular circuit design net meter file 302 of any net, carrying out circuit function analysis and circuit function divides, (comprised littler submodule 322 further with function sub-modules 312,324,326,328), 314 (have further comprised littler function sub-modules 332,334,336 and 338), 316 (have further comprised littler submodule 342,344,346 and 348), 318 (have further comprised littler submodule 352,354,356 and 358) reconstruct design backform piece 304 on new level, these submodules are based on functions of modules and function combinations.Submodule 322,324,326,328,332,334,336,338,342,344,346,348,352,354,356 and 358 can also further be made up of each little functional unit, if they are not the functional units of the bottom.
In Fig. 4,304 based on the simulation circuit structure feature carry out the circuit function analysis and divide with produce based on the engine 402 of the new hierarchical Design of function the circuit meshwork list under the former technology 404 and based on the template base 406 of mimic channel functional structure feature as input, export that new stratification based on function designs 410, menu 408 and constraint condition table 412.
In Fig. 5, carry out the circuit function analysis based on mimic channel functional structure feature templates storehouse and comprise reception input data: the circuit design net table under former process modeling card, the former technology, architectural feature storehouse, power supply and earth mat circuit-switched data (optionally) 502 based on function with the flow process of dividing to produce based on the new stratification design 304 of function moral; Pre-service input net table 504; Follow the trail of direct current path and signal path 506; Audit function architectural feature isomorphism 508; According to the division of functional hierarchyization ground with new level reconstruct design 510; Produce the constraint condition 512 of circuit optimization; Output is based on new stratification design, menu and the constraint condition table 514. of function
The method operation of the circuit meshwork list 504 of pre-service input comprise identification, the MOSCAP device of merging, the identification of ESD device of the identification of power supply and zone network and the identification of propagation, internal electric source and zone network thereof, device in parallel, pseudo-device identification, determine the attribute of port and inner gauze.
The method operation of following the trail of DC path 506 comprise from positive supply based on such rule propagate until the path that searches out ground or negative supply: MOSFET from drain-to-source or from source electrode to drain electrode, bipolar transistor from the collector to the emitter or from the emitter to the collector, diode from the P utmost point to the N utmost point, resistance and inductance from arbitrary utmost point to another utmost point (all non-substrate utmost point and the control utmost point), in addition can based on same rule from ground or negative supply search out the path on positive supply or ground.From the device of the DC current process that device searched out of same connection positive supply (or negative supply) is device on the same DC channel, and it is in conjunction with being called a DC path.
The operation of the method in trace signals path 506 comprises from signal input part propagates till signal can not be propagated based on such rule: MOSFET is from the grid to the drain electrode and source electrode or from drain-to-source or from the source electrode to the drain electrode, bipolar transistor is from the base stage to the collector and emitter or from the collector to the emitter or from the emitter to the collector, diode from the P utmost point to the N utmost point, resistance and inductance be (all non-substrate utmost point and the control utmost point) from arbitrary utmost point to another utmost point, electric capacity (branch that polarity is arranged) or from a utmost point to another utmost point (the non-substrate utmost point of nonpolarity timesharing and control the utmost point) from the anode to the negative electrode.When signal is propagated by device, if the target utmost point connects power supply or ground, then the extremely corresponding network node of this target no longer adds node table to be propagated, if the target utmost point does not connect power supply or ground, and the extremely corresponding network node of this target does not also join node table to be propagated, and then the network node that this target utmost point is connected joins node table to be propagated.Travel through the node in the node table whole to be propagated, by the regular transmitting signal of front, the device of all transmitting signals and network node constitute signal path.
Audit function architectural feature isomorphism 508 comprises bottom functional structure feature isomorphism and HLF high layer function architectural feature isomorphism.Bottom functional structure feature mainly is divided into functional structure feature on the DC channel, current source/current mirror functional structure feature isomorphism, and the functional structure feature formed of adjacent straight circulation flow path.Functional structure feature on the DC channel is according to dividing DC channel on the basis of following the trail of in DC path, bottom functional structure feature in each DC channel and the mimic channel functional structure feature templates storehouse is carried out the subgraph isomorphism to be calculated, thereby draw the isomorphism degree, and note down, select best-of-breed functionality architectural feature template according to the isomorphism degree at last, with this part circuit of its symbology.Current source/current mirror functional structure feature isomorphism replaces relevant device to be connected with inner according to the current source/current mirror of the current source in the mimic channel functional structure feature templates storehouse/current mirror template search matched in the bottom circuit with the template symbol.The functional structure feature that the adjacent straight circulation flow path is formed mainly is the DC channel that does not have covering at DC channel functional structure feature isomorphism, choosing has the adjacent DC channel of signal transmission to carry out isomorphism relatively with the bottom template that is connected with adjacent straight circulation flow path in the mimic channel functional structure feature templates storehouse, calculate the isomorphism degree, select suitable concrete device and the inner annexation of functional structure feature templates symbolic substitution according to the isomorphism degree.HLF high layer function architectural feature isomorphism is being ignored between detailed device of fabric and the device to such an extent that annexation replaces annexation between this part device of functional character symbolic representation and the device on the basis of bottom functional structure isomorphism inspection, still keep original annexation between the functional structure characteristic symbol, so just constituted a functional structure characteristic symbol net table; The functional structure characteristic symbol of the superiors in the traversal functional structure characteristic symbol net table, carry out the comparison of subgraph isomorphism with the template of quoting this functional structure characteristic symbol in the mimic channel functional structure feature templates storehouse equally, calculate functional structure isomorphism degree, and write down isomorphism symbol partly and be connected, select at last the functional structure feature templates of optimum matching according to functional structure isomorphism degree, and with the functional structure characteristic symbol and the annexation of its symbology counterpart.Repeat HLF high layer function architectural feature isomorphism until higher level functional structure characteristic symbol no longer occurring.
The constraint condition 512 methods operation that produces circuit optimization comprises according to circuit function analysis and architectural feature and generating about to becoming constraint condition, about the matching constraint condition, constraint condition about current source/current mirror connection, be operated in the constraint condition of saturation region about device, be operated in the constraint condition of linear zone about device, about device work is the constraint condition of MOSCAP, about the device constraint condition on signal path whether, whether about device is that circuit powers on and the constraint condition of circuit breaking controller spare etc.
In Fig. 6, the method operation 306 that generates test circuit based on the test circuit template base of functional performance index item be the menu 606 that receives under the former technology new stratification circuit design 604 based on function, circuit design correspondence, based on the performance index item tabulation 608 of function and based on the test circuit template base 610 of function as input, generate the testing performance index circuit table 612. of the whole electronic circuits of engine 602 outputs of test circuit based on the test circuit template base of functional performance index item
In Fig. 7, the method operation 306 that generates test circuit based on functional performance index item test circuit template base comprises the reception data: under the former technology based on the menu of the design of the new stratification of function, circuit design correspondence, based on the performance index item tabulation of function, based on the test circuit template base 702 of functional performance index item; Search the function 704 of subelement; The performance index item 706 of locating function; Search the test circuit template 708 of performance index item; Generation is used for the test circuit 710 of calculation of performance indicators item; Output test circuit table 712.
In Fig. 8, based on the measurement instruction template storehouse of functional performance index item generate menu 806 that the method operation 308 of measuring instruction receives under the former technology new stratification design 804 based on function, circuit design correspondence, based on the performance index item tabulation 808 of function, based on the measurement instruction template storehouse 810 of function as input, measure all subelement test volumes of instruction generator 802 outputs and instruct table 812.
In Fig. 9, generate the method for operating 308 of measuring instruction based on the measurement instruction template storehouse of functional performance index item and comprise the reception data: under the former technology based on the menu of the design of the new stratification formula of function, corresponding design, based on the performance index item tabulation of function, measure instruction template storehouse 902 based on the performance index item of function; Search the function 904 of subelement; The performance index item 906 of locating function; Search the measurement instruction template 908 of performance index item correspondence; Produce the test instruction 910 of performance index item correspondence; Instruction list 912 is measured in output.
In Figure 10, determine design 1004, test circuit table 1006, the measurement instruction list 1008 conduct inputs of the method operation reception of performance index value 310, performance index value counter 1002 output performance desired value tables 1010 based on the new stratification formula of function.
In Figure 11, determine that the method operation of performance index value 310 comprises the reception data: based on design, the test circuit table 1101 of the new stratification of function, measure instruction list 1102; Generate the circuit meshwork list 1104 that emulation is used; Circuit meshwork list emulation 1106; Carry out and measure 1108; The value 1110 of output performance index item.
In Figure 12, the stratification design map is received under the former technology based on the PCell mapping between model mapping 1206, the model card 1208 of target process, the model card 1210 of former technology, former technology and the target process between design 1204, former technology and the target process of the new stratification formula of function and PCell parameter maps 1212 as importing to the method for target process operation 312, under the used new design maker 1202 export target technologies of mimic channel process transplanting based on the design 1214 of the stratification formula of function.
In Figure 13, stratification design is comprised the reception data from the method operation 312 that former technology is mapped to target process: based on the model card 1302 of the PCell mapping between model mapping, former technology and the target process between design, former technology and the target process of the stratification formula of function and PCell parameter maps, the model card of target process, former technology; Copy under the former technology design 1304 based on the stratification formula of function; Replace original model card name 1306 in the design according to the model mapping relations between former technology and the target process with the model card name of target process; Determine target process PCell parameter value 1308; PCell name, PCell parameter name and parameter value in will designing according to the mapping relations between PCell between former technology and the target process and the PCell parameter name replaces with PCell name, PCell parameter name and the parameter value 1310 of target process respectively; Under the export target technology based on the design 1312. of the stratification formula of function
In Figure 14, utilize the method for the independent temper parallel optimization objective circuit from bottom to top between the circuit unit that function divides to operate under the 314 receiving target technologies design 1404, test circuit table 1406, measure instruction list 1408, constraint condition table 1410, performance index value table 1412 as input based on the stratification formula of function, under the circuit optimization engine 1402 export target technologies based on the optimal design 1414 of the stratification formula of function.
In Figure 15, utilize the method for operating 314 of the independent temper parallel optimization objective circuit from bottom to top between the circuit unit that function divides to comprise the reception data: under the target process based on design, the test circuit table of the stratification formula of function, measure instruction list, constraint condition table, performance index value table 1502; Produce net table 1504; Carry out emulation 1506; Carry out and measure 1508; Whether the check measurement result satisfies 1510; If not satisfying performance index requires then to revise parameter value 1512 and turn back to 1504; Require then to export objective function design 1514 if satisfy performance index, finish the optimization of corresponding subelement circuit based on parameters optimization value level.
Figure 16 is the structural representation of computer system 1600, may comprise concrete an application of the present invention.Figure 16 has comprised concrete an application of the present invention, do not have onomatopoeia bright in statement such limit application category of the present invention.The people of common skill approves other variation, modification and selection.
In concrete the application, computer system 1600 has especially comprised display 1614, computing machine 1630, and user's output unit 1612, user input apparatus 1610, communication interface 1608, like that.
As shown in figure 16, computing machine has comprised some processors 1602, and it is communicated by letter with peripherals by bus.Peripherals comprises user's output unit 1612, user input apparatus 1610, and communication interface 1608, and storage subsystem are as random access memory (RAM) 1604, disk drive 1606.
Software code module and instruction provide function of the present invention, are stored in RAM1604 and the disc driver 1606.Software module can be carried out with processor 1602.RAM1604 is used for storing the consistent data with the present invention with disc driver 1606.
As think the mechanism that bus system 1620 provides the various elements that allow in the computing machine and subsystem intercom mutually.Although bus system represents with single line that in the diagram in concrete the application, bus system may adopt multi-thread.
Figure 16 has represented and can embody computer system of the present invention.Obviously, many other software and hardware structures all are suitable for the present invention.For example, computing machine can be desktop computer, notebook, fixed frame or plank frame.In addition, computing machine can be the computing machine of many networkings.
Instructions and chart are schematically, but not are proper.In not breaking away from thought of the present invention and category, can do various modifications and changes.In addition, technology of the present invention and system are suitable for many eda tools and methodology.Category of the present invention should not be limited in the reference content of narrating previously, but should be with reference to the unsettled statement about four corner.
The present invention can use software, and the steering logic of hardware realizes, or both combinations.Steering logic is stored in the information storage medium, and most instructions can directly be applied in messaging device, goes to carry out the many concrete application that the present invention demonstrates.Based on demonstration that provides here and teaching, the people that level is general on technology just can realize the present invention with other modes or method.
Concrete application discussed here is schematically, about one or several example of the present invention.Described concrete application of the present invention with synoptic diagram, can carry out various modifications and adjustment to method, these methods depend on teaching materials of the present invention, advanced technology are arranged, in these teaching materials within category of the present invention.Herein, narration of the present invention and icon should not treated with narrow thinking, and the present invention must not only be limited in the concrete application of institute's illustration.
Above-described specific embodiment; purpose of the present invention, technical scheme and beneficial effect are further described; institute is understood that; the above only is specific embodiments of the invention; be not limited to the present invention; within the spirit and principles in the present invention all, any modification of being made, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (9)
1. the method for a mimic channel process transplanting is characterized in that, this method comprises:
Receive the input data of user by graphical interfaces or the appointment of order line form, these data comprise the circuit meshwork list under the former technology at least, the model card of former technology, the model card of target process, former technology is to the PCell mapping and the PCell parameter maps of target process, and model mapping (enum) data from former technology to target process, based on mimic channel function moral architectural feature storehouse, performance index item tabulation based on the mimic channel function, based on mimic channel function moral character energy index item test circuit template base, can measure the instruction template storehouse by index item based on mimic channel function moral character, and power supply and earth mat circuit-switched data;
Based on the circuit function analysis and the division of mimic channel functional structure feature database, to produce design based on the new stratification formula of function;
Produce constraint condition based on the functional structure feature;
Test circuit template base based on mimic channel functional performance index item generates test circuit;
Measurement instruction template storehouse based on mimic channel functional performance index item generates the measurement instruction;
Utilizing performance index value test circuit and measurement instruction to carry out performance index value calculates;
To be mapped to target process from former technology based on the design of function moral stratification formula;
Utilization is based on the parallel optimization objective circuit from bottom to top of the independence between the stratification design cell of function; And
Circuit design net table under the export target technology based on the stratification of the optimization of function.
2. the method for mimic channel process transplanting according to claim 1 is characterized in that, describedly carries out circuit function analysis and division based on mimic channel functional structure feature templates storehouse, to generate the step based on the design of the new stratification formula of function, comprising:
Receive the input data, these input data comprise circuit meshwork list under the former technology at least, based on the template base of mimic channel functional structure feature, the model card of former technology, and electric former and zone network;
Pre-service input net table;
Follow the trail of direct current path and signal path;
Function isomorphism according to architectural feature template base check circuit;
Carry out that circuit is divided and based on the reconstruct design of functional hierarchyization ground according to the function isomorphism;
Produce the constraint condition of circuit optimization according to the functional structure feature; And
Output is based on the design of the stratification formula of function, menu and constraint condition table.
3. the method for mimic channel process transplanting according to claim 1 is characterized in that, described test circuit template base based on mimic channel functional performance index item generates the step of test circuit, comprising:
Receive the input data, these data comprise under the former technology at least based on the design of the stratification formula of function, the menu of design, and based on the performance index item test circuit template base of function;
Search the function of subelement;
The performance index item of locating function;
Search the test circuit template of performance index item;
Produce the test circuit of performance index item; And
Output test circuit table.
4. the method for mimic channel process transplanting according to claim 1 is characterized in that, described measurement instruction template storehouse based on mimic channel functional performance index item generates the step of measuring instruction, comprising:
Receive data: based on design, the circuit function table of the stratification formula of function, and based on the measurement instruction template storehouse of mimic channel functional performance index item;
Search the function of subelement;
The performance index item of locating function;
Search the measurement instruction template of performance index item;
Produce the measurement instruction of performance index item; And
Instruction list is measured in output.
5. the method for mimic channel process transplanting according to claim 1, it is characterized in that, described test circuit template base based on mimic channel functional performance index item generates test circuit and described measurement instruction template storehouse generation measurement instruction based on mimic channel functional performance index item, by the computer cluster executed in parallel in the network.
6. the method for mimic channel process transplanting according to claim 1 is characterized in that, the described step of utilizing performance index value test circuit and measurement instruction to carry out performance index value calculating comprises:
Receive data, these data comprise function design, test platform table and the test instruction table based on level at least;
Produce circuit simulation net table;
Circuit meshwork list emulation;
Carry out and measure; And
Output performance desired value table.
7. the method for mimic channel process transplanting according to claim 1 is characterized in that, the described performance index value test circuit that utilizes carries out performance index value calculating with measuring to instruct, and reaches executed in parallel by different level by the computer cluster in the network.
8. the method for mimic channel process transplanting according to claim 1 is characterized in that, describedly will be mapped to the step of target process from former technology based on the design of function moral stratification formula, comprising:
Receive data, these data comprise under the former technology at least based on PCell mapping and PCell parameter maps, the model card of target process and the model card of former technology between model mapping, former technology and the target process between design, former technology and the target process of the stratification formula of function;
Copy under the former technology design based on the stratification formula of function;
Replace the model card name of former technology with target process model card name according to the mapping of the model between former technology and the target process;
Determine the PCell parameter value of target process;
Replace PCell name, PCell parameter name and parameter value under the former technology according to the PCell between former technology and target process mapping and PCell parameter maps with the PCell name under the target process, PCell parameter name and parameter value; And
Under the export target technology based on the design of the stratification formula of function.
9. the method for mimic channel process transplanting according to claim 1 is characterized in that, described utilization comprises based on the step of the parallel optimization objective circuit from bottom to top of the independence between the stratification design cell of function:
Receive data, these data comprise under the target process based on design, the test circuit table of the stratification formula of function at least, measure instruction list, constraint condition table and performance index value table;
Produce circuit meshwork list;
Executive circuit emulation;
The measurement of execution performance desired value;
Whether the check measurement result satisfies;
Under ungratified situation, revise parameter value and return the executive circuit simulation process;
Under the export target technology based on the design of the stratification formula of the optimization of function.
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| CN102508977A (en) * | 2011-11-15 | 2012-06-20 | 中国科学院微电子研究所 | Circuit optimization method for artificial circuit transplant and circuit optimization device for artificial circuit transplant |
| WO2013071480A1 (en) * | 2011-11-15 | 2013-05-23 | 中国科学院微电子研究所 | Circuit optimization method and device for analog circuit transplantation |
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| GB0516634D0 (en) * | 2005-08-12 | 2005-09-21 | Univ Sussex | Electronic circuit design |
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