CN102013672B - Low-electric leakage high-voltage power supply electrostatic discharge protective circuit realized by utilizing low-voltage component - Google Patents
Low-electric leakage high-voltage power supply electrostatic discharge protective circuit realized by utilizing low-voltage component Download PDFInfo
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Abstract
The invention relates to a low-electric leakage high-voltage power supply electrostatic discharge protective circuit realized by utilizing a low-voltage component, which comprises a plurality of totally same module circuits, wherein the power supply end of the first module circuit is coupled with the power supply end of an electrostatic discharge protective circuit; the power supply end of the rest each module circuit is coupled with the grounding end of the previous module circuit; the grounding end of the last module circuit is coupled with the grounding end of the electrostatic discharge protective circuit; each module circuit comprises a conducting path and a detecting circuit; the detecting circuit is coupled with the power supply end and the grounding end of the attributed module circuit and the conducting path; and if the voltage rising speed of the power supply end of the module circuit exceeds a critical value, the detecting circuit conducts the conducting path. Accordingly, the invention can solve the problem of electric leakage of the traditional circuit in the advanced manufacture procedure and is suitable for an electronic system with various working voltages.
Description
Technical field
The present invention relates to a kind of static discharge (electrostatic discharge is called for short ESD) protective circuit (clamp circuit), particularly relate to a kind of low electric leakage ESD protection circuit for high voltage of power supply that utilizes low voltage component to realize.
Background technology
General ESD protection circuit is all configured between the power end and earth terminal of electronic system.Desirable ESD protection circuit must be closed completely when electronic system normal running, should not have electric leakage.If there is electrostatic discharge pulses (ESD pulse), the necessary conducting of ESD protection circuit, imports earth terminal by electrostatic discharge pulses from power end, to protect electronic system.
At nano level complementary metal oxide semiconductors (CMOS) (complementary metal oxide semiconductor, abbreviation CMOS) in processing procedure, gate oxide (gate oxide) attenuation along with the evolution of process technique, operating voltage is also along with reduction.Yet in an electronic system, often there are a plurality of subsystems that operate in different operating voltage, integrated circuit is in order to be compatible to different operating voltages, conventional method can be born the subsystem of high voltage with thicker grid oxic horizon manufacture, avoid by this grid oxic horizon to suffer the excessively electrically problem of stress (electrical overstress, EOS).Yet, in manufacture process, increase by one extra photomask and manufacture thick grid oxic horizon, can increase process complexity, therefore product yield may decline, and integral production cost also increases thereupon.
In order to reduce production costs, only with the low voltage component of thin grid oxide layer realize can resistance to high working voltage circuit be popular research theme, ESD protection circuit is no exception.
Fig. 1 is the circuit diagram of existing known a kind of ESD protection circuit.The ESD protection circuit of Fig. 1 is all used low voltage component, supposes that these low voltage components itself can only bear the operating voltage of VDD, and the circuit of Fig. 1 can bear the operating voltage of twice VDD.That is to say the twice that the operating voltage Hi-Vcc that power end 210 provides is VDD.
The ESD protection circuit of Fig. 1 is divided into three parts: discharge path 202, control circuit 204 and P channel mos field-effect transistor (p-channel metal oxide semiconductor field effect transistor is called for short PMOS transistor) 302 and 304 bleeder circuits that form.PMOS transistor 302 is all connected (diode-connected) in diode mode with 304.Above-mentioned bleeder circuit is divided into halves by operating voltage Hi-Vcc, makes the cross-pressure between power end 210 and node 303 equal VDD, and makes the cross-pressure between node 303 and earth terminal also equal VDD.So just can make each the low voltage component normal running in Fig. 1 circuit, be unlikely to suffer excessively electrically stress.
Fig. 2 is the circuit diagram of existing known another kind of ESD protection circuit.The ESD protection circuit of Fig. 2 and Fig. 1 has identical operation principle, and difference is that the control circuit 204 of Fig. 2 is relatively simplified.
Under traditional processing procedure, the electric leakage of circuit element is all very slight.The circuit of Fig. 1 and Fig. 2 of take is example, control circuit 204 wherein and discharge path 202 electric leakages not obvious, so bleeder circuit does not need the drive current that provides too large, the electric leakage of the integral body of ESD protection circuit is also not serious.
Yet, in current nanoscale advanced process, because the size of low voltage component each side has reduction, the electric leakage meeting of control circuit 204 and discharge path 202 significantly increases, therefore bleeder circuit must provide very large drive current, maintain correct dividing potential drop, for example, the voltage of node 303 is maintained to VDD.Because bleeder circuit must provide large electric current, and bleeder circuit itself is also comprised of low voltage component, makes the electric leakage of bleeder circuit more serious, accounted for the overwhelming majority of the leakage current (leakage current) of whole ESD protection circuit; In addition, the shared circuit layout area of bleeder circuit also cannot be reduced.Due to electric leakage problem, in advanced process, use ESD protection circuit as depicted in figs. 1 and 2, do not met energy savings and the principle of considering reducing costs.
Fig. 3 is the circuit diagram of existing known another kind of ESD protection circuit.The ESD protection circuit of Fig. 3 is used low voltage component equally, supposes that these low voltage components itself can only bear the operating voltage of VDD, and the circuit of Fig. 3 can bear the operating voltage of three times of VDD.
The ESD protection circuit of Fig. 3, its operation principle is identical with the ESD protection circuit of Fig. 1, Fig. 2.The ESD protection circuit of Fig. 3 comprises discharge path 110, control circuit 120 and bleeder circuit 130, and wherein discharge path 110 comprises thyristor (silicon-controlled rectifier is called for short SCR) 115.Bleeder circuit 130 utilizes the PMOS transistor Md1-Md6 connecting in diode mode of six series connection, and the operating voltage of three times of VDD is divided into three equal parts, to guarantee that each low voltage component in Fig. 3 circuit can not suffer excessively electrically stress.Can be when there is electrostatic discharge pulses in control circuit 120, output trigger current I_trig, makes discharge path 110 conductings, and electrostatic discharge pulses is imported to earth terminal.
Because operation principle is identical with the ESD protection circuit of Fig. 1, Fig. 2, the ESD protection circuit of Fig. 3 has equally the problem of serious electric leakage under advanced process.
As can be seen here, above-mentioned existing ESD protection circuit, in structure and use, obviously still has inconvenience and defect, and is urgently further improved.In order to solve the problem of above-mentioned existence, relevant manufacturer there's no one who doesn't or isn't seeks solution painstakingly, but have no for a long time applicable design always, by development, completed, and common product does not have appropriate structure to address the above problem, this is obviously the problem that the anxious wish of relevant dealer solves.Therefore how to found a kind of low electric leakage ESD protection circuit for high voltage of power supply that utilizes low voltage component to realize of new structure, real one of the current important research and development problem that belongs to, also becoming the current industry utmost point needs improved target.
Summary of the invention
The object of the invention is to; overcome the defect that existing ESD protection circuit exists; and a kind of low electric leakage ESD protection circuit for high voltage of power supply that utilizes low voltage component to realize of new structure is provided; technical problem to be solved is that it is formed with low voltage component; can bear high voltage source; and can solve traditional circuit in the electric leakage problem of advanced process, and be applicable to the electronic system of multiple operating voltage, be very suitable for practicality.
The object of the invention to solve the technical problems realizes by the following technical solutions.For achieving the above object; according to the low electric leakage ESD protection circuit for high voltage of power supply that utilizes low voltage component to realize of the present invention; comprise identical a plurality of modular circuit; wherein the power end of first modular circuit couples the power end of ESD protection circuit; the power end of all the other each modular circuits couples the earth terminal of a modular circuit, and the earth terminal of last modular circuit couples the earth terminal of ESD protection circuit.Each above-mentioned modular circuit comprises a conducting path and a circuit for detecting.The power end of modular circuit under conducting path couples.Power end, earth terminal and the above-mentioned conducting path of modular circuit under circuit for detecting couples.If the rate of voltage rise of the power end of modular circuit surpasses a critical value, circuit for detecting makes conducting path conducting.
In one embodiment of this invention, the conducting path of each above-mentioned modular circuit is coupled between the power end and earth terminal of modular circuit, an electrostatic discharge pulses is conducted to the earth terminal of modular circuit from the power end of modular circuit.
In one embodiment of this invention, above-mentioned ESD protection circuit more comprises a discharge path.This discharge path is coupled between the power end and earth terminal of ESD protection circuit, and electrostatic discharge pulses is imported to above-mentioned earth terminal from above-mentioned power end.Wherein, the conducting path of last modular circuit couples this discharge path, and exports a triggering signal, makes discharge path conducting.Under being coupled to, the conducting path of all the other each modular circuits between the power end and earth terminal of modular circuit, transmits above-mentioned triggering signal.
In one embodiment of this invention, each above-mentioned circuit for detecting comprises PMOS transistor, resistance, electric capacity and three inverters.PMOS transistor is coupled between the power end and first node of affiliated modular circuit.Resistance is coupled between first node and Section Point.Electric capacity is coupled between Section Point and the earth terminal of affiliated modular circuit.The first inverter couples Section Point, receives the voltage of Section Point.The second inverter couples the first inverter, receives the output of the first inverter.The 3rd inverter couples first node and the second inverter, receives the voltage of first node.The output of the 3rd inverter makes corresponding conducting path conducting or cut-off.
In one embodiment of this invention, the high-pressure side of the first above-mentioned inverter and the second inverter all couples first node.The earth terminal of modular circuit under the low-pressure end of the first inverter and the second inverter all couples.The power end of modular circuit under the high-pressure side of the 3rd inverter couples.The low-pressure end of the 3rd inverter couples the output of the second inverter.
In one embodiment of this invention, above-mentioned ESD protection circuit more comprises a bleeder circuit.This bleeder circuit is coupled between the power end and earth terminal of ESD protection circuit, and couples power end and the earth terminal of each above-mentioned modular circuit.This bleeder circuit is divided equally the cross-pressure between the power end of ESD protection circuit and earth terminal, and the power end of each above-mentioned modular circuit is equated with the cross-pressure between earth terminal.
The object of the invention to solve the technical problems also adopts following technical scheme to realize.For achieving the above object, according to the low electric leakage ESD protection circuit for high voltage of power supply that utilizes low voltage component to realize of the present invention, comprise PMOS transistor, electric capacity, resistance, three inverters and conducting path.PMOS transistor is coupled between power end and first node.Resistance is coupled between first node and Section Point.Electric capacity is coupled between Section Point and earth terminal.The first inverter couples Section Point, receives the voltage of Section Point.The second inverter couples the first inverter, receives the output of the first inverter.The 3rd inverter couples first node and the second inverter, receives the voltage of first node.Conducting path couples power end, according to the output of the 3rd inverter and conducting or cut-off.
The object of the invention to solve the technical problems also realizes in addition by the following technical solutions.For achieving the above object, the low electric leakage ESD protection circuit for high voltage of power supply that utilizes low voltage component to realize proposing according to the present invention, comprises PMOS transistor, resistance, electric capacity, three inverters and conducting path.PMOS transistor is coupled between power end and a first node.Resistance is coupled between first node and Section Point.Electric capacity is coupled between Section Point and earth terminal.The first inverter couples Section Point, receives the voltage of Section Point.The second inverter couples the first inverter, receives the output of the first inverter.The 3rd inverter couples first node and the second inverter, receives the voltage of first node, to do corresponding output according to first node with the voltage of Section Point.Conducting path couples power end, according to the output of the 3rd inverter and conducting or cut-off.
The present invention compared with prior art has obvious advantage and beneficial effect.By technique scheme; the low electric leakage ESD protection circuit for high voltage of power supply that the present invention utilizes low voltage component to realize at least has following advantages and beneficial effect: ESD protection circuit of the present invention is reached self-dividing potential drop with the modular circuit of full symmetric; higher operating voltage is divided equally to the scope that can bear to low voltage component, therefore can with low voltage component, form completely.In processing procedure, do not need the additional light mask of thick grid oxic horizon, can simplify processing procedure, improve product yield, reduce costs.ESD protection circuit of the present invention does not need extra bleeder circuit, so can significantly improve traditional circuit in the electric leakage problem of advanced process, has the design that reduces electric leakage in each modular circuit yet.
In sum; the invention relates to a kind of low electric leakage ESD protection circuit for high voltage of power supply that utilizes low voltage component to realize; comprise identical a plurality of modular circuit; wherein the power end of first modular circuit couples the power end of ESD protection circuit; the power end of all the other each modular circuits couples the earth terminal of a modular circuit, and the earth terminal of last modular circuit couples the earth terminal of ESD protection circuit.Each above-mentioned modular circuit comprises a conducting path and a circuit for detecting.Power end, earth terminal and the above-mentioned conducting path of modular circuit under circuit for detecting couples.If the rate of voltage rise of the power end of modular circuit surpasses a critical value, circuit for detecting makes conducting path conducting.
Above-mentioned explanation is only the general introduction of technical solution of the present invention, in order to better understand technological means of the present invention, and can be implemented according to the content of specification, and for above and other object of the present invention, feature and advantage can be become apparent, below especially exemplified by preferred embodiment, and coordinate accompanying drawing, be described in detail as follows.
Accompanying drawing explanation
Fig. 1 to Fig. 3 is the circuit diagram of existing three kinds of known ESD protection circuits.
Fig. 4 is the schematic diagram according to a kind of ESD protection circuit of one embodiment of the invention.
Fig. 5 is the schematic diagram according to a kind of ESD protection circuit of another embodiment of the present invention.
Fig. 6 is the circuit diagram of the ESD protection circuit of Fig. 4.
Fig. 7 is the circuit diagram of the ESD protection circuit of Fig. 5.
Fig. 8 is the circuit diagram according to a kind of ESD protection circuit of another embodiment of the present invention.
Fig. 9 is the ESD protection circuit of Fig. 8 each node voltage and the leakage current when normal startup.
Figure 10 and Figure 11 are each node voltage and the trigger current of the ESD protection circuit of Fig. 8 while meeting with electrostatic discharge pulses.
Operating voltage and trigger voltage when Figure 12 is existing known a kind of ESD protection circuit experience methd of power supply random signal.
Figure 13 is operating voltage and the trigger voltage of the ESD protection circuit of Fig. 8 while meeting with methd of power supply random signal.
110: discharge path 115: thyristor
120: control circuit 130: bleeder circuit
202: discharge path 204: control circuit
210,303,315,346: circuit node 300: ESD protection circuit
206,208,302,304,306,318,340,344,348:PMOS transistor
312,316,322,342:NMOS transistor 307: resistance
308,324,326,345: electric capacity 410,430: modular circuit
420: circuit for detecting 412,450: power end
414,455: earth terminal 470: discharge path
801-805: circuit node 810: modular circuit
820: circuit for detecting 850: power end
855: earth terminal 870: discharge path
A-v: circuit node C1: electric capacity
D1, D2: diode I_trig: current signal
I1, I2, I3: inverter M1-M4, M6, Md1-Md6, Mp1-Mp5:PMOS transistor
M5, Mn1:NMOS transistor Mc1: electric capacity
P1, P2:PMOS transistor R1, R2: resistance
Hi-Vcc, VDD: operating voltage VSS: earthed voltage
Embodiment
For further setting forth the present invention, reach technological means and the effect that predetermined goal of the invention is taked; below in conjunction with accompanying drawing and preferred embodiment; low its embodiment of electric leakage ESD protection circuit for high voltage of power supply, structure, feature and the effect thereof of utilizing low voltage component to realize to proposing according to the present invention, be described in detail as follows.
Relevant aforementioned and other technology contents of the present invention, Characteristic can be known and present in the following detailed description coordinating with reference to graphic preferred embodiment.By the explanation of embodiment, when can be to reach technological means and the effect that predetermined object takes to obtain one more deeply and concrete understanding to the present invention, yet appended graphic being only to provide with reference to the use with explanation be not used for the present invention to be limited.
Fig. 4 is the schematic diagram according to a kind of ESD protection circuit of one embodiment of the invention, and Fig. 6 is the circuit diagram of the ESD protection circuit of Fig. 4, and below explanation please refer to Fig. 4 and Fig. 6.
The ESD protection circuit of the present embodiment comprises a plurality of identical modular circuits, the modular circuit 410 and 430 that for example Fig. 4 illustrates, and these modular circuits couple with series system; Each modular circuit has identical circuit framework, elements combination and configuration configuration (configurat ion).Each modular circuit has a power end and earth terminal, and for example modular circuit 410 has power end 412 and earth terminal 414.Among these modular circuits; the power end of first modular circuit couples the power end 450 of ESD protection circuit; the power end of all the other each modular circuits couples the earth terminal of a modular circuit, and the earth terminal of last modular circuit couples the earth terminal 455 of ESD protection circuit.
The ESD protection circuit of the present embodiment can form with low voltage component completely.Because there are a plurality of identical modular circuits to be serially connected between the power end 450 and earth terminal 455 of ESD protection circuit; itself just has a minute compression functions these modular circuits, and the operating voltage that power end 450 can be provided is divided equally the degree that can bear to low voltage component.For example; suppose that the operating voltage of each low voltage component when design is VDD, and the operating voltage of ESD protection circuit is n times of VDD, n is more than 2 positive integer; ESD protection circuit can comprise n modular circuit, and the cross-pressure of each modular circuit is divided into VDD.So just can make each low voltage component normal running, be unlikely to suffer excessively electrically stress.
Because modular circuit self has a minute compression functions, the ESD protection circuit of the present embodiment does not need the bleeder circuit of 130 these quasi-traditions of 202 and Fig. 3 of Fig. 1, Fig. 2.Save traditional bleeder circuit, also just removed serious electric leakage and the large area of traditional bleeder circuit, so can significantly improve the electric leakage problem of whole ESD protection circuit, also can reduce circuit area.
Each modular circuit comprises a conducting path and a circuit for detecting, and for example the modular circuit 410 of Fig. 6 comprises the conducting path that circuit for detecting 420 and PMOS transistor P2 form.PMOS transistor P2 is according to the output of circuit for detecting 420 and conducting or cut-off.Circuit for detecting 420 couples power end 412, the earth terminal 414 and conducting path P2 of modular circuit 410.The effect of circuit for detecting 420 is detection electrostatic discharge pulses, if the rate of voltage rise of power end 412 surpasses default critical value, indicates electrostatic discharge pulses, and circuit for detecting 420 can be opened PMOS transistor P2, makes conducting path conducting.
As shown in Figure 4, the conducting path P2 of each modular circuit is coupled between the power end and earth terminal of affiliated modular circuit.If there is electrostatic discharge pulses in the power end of ESD protection circuit 450; each modular circuit circuit for detecting wherein can make corresponding conducting path conducting, by the earth terminal of electrostatic discharge pulses modular circuit under the power end of affiliated modular circuit conducts to.So, electrostatic discharge pulses will be imported into earth terminal 455 from power end 450, reaches the object of protection electronic system.
In order to reduce electric leakage, the present invention can suitably limit the size of above-mentioned PMOS transistor P2, although this may make the conductive capability of conducting path reduce, the present invention can use the enhancement design as shown in Fig. 5 and Fig. 7.Fig. 5 is the schematic diagram according to a kind of ESD protection circuit of another embodiment of the present invention, and Fig. 7 is the circuit diagram of the ESD protection circuit of Fig. 5.The ESD protection circuit of Fig. 5 has increased discharge path 470.Discharge path 470 is coupled between the power end 450 and earth terminal 455 of ESD protection circuit.Except last modular circuit, the conducting path P2 of each modular circuit is coupled between the power end and earth terminal of affiliated modular circuit, as shown in modular circuit 410.The conducting path P2 of last modular circuit is coupled between the power end and discharge path 470 of affiliated modular circuit, as shown in modular circuit 430.Please note that modular circuit 430 and each modular circuit 410 can be still identical circuit, there is identical circuit framework and elements combination.
When electrostatic discharge pulses appears in the power end 450 of ESD protection circuit, the circuit for detecting in each modular circuit can make corresponding conducting path conducting.Electrostatic discharge pulses can produce triggering signal; triggering signal can be sent to discharge path 470 along conducting path one tunnel of each modular circuit; make discharge path 470 conductings, electrostatic discharge pulses is imported to the earth terminal 455 of ESD protection circuit from the power end 450 of ESD protection circuit.Above-mentioned triggering signal can be current signal or voltage signal.Discharge path 470 can be used the elements such as thyristor (SCR) or field oxide transistor (field-oxidedevice is called for short FOD) to form.If discharge path 470 is used the element of oxygen-freeization layer, thyristor for example, its electrical leakage quantity is negligible, can have concurrently and improves conductive capability and reduce the effect of leaking electricity.
Below coordinate Fig. 8 to Figure 11 one embodiment of the invention to be described wherein, the details of circuit for detecting and its operation principles.Fig. 8 is the circuit diagram according to a kind of ESD protection circuit of one embodiment of the invention.For simplicity, the ESD protection circuit of Fig. 8 only comprises a modular circuit 810.Modular circuit 810 comprises the conducting path that circuit for detecting 820 and PMOS transistor P2 form.The common power end of the ESD protection circuit of the 850th, Fig. 8 and modular circuit 810, the common ground end of the ESD protection circuit of the 855th, Fig. 8 and modular circuit 810.
Circuit for detecting 820 comprises PMOS transistor P1, resistance R 1, capacitor C 1 and three inverter I1, I2, I3.Each inverter has four end points, is respectively input, output, high-pressure side and low-pressure end.Wherein, high-pressure side is the transistorized source electrode of PMOS (source) of inverter namely, low-pressure end is the source electrode of the N channel mos field-effect transistor of inverter (n-channel metal oxide semiconductor field effect transistor is called for short nmos pass transistor) namely.PMOS transistor P1 is coupled between power end 850 and node 801.Resistance R 1 is coupled between node 801 and node 802.Capacitor C 1 is coupled between node 802 and earth terminal 855.Resistance R 1 can form one with capacitor C 1 and react circuit, and node 801 and 802 can be considered as respectively a first node and a Section Point.The high-pressure side of inverter I1 couples node 801, and low-pressure end couples earth terminal 855, and input couples node 802, the voltage of receiving node 802, and output couples node 803, and the voltage of node 803 is provided.The high-pressure side of inverter I2 couples node 801 equally, and low-pressure end couples earth terminal 855 equally, and input couples node 803, the voltage of receiving node 803, and output couples node 804, and the voltage of node 804 is provided.Inverter I1 and I2 can be considered a combinational circuit.The high-pressure side of inverter I3 couples power end 850, and low-pressure end couples node 804, and input couples node 801, the voltage of receiving node 801, and output couples node 805, and the voltage of node 805 is provided.The voltage of node 805 is the grid of PMOS transistor P2 (gate) voltage namely.Therefore, the output of inverter I3 can make conducting path P2 conducting or cut-off.
Circuit for detecting 820 is to utilize the charging rate of capacitor C 1 to distinguish the electrostatic discharge pulses of normal operating voltage and burst; In equivalence, according to this charging rate, the rate of voltage rise that can be power end defines a critical value (critical speed).According to the embodiment of a canonical parameter, Fig. 9 is the ESD protection circuit of Fig. 8 operating voltage VDD, the voltage of node 801 to 805 and the leakage current of modular circuit 810 when normal startup.During normal startup, the operating voltage VDD that power end 850 provides rises to 1V (the namely load voltage value of VDD) from 0V within the time of 100 microseconds (microsecond), and the rising of VDD makes PMOS transistor P1 conducting.Default critical speed when now the rate of climb of VDD is lower than design, the charging rate of capacitor C 1 can be caught up with, so the voltage of node 801 and 802 synchronously rises.For inverter I1 and I2, the voltage of node 801 is logic high potential, and the voltage of node 802 is logic high potential equally.So the logic high potential of inverter I1 receiving node 802, the logic low potential of output node 803, and the logic low potential of inverter I2 receiving node 803, the logic high potential of output node 804.But for inverter I3, the operating voltage VDD of power end 850 is only logic high potential, node 801 and 804 voltage only have 0.2V, are all logic low potential by contrast.So the nmos pass transistor of inverter I3 cut-off, and PMOS transistor turns, the voltage of node 805 is equaled (or leveling off to) operating voltage VDD, and then make the PMOS transistor P2 cut-off of conducting path, therefore can not send trigger current makes discharge path 870 conductings.
PMOS transistor P1 is the low electric leakage design of circuit for detecting 820 own.During normal startup, the voltage of node 805 progressively rises, and finally can make PMOS transistor P1 end not conducting, and capacitor C 1 is not recharged.As shown in Figure 9, till capacitor C 1 is only charged to 0.2V, compares with the operating voltage VDD of 1V and seldom, can reduce like this electric leakage of capacitor C 1 and whole modular circuit 810.As shown in Figure 9, the leakage current of modular circuit 810 is no more than 0.15 micromicroampere (μ A).Because like this, capacitor C 1 needn't be used thick oxide layer especially in order to reduce electric leakage, can reduce circuit area.
Figure 10 is the ESD protection circuit of Fig. 8 operating voltage VDD, the voltage of node 801 to 805 and the trigger current of conducting path P2 output when meeting with electrostatic discharge pulses.Electrostatic discharge pulses makes operating voltage VDD just from 0V, rise to 2V within 10 nanoseconds (nanosecond), and the rising of VDD makes PMOS transistor P1 conducting.Now the rate of climb of VDD is higher than the default critical speed in when design, and the charging rate of capacitor C 1 cannot be caught up with, so the voltage of node 801 and operating voltage VDD synchronously rise, and the voltage of node 802 can not synchronously rise.For inverter I1 and I2, the voltage of node 801 (2V) is logic high potential, and it is logic low potential that the voltage of node 802 becomes relatively.So the logic low potential of inverter I1 receiving node 802, the logic high potential of output node 803, and the logic high potential of inverter I2 receiving node 803, the logic low potential of output node 804.For inverter I3, the voltage of power end 850 and node 801 is all logic high potential, and the voltage of node 804 is logic low potential.So the PMOS transistor of inverter I3 cut-off, and nmos pass transistor conducting drags down the voltage of node 805, and then make the PMOS transistor P2 conducting of conducting path, and send trigger current and further make also conducting in the lump of discharge path 870.
Figure 11 is the ESD protection circuit of Fig. 8 operating voltage VDD, the voltage of node 801 to 805 and the trigger current of conducting path P2 output when meeting with another stronger electrostatic discharge pulses.The electrostatic discharge pulses of Figure 11 makes operating voltage VDD just from 0V, rise to 5V within 10 nanoseconds.The situation of Figure 11 and Figure 10 is very similar, therefore it will not go into details.
As shown in figure 12; the ESD protection circuit that some is traditional; after there is noise/surging in operating voltage VDD; the trigger voltage that is used for opening discharge path can not got back to 0V; but there is bolt-lock (latch) phenomenon; maintain a non-zero voltage (in the example of Figure 12, being to be maintained at 1V left and right).Such bolt-lock phenomenon can cause circuit to continue electric leakage, unsatisfactory.On the other hand, the embodiment of the present invention of Fig. 8 does not have above-mentioned bolt-lock problem.As shown in figure 13, the noise of operating voltage VDD can make PMOS transistor P1 and P2 conducting, and trigger voltage (the namely cross-pressure of resistance R 2) is provided.But because the discharge path of resistance R 1 and capacitor C 1 can make each node voltage get back to the voltage quasi position before noise occurs after electric discharge, noise can make PMOS transistor P1 and P2 cut-off after dissipating, make trigger voltage get back to 0V.
The ESD protection circuit of above embodiment itself is energy dividing potential drop just, does not need extra bleeder circuit.But, even if increased bleeder circuit, also can not affect the running of the ESD protection circuit of above embodiment.For example, in the embodiment of Fig. 4 and Fig. 5, can on a plurality of modular circuits side, increase a bleeder circuit (not illustrating), the electric current that drives each modular circuit is provided.This bleeder circuit can be coupled between the power end 450 and earth terminal 455 of ESD protection circuit, and couples power end and the earth terminal of each modular circuit, for example, couple the power end 412 and earth terminal 414 of modular circuit 410.As previously mentioned, bleeder circuit can be divided equally the cross-pressure between the power end of ESD protection circuit and earth terminal, further guarantees that the power end of each modular circuit equates with the cross-pressure between earth terminal.For instance, if there be n modular circuit 410 to be applied in the electronic system of n times of VDD, in this bleeder circuit, can comprise n identical sectional pressure element (as resistance, diode or transistor), the two ends that each sectional pressure element is contacted are mutually connected to respectively power end and the earth terminal of a corresponding modular circuit 410.Because the modular circuit of above embodiment itself just can dividing potential drop, above-mentioned bleeder circuit does not need very large driving force, does not have serious electric leakage problem, does not need to take very large layout area yet.
In sum, ESD protection circuit of the present invention forms with low voltage component completely, and can bear high voltage source, can not make element wherein suffer excessively electrically stress, is applicable to the electronic system of multiple operating voltage.Owing to using low voltage component completely, ESD protection circuit of the present invention does not need the additional light mask of thick grid oxic horizon, can simplify processing procedure, improves product yield, reduces costs.ESD protection circuit of the present invention does not need traditional bleeder circuit, therefore can reduce electric leakage, and reduce circuit area.In addition, ESD protection circuit of the present invention modular circuit wherein itself also has the design that reduces electric leakage and reduce area.In addition, modularized design concept of the present invention can make the present invention can make the modular circuit of same design be applicable to the different electronic systems of different operating voltage.In the embodiment of Fig. 4, Fig. 5, if necessary, between modular circuit 430 and earth terminal 455, also circuit can be set; And also interlock circuit can be optionally set between the power end 412 of first modular circuit 410 and power end 450.
The above, it is only preferred embodiment of the present invention, not the present invention is done to any pro forma restriction, although the present invention discloses as above with preferred embodiment, yet not in order to limit the present invention, any those skilled in the art, do not departing within the scope of technical solution of the present invention, when can utilizing the technology contents of above-mentioned announcement to make a little change or being modified to the equivalent embodiment of equivalent variations, in every case be the content that does not depart from technical solution of the present invention, any simple modification of above embodiment being done according to technical spirit of the present invention, equivalent variations and modification, all still belong in the scope of technical solution of the present invention.
Claims (10)
1. a low electric leakage ESD protection circuit for high voltage of power supply that utilizes low voltage component to realize, is characterized in that it comprises:
Identical a plurality of modular circuit; wherein the power end of first modular circuit couples the power end of this ESD protection circuit; the power end of all the other each modular circuits couples the earth terminal of a modular circuit; the earth terminal of last modular circuit couples the earth terminal of this ESD protection circuit, and each above-mentioned modular circuit comprises:
One conducting path, the power end of modular circuit under coupling; And
One circuit for detecting, power end, earth terminal and this conducting path of modular circuit under coupling, if the rate of voltage rise of the power end of affiliated modular circuit surpasses a critical value, this circuit for detecting makes this conducting path conducting, and wherein each above-mentioned circuit for detecting comprises:
One the one PMOS transistor, is coupled between the power end and a first node of affiliated modular circuit;
One resistance, is coupled between this first node and a Section Point;
One electric capacity, is coupled between this Section Point and the earth terminal of affiliated modular circuit;
One first inverter, couples this Section Point, receives the voltage of this Section Point;
One second inverter, couples this first inverter, receives the output of this first inverter; And
One the 3rd inverter, couples this first node and this second inverter, receives the voltage of this first node, and the output of the 3rd inverter makes corresponding this conducting path conducting or cut-off.
2. the low electric leakage ESD protection circuit for high voltage of power supply that utilizes low voltage component to realize according to claim 1; it is characterized in that wherein said conducting path comprises one the 2nd PMOS transistor, the 2nd PMOS transistor is according to the output of this circuit for detecting and conducting or cut-off.
3. the low electric leakage ESD protection circuit for high voltage of power supply that utilizes low voltage component to realize according to claim 1; it is characterized in that wherein the conducting path of each above-mentioned modular circuit is coupled between the power end and earth terminal of affiliated modular circuit, by the earth terminal of electrostatic discharge pulses modular circuit under the power end of affiliated modular circuit conducts to.
4. the low electric leakage ESD protection circuit for high voltage of power supply that utilizes low voltage component to realize according to claim 1, is characterized in that more comprising:
One discharge path, is coupled between the power end and earth terminal of this ESD protection circuit, an electrostatic discharge pulses is imported to the earth terminal of this ESD protection circuit from the power end of this ESD protection circuit; Wherein
The conducting path of last modular circuit couples this discharge path, and output one triggering signal, makes this discharge path conducting;
Under being coupled to, the conducting path of all the other each modular circuits between the power end and earth terminal of modular circuit, transmits this triggering signal.
5. the low electric leakage ESD protection circuit for high voltage of power supply that utilizes low voltage component to realize according to claim 1; the high-pressure side that it is characterized in that wherein said the first inverter and this second inverter all couples this first node; the earth terminal of modular circuit under the low-pressure end of this first inverter and this second inverter all couples; the power end of modular circuit under the high-pressure side of the 3rd inverter couples, the low-pressure end of the 3rd inverter couples the output of this second inverter.
6. the low electric leakage ESD protection circuit for high voltage of power supply that utilizes low voltage component to realize according to claim 1, is characterized in that more comprising:
One bleeder circuit; be coupled between the power end and earth terminal of this ESD protection circuit; and couple power end and the earth terminal of each above-mentioned modular circuit; cross-pressure between the power end of this ESD protection circuit and earth terminal is divided equally, the power end of each above-mentioned modular circuit is equated with the cross-pressure between earth terminal.
7. a low electric leakage ESD protection circuit for high voltage of power supply that utilizes low voltage component to realize, is characterized in that it comprises:
One the one PMOS transistor, is coupled between a power end and a first node;
One resistance, is coupled between this first node and a Section Point;
One electric capacity, is coupled between this Section Point and an earth terminal;
One first inverter, couples this Section Point, receives the voltage of this Section Point;
One second inverter, couples this first inverter, receives the output of this first inverter;
One the 3rd inverter, couples this first node and this second inverter, receives the voltage of this first node; And
One conducting path, couples this power end, according to the output of the 3rd inverter and conducting or cut-off.
8. the low electric leakage ESD protection circuit for high voltage of power supply that utilizes low voltage component to realize according to claim 7; it is characterized in that wherein said conducting path comprises one the 2nd PMOS transistor, the 2nd PMOS transistor is according to the output of the 3rd inverter and conducting or cut-off.
9. the low electric leakage ESD protection circuit for high voltage of power supply that utilizes low voltage component to realize according to claim 7, is characterized in that more comprising:
One discharge path, couples this conducting path and this earth terminal, and an electrostatic discharge pulses is imported to this earth terminal, and wherein this conducting path is exported a triggering signal, makes this discharge path conducting.
10. a low electric leakage ESD protection circuit for high voltage of power supply that utilizes low voltage component to realize, is characterized in that it comprises:
One the one PMOS transistor, is coupled between a power end and a first node;
One resistance, is coupled between this first node and a Section Point;
One electric capacity, is coupled between this Section Point and an earth terminal;
One first inverter, couples this Section Point, receives the voltage of this Section Point;
One second inverter, couples this first inverter, receives the output of this first inverter; And
One the 3rd inverter, couples this first node and this second inverter, receives the voltage of this first node, to do corresponding output according to this first node with the voltage of this Section Point; And
One conducting path, couples this power end, according to the output of the 3rd inverter and conducting or cut-off.
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| CN200910171691.0A CN102013672B (en) | 2009-09-08 | 2009-09-08 | Low-electric leakage high-voltage power supply electrostatic discharge protective circuit realized by utilizing low-voltage component |
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| CN200910171691.0A CN102013672B (en) | 2009-09-08 | 2009-09-08 | Low-electric leakage high-voltage power supply electrostatic discharge protective circuit realized by utilizing low-voltage component |
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| CN102013672B true CN102013672B (en) | 2014-04-16 |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1663091A (en) * | 2002-06-14 | 2005-08-31 | 汤姆森许可贸易公司 | Protected dual-voltage microcircuit power arrangement |
| US7545614B2 (en) * | 2005-09-30 | 2009-06-09 | Renesas Technology America, Inc. | Electrostatic discharge device with variable on time |
| CN101506976A (en) * | 2006-08-24 | 2009-08-12 | 高通股份有限公司 | N-channel ESD clamp with improved performance |
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| US7586721B2 (en) * | 2007-07-10 | 2009-09-08 | United Microelectronics Corp. | ESD detection circuit |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1663091A (en) * | 2002-06-14 | 2005-08-31 | 汤姆森许可贸易公司 | Protected dual-voltage microcircuit power arrangement |
| US7545614B2 (en) * | 2005-09-30 | 2009-06-09 | Renesas Technology America, Inc. | Electrostatic discharge device with variable on time |
| CN101506976A (en) * | 2006-08-24 | 2009-08-12 | 高通股份有限公司 | N-channel ESD clamp with improved performance |
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