CN102006443A - Port switching and signal processing method and circuit - Google Patents
Port switching and signal processing method and circuit Download PDFInfo
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Abstract
The invention relates to a port switching and signal processing method and circuit. The invention provides a port switching and signal processing method which comprises the following steps of: firstly inputting video signals; when the input video signals are the digital signals, directly transmitting digital signals to a video processing unit after electrostatic discharge protection and impedance matching are carried out on the digital signals by a digital signal receiving and processing unit; and when the input video signals are the video graphics array and green synchronous video signals, dividing the video graphics array and green synchronous video signals into two paths to be transmitted and processed after the electrostatic discharge protection and the impedance matching are carried out on video images by a video graphics array\green synchronous signal receiving processing unit. The invention also provides a port switching and signal processing circuit. The invention has the advantages that the input of different signals by the single port is realized, the problem of various interfaces is avoided and the ESD (Electronic Static Discharge) and EFT (Electrical Fast Transient) resistance performance of composite video signals is improved.
Description
Technical field
The present invention relates to the transmission of digital information, relate in particular to a kind of port switching and signal processing method and circuit thereof in the transmission of digital information.
Background technology
Present medical display device mainly uses digital visual interface (Digital Visual Interface is called for short DVI) or analog video interface (Video Graphics Array(shows the drawing array), is called for short VGA; VIDEO+HS(horizontal-drive signal horizontal synchronization is called for short HSYNC or HS)/VS(vertical synchronization (vertical synchronizing signal), be called for short VSYNC or VS); VIDEO+XS; Sync On Green(is synchronously green), be called for short SOG; Composite video signal (composite signal or composite video signal) is called for short CVS), however present display interface technology ubiquity port is various and each port can only be supported one or both above-mentioned signals, the i.e. function singleness of each port.Particularly present display device only is only to support composite video, its anti-ESD(Electro-Static discharge(static discharges), be called for short ESD), anti-EFT(Electrical Fast Transient/burst(electrical fast transient (eft)), be called for short EFT) effect can't satisfy the requirement of medical field at all.
The 0.3V because the synchronous head level of composite video signal (CVS) is only had an appointment, if not adding any isolation directly sends into it in video frequency processing chip (LSI) of back level, the video frequency processing chip of back level is caused by the interference on the CVS very easily can't operate as normal, particularly exert pressure 8KV ESD, and during the EFT of 2KV test, can't pass through at all.And the interface of the signal of display device is very various at present, yet every suit medical diagnostic system is often only exported a kind of signal in actual applications, only needs a kind of signaling interface; Its redundant port has not only caused cost waste and has made troubles for structural design, is unfavorable for the EMI(Electromagnetic Interference(electromagnetic interference of medical grade equipment simultaneously), be called for short EMI) effect.
Summary of the invention
Can't pass through anti-ESD in order to solve in the prior art the various and composite video signal of interface, the problem of EFT test the invention provides a kind of port switching and signal processing method and circuit thereof.
The invention provides a kind of port switches and signal processing method, at first incoming video signal;
When the vision signal of input when being digital signal, described digital signal received through digital signal be delivered directly to video processing unit after processing unit is finished electrostatic discharge protection, impedance matching;
When the vision signal of input is demonstration drawing array, green synchronous video signal; with described demonstration drawing array, green synchronous video signal through demonstration the drawing array after green synchronous signal receives processing unit and finishes electrostatic discharge protection to video image, impedance matching; being divided into two-way transmits and handles; wherein
One tunnel separation synchronizing signal that described demonstration drawing array video signal is comprised, composite synchronizing signal is transported to synchronous switch unit and carries out synchronous switching and shaping, select the synchronous input of composite signal or demonstration drawing array video signal according to user's screen menu type regulative mode operation by described synchronous switch unit, correct demonstration drawing array synchronization video signal conveys is arrived the sampling clock recovery unit, produce the sampling clock that satisfies the analog-to-digital conversion sampling with frequency multiplication, be input to AD conversion unit then, for the analog-to-digital conversion of described AD conversion unit provides reliable and stable sampling clock;
Another road is input to described demonstration drawing array, green synchronous video signal the vision signal amplifying unit and carries out voltage amplification, be transported to AD conversion unit then and carry out analog-to-digital conversion, the digital signal with described AD conversion unit output is transported to described video processing unit again;
When composite signal is imported, described composite signal is divided into two-way transmits and handle, wherein,
One the tunnel with described composite signal be input to composite signal receive processing unit carry out high-barrier from after pass through low-pass filtering, importing synchronous extraction unit again extracts synchronously, peel off out with having only the composite synchronizing signal of 0.3V, described composite synchronizing signal is outputed to described synchronous switch unit with the level amplitude of 5VPP carry out synchronous switching and shaping, select the synchronous input of composite signal or demonstration drawing array video signal according to user's screen menu type regulative mode operation by described synchronous switch unit, correct composite synchronizing signal is outputed to the sampling clock recovery unit, produce the sampling clock that satisfies the analog-to-digital conversion sampling with frequency multiplication, be input to AD conversion unit then, for the analog-to-digital conversion of described AD conversion unit provides reliable and stable sampling clock
Another road is transported to described vision signal amplifying unit with described composite signal and carries out voltage amplification, is transported to AD conversion unit then and carries out analog-to-digital conversion, and the digital signal with described AD conversion unit output is transported to described video processing unit again.
As a further improvement on the present invention, at first, by the DVI-Integrated incoming video signal.
As a further improvement on the present invention, when the composite signal of 1VPP is imported by the blue channel of described DVI-Integrated, described composite signal is carried out high-barrier through metal-oxide-semiconductor Q12 pass through low-pass filtering, import synchronous extraction unit again and extract synchronously from the back.
As a further improvement on the present invention, the described composite signal by low-pass filtering is input to the LM1881 Video Sync Separator Chip and carries out synchronous extraction from the back will to carry out high-barrier through described metal-oxide-semiconductor Q12, described LM1881 Video Sync Separator Chip will have only the composite synchronizing signal of 0.3V to peel off out, output to described synchronous switch unit with the level amplitude of 5VPP and carry out synchronous switching and shaping.
As a further improvement on the present invention, described LM1881 Video Sync Separator Chip will have only the composite synchronizing signal of 0.3V to peel off out, output to described 74HC4052 chip with the level amplitude of 5VPP and carry out synchronous switching and shaping.
The present invention also provides a kind of port to switch and signal processing circuit; comprise the digital signal of carrying out electrostatic discharge protection, impedance matching receive processing unit, carry out electrostatic discharge protection, impedance matching demonstration drawing array green synchronous signal receive processing unit and carry out high-barrier that the composite signal by low-pass filtering receives processing unit from the back; wherein
The output that described digital signal receives processing unit is connected with video processing unit,
Described demonstration drawing array the green synchronous signal output that receives processing unit be connected with vision signal amplifying unit and switch unit synchronously respectively, described vision signal amplifying unit carries out voltage amplification with signal, described demonstration drawing array green synchronous signal receive separation synchronizing signal, composite synchronizing signal that processing unit will show that drawing array video signal is comprised and be transported to described synchronous switch unit and carry out synchronous switching and shaping
The output of described vision signal amplifying unit is connected with AD conversion unit; The output of described AD conversion unit is connected with the input of described video processing unit; The output of described synchronous switch unit is connected with the sampling clock recovery unit; The output of described sampling clock recovery unit is connected with the input of described AD conversion unit; The output of described composite signal reception ﹠ disposal unit is connected with synchronous extraction unit; The output of described synchronous extraction unit is connected with the input of described synchronous switch unit; Wherein
Described synchronous extraction unit will have only the composite synchronizing signal of 0.3V to peel off out, again described composite synchronizing signal is outputed to described synchronous switch unit with the level amplitude of 5VPP and carry out synchronous switching and shaping, described synchronous switch unit will be selected the synchronous input of composite signal or demonstration drawing array according to user's screen menu type regulative mode operation, and correct synchronizing signal outputed to described sampling clock recovery unit, frequency multiplication produces the sampling clock that satisfies the analog-to-digital conversion sampling, be input to AD conversion unit then, for the analog-to-digital conversion of described AD conversion unit provides reliable and stable sampling clock.
As a further improvement on the present invention, described port switches and signal processing circuit comprises DVI-Integrated, described digital signal receives processing unit, show the drawing array green synchronous signal receive processing unit, composite signal receives processing unit and is connected with described DVI-Integrated respectively with the vision signal amplifying unit.
As a further improvement on the present invention, described composite signal receives processing unit and comprises metal-oxide-semiconductor Q12, the grid of described metal-oxide-semiconductor Q12 is connected with the blue channel of described DVI-Integrated, the drain electrode of described metal-oxide-semiconductor Q12 be connected described demonstration drawing array green synchronous signal receive between the input of the output of processing unit and described vision signal amplifying unit, the source electrode of described metal-oxide-semiconductor Q12 is connected with the input of described synchronous extraction unit.
As a further improvement on the present invention, described synchronous extraction unit comprises the LM1881 Video Sync Separator Chip, the source electrode of described metal-oxide-semiconductor Q12 is connected with the input of described LM1881 Video Sync Separator Chip, and the CSOUT end of described LM1881 Video Sync Separator Chip is connected with the input of described synchronous switch unit.
As a further improvement on the present invention, described synchronous switch unit comprises the 74HC4052 chip, the CSOUT end of described LM1881 Video Sync Separator Chip is connected with described 74HC4052 chip 2Y1 end, described demonstration drawing array the green synchronous signal separation synchronizing signal that receives processing unit output comprise vertical synchronizing signal and horizontal-drive signal, described vertical synchronizing signal is connected with the 1Y0 end of described 74HC4052 chip, and described horizontal-drive signal is connected with the 2Y0 end of described 74HC4052 chip.
The invention has the beneficial effects as follows: by such scheme, realize the input of single-port unlike signal, avoided the various problem of interface, and, improved the anti-ESD of composite video signal, the EFT performance.
Description of drawings
Fig. 1 is the theory diagram of a kind of port switching of the present invention and signal processing circuit;
Fig. 2 is the circuit diagram of port switching of the present invention and signal processing circuit.
Embodiment
The present invention is further described below in conjunction with description of drawings and embodiment.
Drawing reference numeral among Fig. 1 to Fig. 2 is: digital signal receives processing unit 1; VGA SCG signal processing unit 2; Vision signal amplifying unit 3; AD conversion unit 4; Synchronous switch unit 5; Sampling clock recovery unit 6; CVS signal processing unit 7; Synchronous extraction unit 8; MCU(Micro Control Unit(microcontroller), be called for short MCU) 9; Signal input module Power Management Unit 10; Video processing unit 100.
To shown in Figure 2, a kind of port switches and signal processing method as Fig. 1, incoming video signal at first, and the vision signal of this input can be digital signal, also can be analog signal; Wherein,
When the vision signal of input when being digital signal, described digital signal received through digital signal be delivered directly to video processing unit 100 after processing unit 1 is finished electrostatic discharge (ESD) protection, impedance matching, carry out next step calculation process;
When the vision signal of importing is demonstration drawing array (VGA); during green (SOG) vision signal synchronously; described demonstration drawing array (VGA); green (SOG) vision signal is synchronously imported by blue channel (Blue); with described demonstration drawing array (VGA); green (SOG) vision signal synchronously through demonstration the drawing array green synchronous signal receive processing unit and finish electrostatic discharge protection video image; after the impedance matching; described demonstration drawing array green synchronous signal receive processing unit can be abbreviated as VGA SCG signal processing unit 2; signal is divided into two-way to be transmitted and handles; wherein
One the tunnel with described demonstration drawing array (VGA) the separation synchronizing signal that vision signal comprised (H+V, be HS+VS), composite synchronizing signal (XS) is transported to synchronous switch unit 5 and carries out synchronous switching and shaping, by screen menu type regulative mode (the on-screen display of described synchronous switch unit 8 according to the user, abbreviation OSD) the synchronous input of composite signal (CVS) or demonstration drawing array (VGA) vision signal is selected in operation, and correct demonstration drawing array (VGA) synchronous video signal outputed to (ADC) sampling clock recovery unit 6, produce the sampling clock that satisfies the analog-to-digital conversion sampling with frequency multiplication, be input to AD conversion unit 4 then, for the analog-to-digital conversion of described AD conversion unit 4 provides reliable and stable sampling clock
Another road outputs to the voltage amplification (being that electric current strengthens) that vision signal amplifying unit 3 carries out 1:1 with described demonstration drawing array (VAG), green (SOG) vision signal synchronously, be transported to AD conversion unit 4 then and carry out analog-to-digital conversion, described AD conversion unit 4 is carried out analog-to-digital conversion according to the above-mentioned sampling clock that provides and is exported digital signal to described video processing unit 100, carry out next step calculation process, described AD conversion unit 4 can abbreviate ADC unit (conversion of audio digital conversion(analog digital) as, is called for short ADC);
When the composite signal (CVS) of 1VPP is imported by blue channel (Blue), described composite signal is divided into two-way transmits and handle, wherein,
One the tunnel with described composite signal (CVS) be input to composite signal receive processing unit carry out high-barrier from after pass through low-pass filtering, importing synchronous extraction unit 7 again extracts synchronously, to have only the composite synchronizing signal of 0.3V to peel off out, described composite synchronizing signal is outputed to described synchronous switch unit 8 with the level amplitude of 5VPP carry out synchronous switching and shaping from vision signal; Composite signal receives processing unit can abbreviate CVS reception processing unit 7 as, described synchronous switch unit 8 will be according to user's screen menu type regulative mode, (on-screen display, be called for short OSD) operation selection composite signal, (CVS) or show the drawing array, (VGA) the synchronous input of vision signal, and export correct composite synchronizing signal and arrive, (ADC) the sampling clock recovery unit 6, frequency multiplication produces the sampling clock that satisfies the analog-to-digital conversion sampling, for the analog-to-digital conversion of described AD conversion unit 4 provides reliable and stable sampling clock
Another road is transported to described vision signal amplifying unit 3 with described composite signal and carries out voltage amplification, is transported to AD conversion unit 4 then and carries out analog-to-digital conversion, and the digital signal with described AD conversion unit 4 outputs is transported to described video processing unit 100 again.
At first, by DVI-I(Digital Visual Interface, be called for short DVI) the interface incoming video signal.When being input as digital DVI signal, can select for use the DVI-D holding wire of standard directly to connect display device and signal source.When being input as synchronous VGA of separation or SOG vision signal, the signal wire rod that can select for use the supporting DVI-A that provides to change VGA is transferred.When being input as VIDEO+XS/HS/VS, CVS composite video signal, the signal wire rod that can select for use the supporting DVI-A that provides to change BNC is transferred.
When the composite signal (CVS) of 1VPP is imported by the blue channel (BLUE) of described DVI-Integrated, described composite signal (CVS) is carried out high-barrier through metal-oxide-semiconductor Q12 pass through low-pass filtering from the back, import synchronous extraction unit 8 again and extract synchronously.
The described composite signal (CVS) by low-pass filtering is input to the LM1881 Video Sync Separator Chip and carries out synchronous extraction from the back will to carry out high-barrier through described metal-oxide-semiconductor Q12, described LM1881 Video Sync Separator Chip will have only the composite synchronizing signal of 0.3V to peel off out from vision signal, output to described synchronous switch unit 5 with the level amplitude of 5VPP and carry out synchronous switching and shaping.
Described LM1881 Video Sync Separator Chip will have only the composite synchronizing signal of 0.3V to peel off out, output to described 74HC4052 chip with the level amplitude of 5VPP and carry out synchronous switching and shaping.
Extremely shown in Figure 2 as Fig. 1; the present invention also provides a kind of port to switch and signal processing circuit; comprise the digital signal of carrying out electrostatic discharge (ESD) protection, impedance matching receive processing unit 1, carry out electrostatic discharge (ESD) protection, impedance matching demonstration drawing array (VGA) green (SOG) signal processing unit synchronously and carry out high-barrier the composite signal (CVS) by low-pass filtering receives processing unit from the back; wherein
The output that described digital signal receives processing unit 1 directly is connected with video processing unit 100; the digital signal of input can receive by described digital signal and be delivered directly to described video processing unit 100 after processing unit 1 is finished electrostatic discharge (ESD) protection, impedance matching; carry out next step calculation process
Described demonstration drawing array (VGA) the green output of (SOG) signal processing unit synchronously be connected with vision signal amplifying unit 3 and switch unit 5 synchronously respectively, described vision signal amplifying unit 3 carries out signal the voltage amplification (being that electric current strengthens) of 1:1, described demonstration drawing array (VGA) green (SOG) signal processing unit synchronously will show drawing array (VGA) separation synchronizing signal (H+V that vision signal comprised, be HS+VS), composite synchronizing signal (XS) is transported to described synchronous switch unit 5 and carries out synchronous switching and shaping
The output of described vision signal amplifying unit 3 is connected with analog-to-digital conversion (ADC) unit 4, the output of described analog-to-digital conversion (ADC) unit 4 is connected with the input of described video processing unit 100, the output of described synchronous switch unit 5 is connected with sampling clock recovery unit 6, the output of described sampling clock recovery unit 6 is connected with the input of described analog-to-digital conversion (ADC) unit 4, the output that described composite signal receives processing unit is connected with synchronous extraction unit 8, the output of described synchronous extraction unit 8 is connected with the input of described synchronous switch unit 6, wherein
Described synchronous extraction unit 8 will have only the composite synchronizing signal of 0.3V to peel off out from vision signal, again described composite synchronizing signal is outputed to described synchronous switch unit 5 with the level amplitude of 5VPP and carry out synchronous switching and shaping, described synchronous switch unit 5 will be selected the synchronous input of composite signal (CVA) or demonstration drawing array (VGA) according to user's screen menu type regulative mode (OSD) operation, and output to described sampling clock recovery unit 6, frequency multiplication produces the sampling clock that satisfies the analog-to-digital conversion sampling, be input to analog-to-digital conversion (ADC) unit 4 then, for the analog-to-digital conversion of described AD conversion unit 4 provides reliable and stable sampling clock
The input of described synchronous switch unit 5 is connected with the MCU(microprocessor), described MCU is connected with the signal input module Power Management Unit.
Described port switches and signal processing circuit comprises DVI-Integrated, described digital signal receives processing unit 1, show drawing array (VGA) green (SOG) signal processing unit synchronously, composite signal (CVA) receive processing unit and be connected with described DVI-Integrated respectively with vision signal amplifying unit 3.
Described composite signal (CVS) receives processing unit and comprises metal-oxide-semiconductor Q12, the grid of described metal-oxide-semiconductor Q12 (being the G utmost point) is connected with the blue channel (BLUE) of described DVI-Integrated, the drain electrode of described metal-oxide-semiconductor Q12 (being the D utmost point) be connected described demonstration drawing array (VGA) between the input of the output of green (SOG) signal processing unit synchronously and described vision signal amplifying unit 2, the source electrode of described metal-oxide-semiconductor Q12 (being the S utmost point) is connected with the input of described synchronous extraction unit 7, can realize to composite signal (CVS) carry out high-barrier from, low-pass filtering.
Described synchronous extraction unit 7 comprises the LM1881 Video Sync Separator Chip, the source electrode of described metal-oxide-semiconductor Q12 is connected with the input of described LM1881 Video Sync Separator Chip, and the CSOUT end of described LM1881 Video Sync Separator Chip is connected with the input of described synchronous switch unit 5.
Described synchronous switch unit 5 comprises the 74HC4052 chip, the CSOUT end of described LM1881 Video Sync Separator Chip is connected with described 74HC4052 chip 2Y1 end, described demonstration drawing array (VGA) the separation synchronizing signal of green (SOG) signal processing unit synchronously output comprise vertical synchronizing signal (HS) and horizontal-drive signal (VS), described vertical synchronizing signal (VS) is connected with the 1Y0 end of described 74HC4052 chip, and described horizontal-drive signal (HS) is connected with the 2Y0 end of described 74HC4052 chip.
A kind of port switching provided by the invention and signal processing method and circuit thereof have been realized the input of single-port unlike signal, have avoided the various problem of interface, and, having improved the anti-ESD of composite video signal, the EFT performance helps by anti-ESD, the EFT test.
Above content be in conjunction with concrete preferred implementation to further describing that the present invention did, can not assert that concrete enforcement of the present invention is confined to these explanations.For the general technical staff of the technical field of the invention, without departing from the inventive concept of the premise, can also make some simple deduction or replace, all should be considered as belonging to protection scope of the present invention.
Claims (10)
1. a port switches and signal processing method, it is characterized in that: incoming video signal at first;
When the vision signal of input when being digital signal, described digital signal received through digital signal be delivered directly to video processing unit after processing unit is finished electrostatic discharge protection, impedance matching;
When the vision signal of input is demonstration drawing array, green synchronous video signal; with described demonstration drawing array, green synchronous video signal through demonstration the drawing array after green synchronous signal receives processing unit and finishes electrostatic discharge protection to video image, impedance matching; being divided into two-way transmits and handles; wherein
One tunnel separation synchronizing signal that described demonstration drawing array video signal is comprised, composite synchronizing signal is transported to synchronous switch unit and carries out synchronous switching and shaping, select the synchronous input of composite signal or demonstration drawing array video signal according to user's screen menu type regulative mode operation by described synchronous switch unit, correct demonstration drawing array synchronization video signal conveys is arrived the sampling clock recovery unit, produce the sampling clock that satisfies the analog-to-digital conversion sampling with frequency multiplication, be input to AD conversion unit then, for the analog-to-digital conversion of described AD conversion unit provides reliable and stable sampling clock;
Another road is input to described demonstration drawing array, green synchronous video signal the vision signal amplifying unit and carries out voltage amplification, be transported to AD conversion unit then and carry out analog-to-digital conversion, the digital signal with described AD conversion unit output is transported to described video processing unit again;
When composite signal is imported, described composite signal is divided into two-way transmits and handle, wherein,
One the tunnel with described composite signal be input to composite signal receive processing unit carry out high-barrier from after pass through low-pass filtering, importing synchronous extraction unit again extracts synchronously, peel off out with having only the composite synchronizing signal of 0.3V, described composite synchronizing signal is outputed to described synchronous switch unit with the level amplitude of 5VPP carry out synchronous switching and shaping, select the synchronous input of composite signal or demonstration drawing array video signal according to user's screen menu type regulative mode operation by described synchronous switch unit, correct composite synchronizing signal is outputed to the sampling clock recovery unit, produce the sampling clock that satisfies the analog-to-digital conversion sampling with frequency multiplication, be input to AD conversion unit then, for the analog-to-digital conversion of described AD conversion unit provides reliable and stable sampling clock
Another road is transported to described vision signal amplifying unit with described composite signal and carries out voltage amplification, is transported to AD conversion unit then and carries out analog-to-digital conversion, and the digital signal with described AD conversion unit output is transported to described video processing unit again.
2. port according to claim 1 switches and signal processing method, it is characterized in that: at first, and by the DVI-Integrated incoming video signal.
3. port according to claim 2 switches and signal processing method, it is characterized in that: when the composite signal of 1VPP is imported by the blue channel of described DVI-Integrated, described composite signal is carried out high-barrier through metal-oxide-semiconductor Q12 pass through low-pass filtering, import synchronous extraction unit again and extract synchronously from the back.
4. port according to claim 3 switches and signal processing method, it is characterized in that: the described composite signal by low-pass filtering is input to the LM1881 Video Sync Separator Chip and carries out synchronous extraction from the back will to carry out high-barrier through described metal-oxide-semiconductor Q12, described LM1881 Video Sync Separator Chip will have only the composite synchronizing signal of 0.3V to peel off out, output to described synchronous switch unit with the level amplitude of 5VPP and carry out synchronous switching and shaping.
5. port according to claim 4 switches and signal processing method, it is characterized in that: described LM1881 Video Sync Separator Chip will have only the composite synchronizing signal of 0.3V to peel off out, output to described 74HC4052 chip with the level amplitude of 5VPP and carry out synchronous switching and shaping.
6. a port switches and signal processing circuit; it is characterized in that: comprise the digital signal of carrying out electrostatic discharge protection, impedance matching receive processing unit, carry out electrostatic discharge protection, impedance matching demonstration drawing array green synchronous signal receive processing unit and carry out high-barrier that the composite signal by low-pass filtering receives processing unit from the back; wherein
The output that described digital signal receives processing unit is connected with video processing unit,
Described demonstration drawing array the green synchronous signal output that receives processing unit be connected with vision signal amplifying unit and switch unit synchronously respectively, described vision signal amplifying unit carries out voltage amplification with signal, described demonstration drawing array green synchronous signal receive separation synchronizing signal, composite synchronizing signal that processing unit will show that drawing array video signal is comprised and be transported to described synchronous switch unit and carry out synchronous switching and shaping
The output of described vision signal amplifying unit is connected with AD conversion unit; The output of described AD conversion unit is connected with the input of described video processing unit; The output of described synchronous switch unit is connected with the sampling clock recovery unit; The output of described sampling clock recovery unit is connected with the input of described AD conversion unit; The output of described composite signal reception ﹠ disposal unit is connected with synchronous extraction unit; The output of described synchronous extraction unit is connected with the input of described synchronous switch unit; Wherein
Described synchronous extraction unit will have only the composite synchronizing signal of 0.3V to peel off out, again described composite synchronizing signal is outputed to described synchronous switch unit with the level amplitude of 5VPP and carry out synchronous switching and shaping, described synchronous switch unit will be selected the synchronous input of composite signal or demonstration drawing array according to user's screen menu type regulative mode operation, and correct synchronizing signal outputed to described sampling clock recovery unit, frequency multiplication produces the sampling clock that satisfies the analog-to-digital conversion sampling, be input to AD conversion unit then, for the analog-to-digital conversion of described AD conversion unit provides reliable and stable sampling clock.
7. port according to claim 6 switches and signal processing circuit, it is characterized in that: described port switches and signal processing circuit comprises DVI-Integrated, described digital signal receives processing unit, show the drawing array green synchronous signal receive processing unit, composite signal receives processing unit and is connected with described DVI-Integrated respectively with the vision signal amplifying unit.
8. port according to claim 7 switches and signal processing circuit, it is characterized in that: described composite signal receives processing unit and comprises metal-oxide-semiconductor Q12, the grid of described metal-oxide-semiconductor Q12 is connected with the blue channel of described DVI-Integrated, the drain electrode of described metal-oxide-semiconductor Q12 be connected described demonstration drawing array green synchronous signal receive between the input of the output of processing unit and described vision signal amplifying unit, the source electrode of described metal-oxide-semiconductor Q12 is connected with the input of described synchronous extraction unit.
9. port according to claim 8 switches and signal processing circuit, it is characterized in that: described synchronous extraction unit comprises the LM1881 Video Sync Separator Chip, the source electrode of described metal-oxide-semiconductor Q12 is connected with the input of described LM1881 Video Sync Separator Chip, and the CSOUT end of described LM1881 Video Sync Separator Chip is connected with the input of described synchronous switch unit.
10. port according to claim 9 switches and signal processing circuit, it is characterized in that: described synchronous switch unit comprises the 74HC4052 chip, the CSOUT end of described LM1881 Video Sync Separator Chip is connected with described 74HC4052 chip 2Y1 end, described demonstration drawing array the green synchronous signal separation synchronizing signal that receives processing unit output comprise vertical synchronizing signal and horizontal-drive signal, described vertical synchronizing signal is connected with the 1Y0 end of described 74HC4052 chip, and described horizontal-drive signal is connected with the 2Y0 end of described 74HC4052 chip.
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| CN106713809A (en) * | 2016-12-28 | 2017-05-24 | 中国科学院长春光学精密机械与物理研究所 | Video format conversion device |
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| CN2876893Y (en) * | 2006-02-24 | 2007-03-07 | 环达电脑(上海)有限公司 | High grade digital display interface converting card device for computer |
| CN200980136Y (en) * | 2006-03-21 | 2007-11-21 | 高炳海 | A television-computer converter |
| CN101349984A (en) * | 2007-07-17 | 2009-01-21 | 鸿富锦精密工业（深圳）有限公司 | Device for testing video graphics interface |
| US20090079717A1 (en) * | 2007-09-21 | 2009-03-26 | Mstar Semiconductor, Inc. | Quick Port-Switching Method and Associated Apparatus |
| CN201869304U (en) * | 2010-12-07 | 2011-06-15 | 深圳市巨潮科技有限公司 | Port switching and signal processing circuit |
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| CN102724470A (en) * | 2012-05-30 | 2012-10-10 | 中国科学院长春光学精密机械与物理研究所 | Device for converting SOG videos into VGA videos |
| CN104424911A (en) * | 2013-08-26 | 2015-03-18 | 英业达科技有限公司 | VGA interface protection circuit |
| CN104424911B (en) * | 2013-08-26 | 2016-08-31 | 英业达科技有限公司 | Video graphics array (VGA) interface protective circuit |
| CN106713809A (en) * | 2016-12-28 | 2017-05-24 | 中国科学院长春光学精密机械与物理研究所 | Video format conversion device |
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