CN102005776A - Electric interlocking circuit and implementation method thereof - Google Patents

Abstract

The invention belongs to the technical field of power supply systems, and particularly relates to an electric interlocking circuit and an implementation method thereof, wherein when a truth table of a certain breaker is obtained, all circuits except the breaker are taken as an integral breaker variable, the breaker variable is further decomposed, and the truth table of an initial breaker is obtained through layer-by-layer iteration; repeating the steps to finally obtain truth tables of all circuit breakers; an electrical interlock circuit is implemented according to the truth table. The technical scheme provided by the invention provides a simple and reliable interlocking circuit design and implementation method for the condition of a multi-power-supply incoming line circuit breaker and a bus-tie circuit breaker of an electric power system, and the simplest interlocking circuit is obtained by utilizing a truth table and a circuit simplification method, so that the switching of the transformer is convenient, the purpose of economic operation of the transformer is achieved, meanwhile, misoperation can be avoided, and the reliability of power supply is ensured.

Description

Electrical interlock circuit and its implementation

Technical field

The invention belongs to the electric power system technical field, be specifically related to a kind of electrical interlock circuit and its implementation.

Background technology

In the application of electric power system, low-voltage power supply system is made up of some transformers and bus usually, also comprises inlet wire and bus circuit breaker.The permission closure condition of each circuit breaker (switch) is subjected to the restriction of all the other circuit breakers.This just runs into many many buses of power supply handoff procedure electrical interlock problems through regular meeting, that is necessary electrical interlock must be set between electric power incoming line circuit breaker and the bus circuit breaker, preventing misoperation, thereby avoids device damage and human casualty accident.

The design of the interlocking of two inlet wires in the electric power system and a bus circuit breaker has many classical schemes available, but when the quantity of circuit breaker was big, the interlocking between them is complexity comparatively.For example, to 4 road inlet wires, the power circuit of 4 sections buses is provided with contact between the bus, 7 circuit breakers need be set altogether, as shown in Figure 1.Because whether every circuit breaker (switch) allows closure to be subjected to the restriction of other 6 circuit breakers, if directly obtain logical expression with truth table method, because variable is many, not only truth table is too huge, and after utilizing truth table to write out expression formula, utilize equation or map Karnaugh abbreviation all very difficult, it is also very difficult to obtain the simplest expression formula, and its interlock circuit also has no way of obtaining.

Summary of the invention

(1) goal of the invention

The object of the invention is to solve the problem of the electrical interlock circuit of above-mentioned many electric power incoming lines of electric power system circuit breaker and bus.

(2) technical scheme

For achieving the above object, the invention provides following technical scheme:

A kind of electrical interlock circuit of low-voltage power supply system comprises electric power incoming line, transformer, bus, electric power incoming line circuit breaker and bus circuit breaker, and described electric power incoming line circuit breaker quantity is more than or equal to 4 the tunnel, and described bus circuit breaker quantity is more than or equal to 3 the tunnel.

A kind of method that realizes many power supplys, many buses electrical interlock circuit, comprise electric power incoming line, transformer, bus, electric power incoming line circuit breaker and bus circuit breaker, described electric power incoming line circuit breaker quantity is more than or equal to 4 the tunnel, described bus circuit breaker quantity is more than or equal to 3 the tunnel, key is: when asking for the truth table of certain circuit breaker, whole circuit outside this circuit breaker are made as a whole circuit breaker variable, and this circuit breaker variable further decomposed, by iteration successively, try to achieve the truth table of initial circuit breaker; Repeat above-mentioned steps, finally try to achieve the truth table of all circuit breakers; Realize the electrical interlock circuit according to above-mentioned truth table.

(3) beneficial effect

Technical scheme provided by the invention provides a kind of design and implementation method simple, interlock circuit reliably for the situation of many electric power incoming lines of electric power system circuit breaker and bus circuit breaker, utilize the method for truth table and circuit reduction to try to achieve the simplest interlock circuit, can make the switching of transformer convenient, reach the purpose of transformer economic operation, simultaneously, also can avoid misoperation, guarantee the reliability of power supply.

Description of drawings

Fig. 1 is the schematic diagram of the low-voltage power supply system interlock circuit that provides in the embodiment;

Fig. 2 is the circuit breaker Q in the embodiment ₃Interlock circuit.

Embodiment

The present invention will be further described below in conjunction with specific embodiment.

Present embodiment provides the interlock circuit of applied low-voltage power supply system in the Chinese advanced research reactor (CARR), as shown in Figure 1.The CARR low-voltage power supply system has four lead-in circuit breakers, three bus circuit breakers; Be the design interlock circuit, at first must analyze, put in order that the result is as shown in table 1 to the operational mode of transformer and the state of each circuit breaker.Q ₁, Q ₂, Q ₃And Q ₄Represent low pressure I, II, III and IV section lead-in circuit breaker respectively; Q ₁₂Be low pressure I, II section bus; Q ₁₃Be low pressure I, III section bus; Q ₂₄Be low pressure II, IV section bus.

The operational mode of table 1 transformer and the state of each circuit breaker

The interlock circuit design

1, two lead-in circuit breaker and a bus circuit breaker interlock circuit

To four transformers, four sections buses, because wherein whether every circuit breaker (switch) allows closure to be subjected to the restriction of all the other 6 circuit breakers, if directly obtain logical expression with truth table method, not only truth table huge (2 ⁶=64 row), and utilize equation or the map Karnaugh abbreviation all can't obtain the simplest expression formula, its interlock circuit also has no way of obtaining.Therefore, have only from 2 sections buses of 2 transformers and start with, derive its expression formula and corresponding circuit.Prescribed switch is 1 when closed, is broken as 0, and it is as shown in table 2 to list truth table.

Table 2 circuit breaker Q ₁, Q ₂And Q ₁₂The state truth table

Obtain Q from table 2 ₁, Q ₂And Q ₁₂Expression formula

${\mathrm{<figure-callout\; id="1"\; label="Q"\; filenames="HSA00000331367200011.png"\; state="\{\{state\}\}">Q</figure-callout>}}_1=\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="2"\; label="Q"\; filenames="HSA00000331367200011.png"\; state="\{\{state\}\}">Q</figure-callout>}}_2}\&CenterDot;\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="12"\; label="Q"\; filenames="HSA00000331367200012.png"\; state="\{\{state\}\}">Q</figure-callout>}}_{12}}+\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="2"\; label="Q"\; filenames="HSA00000331367200011.png"\; state="\{\{state\}\}">Q</figure-callout>}}_2}\&CenterDot;{\mathrm{<figure-callout\; id="12"\; label="Q"\; filenames="HSA00000331367200012.png"\; state="\{\{state\}\}">Q</figure-callout>}}_{12}+{\mathrm{<figure-callout\; id="2"\; label="Q"\; filenames="HSA00000331367200011.png"\; state="\{\{state\}\}">Q</figure-callout>}}_2\&CenterDot;\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="12"\; label="Q"\; filenames="HSA00000331367200012.png"\; state="\{\{state\}\}">Q</figure-callout>}}_{12}}=\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="2"\; label="Q"\; filenames="HSA00000331367200011.png"\; state="\{\{state\}\}">Q</figure-callout>}}_2}+{\mathrm{<figure-callout\; id="2"\; label="Q"\; filenames="HSA00000331367200011.png"\; state="\{\{state\}\}">Q</figure-callout>}}_2\&CenterDot;\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="12"\; label="Q"\; filenames="HSA00000331367200012.png"\; state="\{\{state\}\}">Q</figure-callout>}}_{12}}=\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="2"\; label="Q"\; filenames="HSA00000331367200011.png"\; state="\{\{state\}\}">Q</figure-callout>}}_2}+\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="12"\; label="Q"\; filenames="HSA00000331367200012.png"\; state="\{\{state\}\}">Q</figure-callout>}}_{12}}$

${\mathrm{<figure-callout\; id="2"\; label="Q"\; filenames="HSA00000331367200011.png"\; state="\{\{state\}\}">Q</figure-callout>}}_2=\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="1"\; label="Q"\; filenames="HSA00000331367200011.png"\; state="\{\{state\}\}">Q</figure-callout>}}_1}+\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="12"\; label="Q"\; filenames="HSA00000331367200012.png"\; state="\{\{state\}\}">Q</figure-callout>}}_{12}}$

${\mathrm{<figure-callout\; id="12"\; label="Q"\; filenames="HSA00000331367200012.png"\; state="\{\{state\}\}">Q</figure-callout>}}_{12}=\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="1"\; label="Q"\; filenames="HSA00000331367200011.png"\; state="\{\{state\}\}">Q</figure-callout>}}_1}+\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="2"\; label="Q"\; filenames="HSA00000331367200011.png"\; state="\{\{state\}\}">Q</figure-callout>}}_2}$

Can draw its corresponding circuit according to expression formula, as table 3

Table 3 circuit breaker Q ₁, Q ₂And Q ₁₂Interlock circuit

2, four inlet wires and triple bus-bar circuit breaker interlock circuit

If with circuit breaker (variable) Q _mRepresent the circuit in the empty frame, Q ₃Be subjected to Q ₁₃And Q _mConstraint, promptly

${\mathrm{<figure-callout\; id="3"\; label="Q"\; filenames="HSA00000331367200011.png"\; state="\{\{state\}\}">Q</figure-callout>}}_3=\stackrel{\&OverBar;}{Q_{13}}+\stackrel{\&OverBar;}{Q_m}$

Q _mAlso can further decompose, be the equipment equivalence in the strokes and dots wire frame circuit breaker (variable) Q _n, the variable of truth table is reduced, find the solution also than being easier to, promptly

$Q_m=\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="12"\; label="Q"\; filenames="HSA00000331367200012.png"\; state="\{\{state\}\}">Q</figure-callout>}}_{12}}+\stackrel{\&OverBar;}{Q_n}$

Same prescribed switch is 1 when closed, is broken as 0, Q _mBe subjected to Q ₁, Q ₂, Q _nConstraint, obtain truth table as shown in table 4.

Table 4 circuit breaker Q ₁, Q ₁₂, Q _nAnd Q _mThe state truth table

Its expression formula is $\stackrel{\&OverBar;}{Q_m}=\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="1"\; label="Q"\; filenames="HSA00000331367200011.png"\; state="\{\{state\}\}">Q</figure-callout>}}_1}\&CenterDot;\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="12"\; label="Q"\; filenames="HSA00000331367200012.png"\; state="\{\{state\}\}">Q</figure-callout>}}_{12}}\&CenterDot;\stackrel{\&OverBar;}{Q_n}+\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="1"\; label="Q"\; filenames="HSA00000331367200011.png"\; state="\{\{state\}\}">Q</figure-callout>}}_1}\&CenterDot;\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="12"\; label="Q"\; filenames="HSA00000331367200012.png"\; state="\{\{state\}\}">Q</figure-callout>}}_{12}}\&CenterDot;Q_n+\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="1"\; label="Q"\; filenames="HSA00000331367200011.png"\; state="\{\{state\}\}">Q</figure-callout>}}_1}\&CenterDot;\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="12"\; label="Q"\; filenames="HSA00000331367200012.png"\; state="\{\{state\}\}">Q</figure-callout>}}_{12}}\&CenterDot;\stackrel{\&OverBar;}{Q_n}=\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="1"\; label="Q"\; filenames="HSA00000331367200011.png"\; state="\{\{state\}\}">Q</figure-callout>}}_1}(\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="12"\; label="Q"\; filenames="HSA00000331367200012.png"\; state="\{\{state\}\}">Q</figure-callout>}}_{12}}+\stackrel{\&OverBar;}{Q_n})$

Q _nBe subjected to Q ₂, Q ₄And Q ₂₄With restriction, it is as shown in table 5 to draw its truth table.

Table 5 circuit breaker Q ₂, Q ₂₄, Q ₄And Q _nThe state truth table

Its expression formula is

$\stackrel{\&OverBar;}{Q_n}=\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="2"\; label="Q"\; filenames="HSA00000331367200011.png"\; state="\{\{state\}\}">Q</figure-callout>}}_2}\&CenterDot;\stackrel{\&OverBar;}{Q_{24}}\&CenterDot;\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="4"\; label="Q"\; filenames="HSA00000331367200011.png,HSA00000331367200012.png"\; state="\{\{state\}\}">Q</figure-callout>}}_4}+\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="2"\; label="Q"\; filenames="HSA00000331367200011.png"\; state="\{\{state\}\}">Q</figure-callout>}}_2}\&CenterDot;\stackrel{\&OverBar;}{Q_{24}}\&CenterDot;{\mathrm{<figure-callout\; id="4"\; label="Q"\; filenames="HSA00000331367200011.png,HSA00000331367200012.png"\; state="\{\{state\}\}">Q</figure-callout>}}_4+\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="2"\; label="Q"\; filenames="HSA00000331367200011.png"\; state="\{\{state\}\}">Q</figure-callout>}}_2}\&CenterDot;\stackrel{\&OverBar;}{Q_{24}}\&CenterDot;\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="4"\; label="Q"\; filenames="HSA00000331367200011.png,HSA00000331367200012.png"\; state="\{\{state\}\}">Q</figure-callout>}}_4}=\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="2"\; label="Q"\; filenames="HSA00000331367200011.png"\; state="\{\{state\}\}">Q</figure-callout>}}_2}(\stackrel{\&OverBar;}{Q_{24}}+\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="4"\; label="Q"\; filenames="HSA00000331367200011.png,HSA00000331367200012.png"\; state="\{\{state\}\}">Q</figure-callout>}}_4})$

Draw by above-mentioned formula

${\mathrm{<figure-callout\; id="3"\; label="Q"\; filenames="HSA00000331367200011.png"\; state="\{\{state\}\}">Q</figure-callout>}}_3=\stackrel{\&OverBar;}{Q_{13}}+\stackrel{\&OverBar;}{Q_m}=\stackrel{\&OverBar;}{Q_{13}}+\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="1"\; label="Q"\; filenames="HSA00000331367200011.png"\; state="\{\{state\}\}">Q</figure-callout>}}_1}(\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="12"\; label="Q"\; filenames="HSA00000331367200012.png"\; state="\{\{state\}\}">Q</figure-callout>}}_{12}}+\stackrel{\&OverBar;}{Q_n})=\stackrel{\&OverBar;}{Q_{13}}+\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="1"\; label="Q"\; filenames="HSA00000331367200011.png"\; state="\{\{state\}\}">Q</figure-callout>}}_1}[\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="12"\; label="Q"\; filenames="HSA00000331367200012.png"\; state="\{\{state\}\}">Q</figure-callout>}}_{12}}+\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="2"\; label="Q"\; filenames="HSA00000331367200011.png"\; state="\{\{state\}\}">Q</figure-callout>}}_2}(\stackrel{\&OverBar;}{Q_{24}}+\stackrel{\&OverBar;}{{\mathrm{<figure-callout\; id="4"\; label="Q"\; filenames="HSA00000331367200011.png,HSA00000331367200012.png"\; state="\{\{state\}\}">Q</figure-callout>}}_4})]$

By the following formula Q that promptly can draw ₃The interlock circuit of circuit breaker, as shown in Figure 2.

In like manner, can obtain other circuit breaker and allow closed expression formula.The interlock circuit of more than trying to achieve inserts the closing circuit of circuit breaker, and circuit breaker could close a floodgate satisfying under the defined terms.

3, the situation for more lead-in circuit breakers and bus circuit breaker can adopt said method design.The quantity of described lead-in circuit breaker and bus circuit breaker is many more, can embody the superiority of implementation method provided by the present invention more.

Above content be in conjunction with preferred embodiment to specifying that the present invention did, can not assert that the specific embodiment of the present invention only limits to these explanations.Concerning the general technical staff of the technical field of the invention, without departing from the inventive concept of the premise, can also make some simple deductions and conversion, all should be considered as belonging to protection scope of the present invention.

Claims (3)

1. the electrical interlock circuit of a low-voltage power supply system, comprise electric power incoming line, transformer, bus, electric power incoming line circuit breaker and bus circuit breaker, it is characterized in that: described electric power incoming line circuit breaker quantity is more than or equal to 4 the tunnel, and described bus circuit breaker quantity is more than or equal to 3 the tunnel.

2. the implementation method of an electrical interlock circuit, comprise electric power incoming line, transformer, bus, electric power incoming line circuit breaker and bus circuit breaker, it is characterized in that: when asking for the truth table of certain circuit breaker, whole circuit outside this circuit breaker are made as a whole circuit breaker variable, and this circuit breaker variable further decomposed, by iteration successively, try to achieve the truth table of initial circuit breaker; Repeat above-mentioned steps, finally try to achieve the truth table of all circuit breakers; Realize the electrical interlock circuit according to above-mentioned truth table.

3. the implementation method of electrical interlock circuit according to claim 2 is characterized in that: the electric power incoming line circuit breaker quantity of described electrical interlock circuit is more than or equal to 4 the tunnel, and described bus circuit breaker quantity is more than or equal to 3 the tunnel.

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