CN102005535B - Method for preparing plane phase change memory - Google Patents
Method for preparing plane phase change memory Download PDFInfo
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- CN102005535B CN102005535B CN2010102835572A CN201010283557A CN102005535B CN 102005535 B CN102005535 B CN 102005535B CN 2010102835572 A CN2010102835572 A CN 2010102835572A CN 201010283557 A CN201010283557 A CN 201010283557A CN 102005535 B CN102005535 B CN 102005535B
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- material layer
- side wall
- phase change
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- change memory
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Abstract
The invention relates to a method for preparing a plane phase change memory, comprising the steps of: sequentially growing an electric heat insulation material layer, a phase change material layer and a base material layer on a substrate; removing four sides of the base material layer to form a base; depositing side wall material layers on the upper surface of the phase change material layer and the surface and the side surface of the base material layer; removing the side wall material layers on the upper surface of the base material layer and the surface of the phase change material layer, and forming a side wall the height and the width of which are nano sizes on the side surface of the base material layer; removing the base material layer, and only remaining the side wall of nano sizes; removing all phase change materials except for the bottom part of the side wall so that a lapped side wall composed of the side wall and the phase change material layer is formed; overlapping a metal layer for making an electrode on one side of the side wall; removing the side wall and the metal layer on the surface of the side wall so that a nano-gap electrode the middle of which is provided with the phase change material layer is formed; and finally, depositing a layer of insulation material, tapping the metal layers of two sides of the nano-gap electrode and lead out the electrode so that the making of the plane phase change memory is completed.
Description
Technical field
The present invention relates to the micro-nano technical field, particularly a kind of preparation method of plane phase change memory.The present invention proposes a kind of method that adopts side wall technology, wet etching method to prepare plane phase change memory.This method avoids the use of the deficiency that cost is high, the cycle is long of electron beam exposure as far as possible, and the preparation method is simple, and controllability is good, has very big superiority at the aspects such as preparation efficiency that break through photoetching resolution restriction and raising plane phase change memory.
Background technology
Memory has accounted for more and more important position in semiconductor industry since coming out.In the semi-conductor market in the whole world, memory occupies 80% share.And along with the continuous development and the demand of information-based industry, variation with rapid changepl. never-ending changes and improvements is also taking place in the development of memory.Memory by its storage characteristics can be divided into volatile-type (outage back data can be lost, like DRAM and SRAM) and non-volatile type (outage afterwards data can not lost, like FLASH, EPROM) two types.In recent years, non-volatility memorizer (Flash is a main flow) under the driving of Moore's Law, has occupied the share of storage market nearly 20%.Nonvolatile memory is closely bound up with people's live and work, and mobile phone, digital camera, movable storage device or the like have all become people's necessity.But under big like this demand, the Flash memory receives the restriction of Moore's Law, inundant Development Trend before being difficult to have again.Therefore, the nonvolatile memory of a new generation is ready to appear.
Phase transition storage (PRAM or OUM) is had tangible resistance difference and has storage effect during based on the chalcogenide compound thin film phase change in nineteen sixty-eight by S.R.Ovshinsky and puts forward.It has read at a high speed, high erasable number of times, non-volatile, low in energy consumption, advantages such as cost is low, can multistagely store, anti-strong motion and anti-irradiation; Thought most possible to replace present Flash memory by international semiconductor TIA, and become the main product of following memory and become the device of commercial product at first.Phase transition storage has had much human that it is studied since being born; For example Ovonyx, Intel, IBM, Samsung, STMicroelectronics, Hitachi etc. have made it possess good performance through changing phase-change material and device architecture etc.But along with the high speed development of semicon industry, the integration density of memory is along with Moore's Law improves.Want to make phase transition storage on the storage market of today, to have competitiveness, must realize more highdensity storage.Therefore, prepare the phase transition storage of undersized especially nanoscale, become the important topic of current research.
At present, obtain undersized method, mainly contain electron beam exposure (EBL), FIB exposure (FIB) etc., but they or the cycle is oversize or cost is too high.For memory, raising device preparation efficiency, the reduction device cost of preparation nano-scale under the condition that is implemented in photoetching resolution, we propose the present invention's design.
Summary of the invention
Main purpose of the present invention is to provide a kind of preparation method of plane phase change memory; To search out a kind of preparation method of small size plane phase change memory; And the preparation method is simple and cost is lower, can break through the photoetching resolution restriction, and improves the preparation efficiency of plane phase change memory.
For achieving the above object, the present invention provides a kind of preparation method of plane phase change memory, comprises the steps:
Step 1: one deck electric insulating material layer of on substrate, growing successively, phase-change material layers and substrate material layer;
Step 2:, form the substrate of figure as the preparation side wall with four limits that the method for photoetching and dry etching is removed substrate material layer;
Step 3: this above phase-change material layers with the surface and the side deposit spacer material layer of substrate material layer;
Step 4: adopt dry back to carve, remove substrate material layer upper surface with spacer material layer phase-change material laminar surface, will form height and width in the side of substrate material layer and be nano-sized side wall;
Step 5: the method with wet etching is removed substrate material layer, only keeps nano-sized side wall;
Step 6: adopt the method for dry etching to remove all phase-change materials except the side wall bottom, thereby form the lamination side wall that constitutes by side wall and phase-change material layers;
Step 7: adopt photoetching or electron beam lithography+thin film deposition+stripping technology on a limit of this side wall, to cost one and make metal layer of electrodes;
Step 9, last deposit one deck insulating material, perforate and extraction electrode on the metal level on nano-gap electrode both sides are accomplished the making of plane phase change memory again.
Wherein said electric insulating material layer is silicon nitride or SiO
2
Wherein said phase-change material layers is Ge
2Sb
2Te
5, Sb
2Te
3, Ge
1Sb
2Te
4, Ge
2Sb
4Te
7Perhaps contain a kind of in any phase-change material of chalcogen.
Wherein said substrate material layer is SiO
2, silicon nitride or polysilicon.
Wherein said spacer material layer is SiO
2, silicon nitride or polysilicon.
Wherein said metal level is tungsten, nickel or titanium nitride.
Wherein said insulation material layer is oxide, nitride or sulfide, or by at least two kinds in oxide, nitride, the sulfide mixtures that constitute any;
The method of wherein said deposition insulating material is a kind of in sputtering method, evaporation, plasma assisted deposition method, CVD method, metallo-organic decomposition process, laser assisted deposition method or the thermal oxidation process.
Can find out that from technique scheme the present invention has following beneficial effect:
The method of the preparation of this plane phase change memory provided by the invention, the plane phase change memory that adopted thin-film technique, lithography stripping technology, photoetching dry etch process, wet-etching technology and side wall prepared.The preparation method's of this plane phase change memory characteristics are: simple in structure; Preparation is convenient, and device size is little, has avoided use electron beam exposure (EBL) as far as possible; Technology such as FIB exposure (FIB); Greatly reduce cost, integrated level significantly improves, and breaks through photoetching resolution restriction simultaneously and has improved the preparation efficiency etc. of plane phase change memory.
Description of drawings
For further describing concrete technology contents of the present invention, below in conjunction with embodiment and accompanying drawing specifies as after, wherein:
Fig. 1 is the preparation method's of a plane phase change memory provided by the invention flow chart;
Fig. 2-Fig. 9 is the preparation method's of plane phase change memory a structural representation.
Embodiment
See also Fig. 1 to shown in Figure 10, the preparation method of a kind of plane phase change memory of the present invention comprises the steps:
Step 1: one deck electric insulating material layer 102 of on substrate 101, growing successively, phase-change material layers 103 and substrate material layer 104; Described electric insulating material 102 can be oxide, nitride, sulfide or by at least two kinds in oxide, nitride, the sulfide mixtures that constitute any; The said one deck electric insulating material 102 of on substrate, growing can be a kind of realization of adopting in sputtering method, evaporation, plasma assisted deposition method, CVD method, metallo-organic decomposition process, laser assisted deposition method and the thermal oxidation process; Said electric insulating material 102, the corrosive liquid that uses when removing substrate material layer 103 for wet method in the step 5 has corrosion resistance; Said electric insulating material 102, the corrosive liquid that uses when removing side wall 105 ' for wet method in the step 8 has corrosion resistance; Described phase-change material layers 103 can be Ge
2Sb
2Te
5, Sb
2Te
3, Ge
1Sb
2Te
4, Ge
2Sb
4Te
7Perhaps contain a kind of in any phase-change material of chalcogen; Said phase-change material layers 103, the corrosive liquid that uses when removing substrate material layer 104 for wet method in the step 5 has corrosion resistance; Said phase-change material layers 103, the corrosive liquid that uses when removing side wall 105 ' for wet method in the step 8 has corrosion resistance; Described substrate material layer 104 can be oxide, nitride, sulfide or by at least two kinds in oxide, nitride, the sulfide mixtures that constitute any; Said deposit one deck substrate material layer 104 can be a kind of realization of adopting in sputtering method, evaporation, plasma assisted deposition method, CVD method, metallo-organic decomposition process, laser assisted deposition method and the thermal oxidation process; The thickness of said phase-change material layers 103 is 20-200nm; The thickness of said substrate material layer 104 is 20-2000nm (Fig. 2);
Step 2:, form the substrate (Fig. 2) of figure as the preparation side wall with four limits that the method for photoetching and dry etching is removed substrate material layer 104;
Step 3: this above phase-change material layers 103 with the surface deposition spacer material layer 105 of substrate material layer 104; Wherein said spacer material layer 105 can be oxide, nitride, sulfide or by at least two kinds in oxide, nitride, the sulfide mixtures that constitute any; Said deposit one deck spacer material layer 105 can be a kind of realization of adopting in sputtering method, evaporation, plasma assisted deposition method, CVD method, metallo-organic decomposition process, laser assisted deposition method and the thermal oxidation process; Described spacer material layer 105, the corrosive liquid that uses when removing substrate material layer 104 in the step 5 has corrosion resistance (Fig. 3);
Step 4: adopt dry back to carve, remove substrate material layer 104 upper surfaces and spacer material layers 105 phase-change material layers 103 surfaces, will form height and width and be nano-sized side wall 105 '; The width of the side wall 105 ' that wherein said spacer material layer 105 forms is 5-200nm (Fig. 4);
Step 5: the method with wet etching is removed substrate material layer 104, only keeps nano-sized side wall 105 '; Corrosive liquid wherein can be a kind of (Fig. 5) in HF acid, TMAH solution, the hot SPA etc.;
Step 6: adopt the method for dry etching to remove all phase-change materials 103 except side wall 105 ' bottom, thereby form the lamination side wall (Fig. 6) that constitutes by side wall 105 ' and phase-change material layers 103;
Step 7: on side wall 105 ', cost one with photoetching or electron beam lithography+thin film deposition+stripping technology again and make metal layer of electrodes 106; Described metal level 106 can be in tungsten, nickel or the titanium nitride any; Described metal level 106 can be a kind of preparation of adopting in sputtering method, evaporation and the CVD method; Described metal level 106, the corrosive liquid that uses when removing side wall 105 ' for wet method in the step 8 has corrosion resistance; The thickness of described metal level 106 is 10-200nm (Fig. 7);
Step 8: remove side wall 105 ' and side wall 105 ' the lip-deep metal 106 with the method for wet etching again, thereby accompany the nano-gap electrode 106 ' of phase-change material layers 103 in the middle of forming; Corrosive liquid wherein can be a kind of (Fig. 8) in HF acid, TMAH solution, the hot SPA etc.;
Step 9: last deposit one deck insulating material 107, perforate and extraction electrode 108 can form plane phase change memory on the metal level 106 on nano-gap electrode 106 ' both sides again.Wherein said insulating material 107 can be oxide, nitride, sulfide or by at least two kinds in oxide, nitride, the sulfide mixtures that constitute any; Said deposit one deck insulating material 107 can be a kind of (Fig. 9) that realizes that adopts in sputtering method, evaporation, plasma assisted deposition method, CVD method, metallo-organic decomposition process, laser assisted deposition method and the thermal oxidation process.
Embodiment one
1, adopt semiconductor such as monocrystalline silicon piece, SOI sheet or insulating material as substrate 101;
2, adopt thin film preparation process, on substrate, prepare the 200nm silicon nitride as electric heating insulating barrier 102,100nm Ge
2Sb
2Te
5As phase-change material layers 103 and 450nm polysilicon as substrate material layer 104;
3, remove four limits of substrate material layer 104 with the method for photoetching and dry etching, form the substrate of figure as the preparation side wall;
4, on this above electric insulating material layer 102 and surface of phase-change material layers 103 and side deposit 200nm SiO
2As spacer material layer 105;
5, adopt dry back to carve, remove substrate material layer 104 upper surfaces and spacer material layers 105 phase-change material layers 103 surfaces, the SiO that forms high 450nm and wide 100nm
2Side wall 105 ';
6, float sidewall substrate 104 with constant temperature TMAH solution, the temperature constant of TMAH solution only keeps the SiO of nano-scale at 70 ℃
2Side wall 105 ';
7, adopt the method for dry etching to remove all phase-change materials 103 except side wall 105 ' bottom, thereby form the lamination side wall that constitutes by side wall 105 ' and phase-change material layers 103;
8, adopt photoetching or electron beam lithography+thin film deposition+stripping technology on a limit of this side wall 105 ', to cost a tungsten metal level 106 of making electrode, metal thickness is 100nm;
9, corrode SiO with hydrofluoric acid solution
2Side wall 105 ', and remove the metal 106 on side wall 105 ' surface, forming width is 100nm and the middle nano-gap electrode 106 ' that accompanies the thick phase-change material layers of 100nm 103;
10, the SiO of last deposit one deck 500nm
2108, perforate and extraction electrode 109 can form plane phase change memory on the tungsten on nano-gap electrode 106 ' both sides again.
Embodiment two
Roughly the same with embodiment one, difference is: substrate material layer 104 is SiO
2, its corresponding corrosive liquid is a hydrofluoric acid; Spacer material layer 105 is Si
xN
y, its corresponding corrosive liquid is the SPA of heat.
The above; Be merely the embodiment among the present invention, but protection scope of the present invention is not limited thereto, anyly is familiar with this technological people in the technical scope that the present invention disclosed; The conversion that can expect easily or replacement all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection range of claims.
Claims (8)
1. the preparation method of a plane phase change memory comprises the steps:
Step 1: one deck electric insulating material layer of on substrate, growing successively, phase-change material layers and substrate material layer;
Step 2:, form the substrate of figure as the preparation side wall with four limits that the method for photoetching and dry etching is removed substrate material layer;
Step 3: this above phase-change material layers with the surface and the side deposit spacer material layer of substrate material layer;
Step 4: adopt dry back to carve, remove substrate material layer upper surface with spacer material layer phase-change material laminar surface, will form height and width in the side of substrate material layer and be nano-sized side wall;
Step 5: the method with wet etching is removed substrate material layer, only keeps nano-sized side wall;
Step 6: adopt the method for dry etching to remove all phase-change material layers except the side wall bottom, thereby form the lamination side wall that constitutes by side wall and phase-change material layers;
Step 7: adopt photoetching+thin film deposition+stripping technology on a limit of this side wall, to cost one and make metal layer of electrodes;
Step 8, remove side wall and the lip-deep metal level of side wall with the method for wet etching again, thereby accompany the nano-gap electrode of phase-change material layers in the middle of forming;
Step 9, last deposit one deck insulating material, perforate and extraction electrode on the metal level on nano-gap electrode both sides are accomplished the making of plane phase change memory again.
2. the preparation method of plane phase change memory according to claim 1, wherein said electric insulating material layer is silicon nitride or SiO
2
3. the preparation method of plane phase change memory according to claim 1, wherein said phase-change material layers is Ge
2Sb
2Te
5, Sb
2Te
3, Ge
1Sb
2Te
4, Ge
2Sb
4Te
7Perhaps contain a kind of in other any phase-change materials of chalcogen.
4. the preparation method of plane phase change memory according to claim 1, wherein said substrate material layer is SiO
2, silicon nitride or polysilicon.
5. the preparation method of plane phase change memory according to claim 1, wherein said spacer material layer is SiO
2, silicon nitride or polysilicon.
6. the preparation method of plane phase change memory according to claim 1, wherein said metal level is tungsten or nickel.
7. the preparation method of plane phase change memory according to claim 1, wherein said insulation material layer is oxide, nitride or sulfide, or by at least two kinds in oxide, nitride, the sulfide mixtures that constitute any.
8. the preparation method of plane phase change memory according to claim 1, the method for wherein said deposition insulating material are a kind of in sputtering method, evaporation, plasma assisted deposition method, CVD method, metallo-organic decomposition process, laser assisted deposition method or the thermal oxidation process.
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| CN101764195A (en) * | 2008-12-24 | 2010-06-30 | 中国科学院半导体研究所 | Method for making nano-sized phase change memory |
| CN101789492A (en) * | 2010-03-01 | 2010-07-28 | 中国科学院半导体研究所 | Preparation method of plane phase change memory |
| CN101794862A (en) * | 2010-02-24 | 2010-08-04 | 中国科学院半导体研究所 | Manufacturing method of vertical phase-change memory |
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| TWI291745B (en) * | 2005-11-30 | 2007-12-21 | Ind Tech Res Inst | Lateral phase change memory with spacer electrodes and method of manufacturing the same |
| US20070267618A1 (en) * | 2006-05-17 | 2007-11-22 | Shoaib Zaidi | Memory device |
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| CN101764195A (en) * | 2008-12-24 | 2010-06-30 | 中国科学院半导体研究所 | Method for making nano-sized phase change memory |
| CN101794862A (en) * | 2010-02-24 | 2010-08-04 | 中国科学院半导体研究所 | Manufacturing method of vertical phase-change memory |
| CN101789492A (en) * | 2010-03-01 | 2010-07-28 | 中国科学院半导体研究所 | Preparation method of plane phase change memory |
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