CN102005173A - Integrated drive circuit of triode structure carbon nano tube field emission display - Google Patents
Integrated drive circuit of triode structure carbon nano tube field emission display Download PDFInfo
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- CN102005173A CN102005173A CN 201010603119 CN201010603119A CN102005173A CN 102005173 A CN102005173 A CN 102005173A CN 201010603119 CN201010603119 CN 201010603119 CN 201010603119 A CN201010603119 A CN 201010603119A CN 102005173 A CN102005173 A CN 102005173A
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Abstract
The invention belongs to the field of novel flat panel display manufacturing, relating to an integrated drive circuit of a triode structure carbon nano tube field emission display. The integrated drive circuit comprises an FPGA (Field Programmable Gate Array) control unit, an after row level integrated drive unit, an after column level integrated drive unit, a static data storage unit and a power supply module unit. The FPGA control unit accesses the static data storage unit through a unit control signal, the FPGA control unit respectively controls the after row level integrated drive unit and the after column level integrated drive unit, the after row level integrated drive unit outputs a negative high voltage pulse to a cathode of CNT-FED (Carbon Nano Tube-Field Emission Display) in a progressive scanning mode, and corresponding image data in the static data storage unit are transmitted to the after column level integrated drive unit to produce a column drive high voltage pulse to a grid of the CNT-FED. The entire drive circuit is simple and reliable because of the integration of the drive circuit, and is flexible and convenient and has strong expansibility as the FPGA control unit is applied to control of a timing sequence simultaneously.
Description
Technical field
The invention belongs to the novel flat-plate art of display device manufacture, relate to a kind of three-stage structure carbon nano tube field emission display (Carbon NanoTube-Field Emission Display, integrated drive electronics CNT-FED).
Background technology
Field-emitter display (Field Emission Display, FED) be present flat-panel monitor (FlatPanel Display, FPD) comparatively novel a kind of in the field, because its principle of luminosity and cathode-ray tube (CRT) (Cathode Ray Tube, CRT) just the same, when possessing CRT self advantage, overcome the intrinsic shortcoming of CRT again, CRT monitor is to lean on the fluorescent powder of electron-beam excitation screen inside surface to come display image, owing to can extinguish very soon after fluorescent powder is lighted, so electron gun must constantly excite these points circularly.Screen resolution is high more, needs counting of scanning just many more, and is just higher to the requirement of electron gun sweep frequency, and therefore video bandwidth also needs to improve.In general, the CRT monitor operating frequency range is just fixing when circuit design, depends primarily on the characteristic of high frequency amplifier section element, because the design of high-frequency circuit is difficult relatively, so cost is also higher, also can produce certain radiation simultaneously.CRT monitor and its field frequency have confidential relation.Cross when low when field frequency, human eye can feel that screen has tangible flicker, and picture steadiness is poor, causes eye fatigue easily.
Summary of the invention
At above-mentioned situation,, the object of the present invention is to provide a kind ofly can solve effectively that volume weight is big, radiation is strong, power consumption is big, the driving circuit of picture steadiness difference in order to address the deficiencies of the prior art.
The technical scheme that technical solution problem of the present invention adopts is as follows:
A kind of integrated drive electronics of three-stage structure carbon nano tube field emission display comprises FPGA control module, the integrated driver element of row back level, the integrated driver element of row back level, static data storage unit and power module unit; The FPGA control module is by unit controls message reference static data storage unit; The FPGA control module is controlled row back integrated driver element of level and the integrated driver element of row back level respectively, level integrated driver element in row back is pressed the negative electrode of progressive scan mode output negative high voltage pulse to CNT-FED, and corresponding view data is sent to the integrated driver element generation of row back level row and drives the grid that high-voltage pulse is given CNT-FED in the static data storage unit.
The invention has the beneficial effects as follows: 1, negative voltage and the type of drive that column data adopts positive voltage to combine are adopted in line scanning, have weakened interpolar and have crosstalked, and have improved show uniformity; 2, adopt high pressure integrated chip LZ1132BM to realize line scanning,-5V small-signal can be zoomed into-300V ,-high-voltage pulse of 45mA, and row high pressure integrated chip LZ1032AM, the 5V small-signal can be zoomed into the high-voltage signal of 300V, 45mA, the combination of this integrated type of drive, convenient and easy, the reliability height can satisfy the driving requirement of CNT-FED fully; 3, driving circuit is integrated, has improved the work efficiency of circuit, has reduced the output power of power module; 4, adopt FPGA control module control timing, flexible, extensibility is strong, is applicable to more high-resolution CNT-FED; 5, (+3200V) use improves display brightness and homogeneity to three-stage structure CNT-FED anode high voltage greatly.
Description of drawings
Fig. 1 is the whole block scheme of the integrated drive electronics of a kind of three-stage structure carbon nano tube field emission display of the present invention.
Fig. 2 is the circuit theory diagrams of the integrated drive electronics of a kind of three-stage structure carbon nano tube field emission display of the present invention.
Fig. 3 is the application sequential chart of the integrated drive electronics access static data-carrier store SST25VF040B of a kind of three-stage structure carbon nano tube field emission display of the present invention.
Fig. 4 be the integrated drive electronics of a kind of three-stage structure carbon nano tube field emission display of the present invention capable after the cascade graphs of level integrated drive chips LZ1132BM.
Fig. 5 be the integrated drive electronics of a kind of three-stage structure carbon nano tube field emission display of the present invention capable after the level integrated driver element the application sequential chart.
Fig. 6 is the cascade graphs of the integrated drive electronics row back level integrated drive chips LZ1032AM of a kind of three-stage structure carbon nano tube field emission display of the present invention.
Fig. 7 is the application sequential chart of the integrated driver element of integrated drive electronics row back level of a kind of three-stage structure carbon nano tube field emission display of the present invention.
Embodiment
Below in conjunction with accompanying drawing the specific embodiment of the present invention is elaborated.
As shown in Figure 1, a kind of integrated drive electronics of three-stage structure carbon nano tube field emission display comprises FPGA control module, the integrated driver element of row back level, the integrated driver element of row back level, static data storage unit and power module unit; The FPGA control module is by unit controls message reference static data storage unit; The FPGA control module is controlled row back integrated driver element of level and the integrated driver element of row back level respectively, level integrated driver element in row back is pressed the negative electrode of progressive scan mode output negative high voltage pulse to CNT-FED, and corresponding view data is sent to the integrated driver element generation of row back level row and drives the grid that high-voltage pulse is given CNT-FED in the static data storage unit.
Above-mentioned FPGA control module is by serial data input end (D to the control of the integrated driver element of row back level
In), the serial-shift data clock
The data latching gating
The latch data output terminal
Realize, carry out photoelectricity by photoelectrical coupler between row back integrated driver element signal wire of level and the FPGA control module and isolate and data transmission.
The above-mentioned integrated driver element of row back level comprises 32 passage P type channel high-voltage MOS chips by 8, model is finished for the LZ1132BM cascade, by the FPGA control module control 240 capable outputs of lining by line scan, carry out photoelectricity by photoelectrical coupler between FPGA control module control signal wire and the LZ1132BM chip and isolate and data transmission.
The cascade of above-mentioned LZ1132BM chip is the data output end (D by first chip block
Out) with D with its second contiguous chip block
InConnect the D of second chip block
OutWith D with its 3rd contiguous chip block
InConnect, by that analogy the D of the 7th chip block
OutD with the 8th chip block
InConnect;
All be that all row chips are shared.
Above-mentioned FPGA control module is by serial to the control that is listed as the integrated driver element of back level
CLK, LS, STB realize, carry out photoelectricity by photoelectrical coupler between described row back integrated driver element signal wire of level and the FPGA control module and isolate and data transmission.
The integrated driver element of level comprises 32 passage N type channel high-voltage MOS chips by 10 behind the above-mentioned row, model is finished for the LZ1132AM cascade, by FPGA control module control LZ1032AM output column data, carry out photoelectricity by photoelectrical coupler between FPGA control module control signal wire and the LZ1032AM chip and isolate and data transmission.
The cascade of above-mentioned LZ1032AM chip is by first chip block
With with its second contiguous chip block
Connect, second chip block
With with its 3rd contiguous chip block
Connect, by that analogy the 9th chip block
With the tenth chip block
Connect; CLK, LS, STB are that all row chips are shared.
Above-mentioned static data storage unit comprises the flash chip of spi bus structure, and model is SST25VF040B, and the static data storage unit is carried out communication by spi bus and FPGA control module.
Above-mentioned power module provides required voltage for the integrated driver element of row back level and the integrated driver element of row back level, and provide+high pressure of 3200V is to the anode of CNT-FED, realizes complete still image demonstration.
Fig. 2 is the circuit theory diagrams of Fig. 1, adopts SST25VF040B as the static data storer, and the integrated driver element of level after the LZ1132BM chipset is embarked on journey, LZ1032AM chip are formed row back grade integrated driver element.For specific implementation process of the present invention is described, we are example with the three-stage structure CNT-FED display screen of 8 inches monochromes 320 * 240: static data storage unit, its function are to preserve in advance to be used for the view data that three-stage structure CNT-FED shows.For a width of cloth picture of monochromatic 320 * 240, its data volume is 9600 bytes, and the FPGA control module under serial clock (SCK) control, reads the data from 0000H to the 2580H address by spi bus.In the present embodiment, data read process as shown in Figure 3: FPGA controls output low level
Under SCK control, import the reading order word of a byte earlier in input end (SI) step-by-step, 24 bit address (000000H) are imported in step-by-step then, the data of storage will be in output terminal (SO) displacement output, run through the data on the address, the address increases one automatically, up to running through needed data, the whole process that reads should keep
Low level.The data of taking out from data storage cell are transferred to the integrated driver element of row back level by photoisolator.Level integrated driver element in row back moves in the LZ1032AM shift register under the CLK effect by turn.As shown in Figure 6, first chip block
By the control of FPGA control module, the every chip block in back
With preceding chip piece
Connect, data move under CLK control by turn.Common signal line such as LS, STB are produced by the control of FPGA control module.As shown in Figure 7, data line needs 320 shift clock in the present embodiment, after having imported data line, the control of FPGA control module LS, STB carry out data latching and gating, and its output terminal is exported the grid that corresponding high-voltage pulse signal is delivered to the CNT-FED display screen.Meanwhile, the negative high voltage pulse signal of lining by line scan of the integrated driver element output of row back level is delivered on the corresponding cathode leg electrode of three-stage structure CNT-FED display screen.Use row integrated drive LZ1132BM to constitute the row post-stage drive circuit among the present invention.Need 240 row in the present embodiment, and every LZ1132BM integrated chip there are 32 tunnel outputs, therefore adopt 8 cascades to constitute.The integrated driver element of row as shown in Figure 4, and is shared
Produced by the FPGA control module, the cascade of chip chamber is by the serial data D of preceding chip piece
OutSerial data D with the back chip piece
InBe connected data serial transfer in each chip.As shown in Figure 5, first D of line period high level active data from first LZ1132BM
InInput, remaining chip is by the D of last chip thereafter
OutD with back one chip
InCascade transmits signal, 240 line scanning clock
Effect under, the effective scan-data level of line period is displaced to the 240th output terminal through LZ1132BM successively from first output terminal, output-250V high pressure is realized negative high voltage gating line by line line by line.The data that such row connect row are latched output in proper order, and gating is finished up to the output of whole image data line by line.Power module provides the each several part circuit required voltage, according to tertiary structure CNT-FED display requirement, provide respectively ± 5V, ± 250V and+DC voltage of 3200V.
The present invention can accurately demonstrate still image uniformly on carbon nano-tube FED display screen; Integrated design has reduced the complicacy of circuit structure, has realized the drive controlling of the monochromatic CNT-FED of three-stage structure of 8 inches (resolution 320 * 240).The present invention has weakened interpolar and has crosstalked, and has improved show uniformity, and the combination of integrated type of drive is convenient and easy, and the reliability height can satisfy the driving requirement of CNT-FED fully; Improve the work efficiency of circuit, reduced the output power of power module; Flexible, extensibility is strong, is applicable to more high-resolution CNT-FED display screen, and display brightness and homogeneity are improved greatly.
Claims (9)
1. the integrated drive electronics of a three-stage structure carbon nano tube field emission display is characterized in that, comprises FPGA control module, the integrated driver element of row back level, the integrated driver element of row back level, static data storage unit and power module unit; The FPGA control module is by unit controls message reference static data storage unit; The FPGA control module is controlled row back integrated driver element of level and the integrated driver element of row back level respectively, level integrated driver element in row back is pressed the negative electrode of progressive scan mode output negative high voltage pulse to CNT-FED, and corresponding view data is sent to the integrated driver element generation of row back level row and drives the grid that high-voltage pulse is given CNT-FED in the static data storage unit.
2. the integrated drive electronics of a kind of three-stage structure carbon nano tube field emission display according to claim 1 is characterized in that, described FPGA control module is by serial data input end D to the control of the integrated driver element of row back level
In, the serial-shift data clock
The data latching gating
The latch data output terminal
Realize, carry out photoelectricity by photoelectrical coupler between described row back integrated driver element signal wire of level and the FPGA control module and isolate and data transmission.
3. the integrated drive electronics of a kind of three-stage structure carbon nano tube field emission display according to claim 1, it is characterized in that, the integrated driver element of described row back level comprises 32 passage P type channel high-voltage MOS chips by 8, model is finished for the LZ1132BM cascade, by the FPGA control module control 240 capable outputs of lining by line scan, carry out photoelectricity by photoelectrical coupler between FPGA control module control signal wire and the LZ1132BM chip and isolate and data transmission.
4. the integrated drive electronics of a kind of three-stage structure carbon nano tube field emission display according to claim 3 is characterized in that, the cascade of described LZ1132BM chip is the data output end D by first chip block
OutWith data input pin D with its second contiguous chip block
InConnect the data output end D of second chip block
OutWith data input pin D with its 3rd contiguous chip block
InConnect, by that analogy the data output end D of the 7th chip block
OutData input pin D with the 8th chip block
InConnect; The serial-shift data clock
The data latching gating
The latch data output terminal
All be that all row chips are shared.
5. the integrated drive electronics of a kind of three-stage structure carbon nano tube field emission display according to claim 1 is characterized in that, described FPGA control module is by the serial data input end to the control that is listed as the integrated driver element of back level
Serial-shift data clock CLK, data latching gating LS, latch data output terminal STB realize, carry out photoelectricity by photoelectrical coupler between described row back integrated driver element signal wire of level and the FPGA control module and isolate and data transmission.
6. the integrated drive electronics of a kind of three-stage structure carbon nano tube field emission display according to claim 1, it is characterized in that, the integrated driver element of described row back level comprises 32 passage N type channel high-voltage MOS chips by 10, model is finished for the LZ1132AM cascade, by FPGA control module control LZ1032AM output column data, carry out photoelectricity by photoelectrical coupler between FPGA control module control signal wire and the LZ1032AM chip and isolate and data transmission.
7. the integrated drive electronics of a kind of three-stage structure carbon nano tube field emission display according to claim 6 is characterized in that, the cascade of described LZ1032AM chip is the data output end by first chip block
With data input pin with its second contiguous chip block
Connect the data output end of second chip block
With data input pin with its 3rd contiguous chip block
Connect, by that analogy the data output end of the 9th chip block
Data input pin with the tenth chip block
Connect; Serial-shift data clock CLK, data latching gating LS, latch data output terminal STB are that all row chips are shared.
8. the integrated drive electronics of a kind of three-stage structure carbon nano tube field emission display according to claim 1, it is characterized in that, described static data storage unit comprises the flash chip of spi bus structure, model is SST25VF040B, and the static data storage unit is carried out communication by spi bus and FPGA control module.
9. the integrated drive electronics of a kind of three-stage structure carbon nano tube field emission display according to claim 1, it is characterized in that, described power module provides required voltage for integrated driver element of row back level and the integrated driver element of row back level, and provide+high pressure of 3200V is to the anode of CNT-FED, realizes that complete still image shows.
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| Application Number | Priority Date | Filing Date | Title |
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| CN 201010603119 CN102005173A (en) | 2010-12-24 | 2010-12-24 | Integrated drive circuit of triode structure carbon nano tube field emission display |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201010603119 CN102005173A (en) | 2010-12-24 | 2010-12-24 | Integrated drive circuit of triode structure carbon nano tube field emission display |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1297218A (en) * | 1999-11-05 | 2001-05-30 | 李铁真 | Field-emission display device using vertically arranged nanometer carbon tubes and its mfg. method |
| JP2005235748A (en) * | 2004-02-17 | 2005-09-02 | Lg Electronics Inc | Carbon nanotube field emission element and driving method thereof |
-
2010
- 2010-12-24 CN CN 201010603119 patent/CN102005173A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1297218A (en) * | 1999-11-05 | 2001-05-30 | 李铁真 | Field-emission display device using vertically arranged nanometer carbon tubes and its mfg. method |
| JP2005235748A (en) * | 2004-02-17 | 2005-09-02 | Lg Electronics Inc | Carbon nanotube field emission element and driving method thereof |
Non-Patent Citations (2)
| Title |
|---|
| 《基于FPGA碳纳米管场致发射显示器驱动系统的研究》 20081119 杨堃 基于FPGA碳纳米管场致发射显示器驱动系统的研究 , * |
| 《电子器件》 20090620 钱敏等 40 inch碳纳米管场发射显示屏的驱动系统研究 , 第03期 * |
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Application publication date: 20110406 |