CN101997525B - Switch control circuit - Google Patents
Switch control circuit Download PDFInfo
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- CN101997525B CN101997525B CN 201010568401 CN201010568401A CN101997525B CN 101997525 B CN101997525 B CN 101997525B CN 201010568401 CN201010568401 CN 201010568401 CN 201010568401 A CN201010568401 A CN 201010568401A CN 101997525 B CN101997525 B CN 101997525B
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Abstract
The invention provides an electronic switch control circuit, which comprises a rectifying circuit, a trigger signal input component, a relay and a relay driving circuit, wherein the first alternating current input end of the rectifying circuit is connected with the fire wire end of an alternating current power supply of an alternating current circuit, the second alternating current input end of the rectifying circuit is connected with the zero wire end of the alternating current power supply, and the rectifying circuit is used for converting alternating current into direct current; the first end of the trigger signal input component is connected to the output end of the rectifying circuit, and the trigger signal input component is used for inputting a trigger signal; the relay is providedwith a coil and a normally-open contact, wherein one end of the normally-open contact is connected with the fire wire end of the alternating current power supply, and the other end of the normally-open contact is connected with a load; and the control signal input end of the relay driving circuit is connected with the other second end of the trigger signal input component, and the output end of the relay driving circuit is connected with the coil of the relay to control the on and off of the coil. The trigger signal input component is connected between the rectifying circuit and the relay driving circuit, and the voltage at the trigger signal input component is direct current voltage, so the electronic switch control circuit has no harm to human body and is safe to use.
Description
Technical field
The present invention relates to lighting field, relate in particular to a kind of electronic switch control circuit.
Background technology
In the prior art, common duplex or multi-joint above switch all are directly to be connected with the live wire end of AC power.
This connected mode can make has certain dangerous voltage on the switch, thereby easily the danger that electric leakage is got an electric shock takes place.And, because switch is connected with AC power, needing three or many connecting lines, cost is higher and dangerous.
Summary of the invention
The present invention aims to provide a kind of electronic switch control circuit, to solve leak electricity the easily problem of Danger Electric shock risk of ON-OFF control circuit of the prior art.
In order to address the above problem, the invention provides a kind of electronic switch control circuit, comprising: rectification circuit, first ac input end is connected with the live wire end of AC power, second ac input end is connected with the zero line side of AC power, is used for alternating current is converted to direct current; The triggering signal input block, first end is connected to the output of rectification circuit, is used for the input triggering signal; Relay has coil and normally opened contact, and wherein an end of normally opened contact is connected with the live wire end of AC power, and the other end is connected with load; Relay drive circuit, input is connected with second end of triggering signal input block, and output is connected with the coil of relay, is used for the break-make of control coil.
Further, rectification circuit comprises: first electric capacity, and the one end forms first ac input end of rectification circuit; Rectifier, first exchanges side ports is connected with the other end of first electric capacity, and second exchanges second ac input end that side ports forms rectification circuit, and the cathode output end place has first node, cathode output end ground connection; First voltage stabilizing didoe, negative pole is connected to first node, plus earth; First polar capacitor, positive pole is connected to first node, minus earth.
Further, relay drive circuit comprises: digital bistable circuit, and power input is connected to first node, common ground connection, input end of clock is connected with second end of triggering signal input block; Second polar capacitor anodally is connected with the input end of clock of digital bistable circuit, and negative pole is connected ground connection afterwards with the end of forbidding of digital bistable circuit; First resistance is connected in parallel with second polar capacitor; Triode, collector electrode is connected to first node, and base stage is connected with the first pulse data output of digital bistable circuit, and emitter is connected with an end of the coil of relay.
Further, electronic switch control circuit also comprises: the live wire end that is connected in power supply exchanges second resistance between the side ports with rectifier first; Be connected in the cathode output end of rectifier and the 3rd resistance between the first node; Be connected in the 4th resistance between the coil of the emitter of triode and relay; Be connected in the 5th resistance between the first pulse data output of the base stage of triode and digital bistable circuit; Be connected in an end of triggering signal input block and the 6th resistance between the first node; Be connected in first diode at the coil two ends of relay.
Further, ON-OFF control circuit also comprises: be connected in the 7th resistance between the power input of first node and digital bistable circuit; Be connected in the 3rd polar capacitor between the reset terminal of the power input of digital bistable circuit and digital bistable circuit, wherein, the reset terminal of digital bistable circuit is connected with the second pulse data output of digital bistable circuit.
Further, ON-OFF control circuit also comprises: first light-emitting diode anodally is connected with the first pulse data output of digital bistable circuit; Second light-emitting diode anodally is connected with the 3rd pulse data output of digital bistable circuit; The 8th resistance, an end are connected other end ground connection with the negative pole of first light-emitting diode and the negative pole of second light-emitting diode respectively.
Further, ON-OFF control circuit also comprises: be connected in the 3rd light-emitting diode between the common of the 8th resistance and digital bistable circuit.
Further, the triggering signal input block is key switch.
Further, digital bistable circuit comprises: power input is used to digital bistable circuit that operating voltage is provided; Common is used for making digital bistable circuit effective grounding; Schmidt circuit, input form the input end of clock of digital bistable circuit; Second inverter, input form the end of forbidding of digital bistable circuit; First AND circuit, first input end is connected with the output of Schmidt circuit, and second input is connected with the output of several second inverters, and output forms clock signal input node; The 3rd inverter, input form the reset terminal of digital bistable circuit; The 4th inverter, input is connected with the output of the 3rd inverter; First synchronous rs flip-flop, first input end is connected with the output of the 4th inverter, and second input is connected with common, and the clock end is connected to clock signal input node; Second synchronous rs flip-flop, first input end is connected with the output of the 4th inverter, and second input is connected with first output of first rest-set flip-flop, and the clock end is connected to the clock signal input node; First OR-NOT circuit, first input end is connected with first output of first synchronous rs flip-flop, and second input is connected with second output of second synchronous rs flip-flop, and the 3rd input is connected with second output of the 3rd synchronous rs flip-flop; Second OR-NOT circuit, first input end is connected with second output of second synchronous rs flip-flop, and second input is connected with the output of first OR-NOT circuit; The first input end of the 3rd synchronous rs flip-flop is connected with the output of the 4th inverter, and second input is connected with the output of second OR-NOT circuit, and the clock end is connected to the clock signal input node; The 4th synchronous rs flip-flop, first input end is connected with the output of the 4th inverter, and second input is connected with first output of the 3rd rest-set flip-flop, and the clock end is connected to the clock signal input node; Second AND circuit, output forms the first pulse data output of digital bistable circuit, wherein, second output of first synchronous rs flip-flop is connected with the first input end of second AND circuit after through the 5th inverter, and first output of second synchronous rs flip-flop is connected with second input of second AND circuit after through hex inverter; The 3rd AND circuit, output forms the second pulse data output of digital bistable circuit, wherein, first output of the 4th synchronous rs flip-flop is connected with the first input end of the 3rd AND circuit after through the 7th inverter, and first output of first synchronous rs flip-flop is connected with second input of the 3rd AND circuit after through the 8th inverter; The 4th AND circuit, output forms the 3rd pulse data output of digital bistable circuit, wherein, second output of second synchronous rs flip-flop is connected with the first input end of the 4th AND circuit after through the 9th inverter, and first output of the 3rd synchronous rs flip-flop is connected with second input of the 4th AND circuit after through the tenth inverter.
Use technical scheme of the present invention, by rectification circuit is set in ON-OFF control circuit, the alternating current that alternating-current voltage source is provided is converted into the lower direct voltage of magnitude of voltage, and by triggering signal input block input triggering signal, the coil of relay drive circuit is in connect or the state of outage, and then can opens or close and being connected of load according to the state control normally opened contact of coil.Because the triggering signal input block is connected between rectification circuit and the relay drive circuit, the voltage at triggering signal input block place is direct voltage, harmless, use safer, thereby overcome leak electricity the easily problem of Danger Electric shock risk of ON-OFF control circuit of the prior art.
Except purpose described above, feature and advantage, the present invention also has other purpose, feature and advantage.With reference to figure, the present invention is further detailed explanation below.
Description of drawings
Accompanying drawing is used to provide further understanding of the present invention, constitutes the application's a part, and illustrative examples of the present invention and explanation thereof are used for explaining the present invention, do not constitute improper restriction of the present invention.In the accompanying drawings:
Fig. 1 shows the principle schematic according to the ON-OFF control circuit of the embodiment of the invention;
Fig. 2 shows the circuit connection diagram according to the ON-OFF control circuit of the embodiment of the invention one;
Fig. 3 shows the digital bistable state pin of chip schematic diagram according to the embodiment of the invention one;
Fig. 4 shows the circuit connection diagram according to the ON-OFF control circuit of the embodiment of the invention two;
Fig. 5 shows the circuit connection diagram according to the ON-OFF control circuit of the embodiment of the invention three;
The circuit that Fig. 6 shows according to the ON-OFF control circuit of the embodiment of the invention four connects intention; And
Fig. 7 shows the logic schematic diagram according to the digital bistable circuit of the embodiment of the invention.
Embodiment
Below in conjunction with accompanying drawing embodiments of the invention are elaborated, but the multitude of different ways that the present invention can be defined by the claims and cover is implemented.
Fig. 1 shows the principle schematic according to the ON-OFF control circuit of the embodiment of the invention.As shown in Figure 1, the electronic switch control circuit in the present embodiment comprises: rectification circuit, and first ac input end is connected with the live wire end of AC power, and second ac input end is connected with the zero line side of AC power, is used for alternating current is converted to direct current; Triggering signal input block SK, an end is connected to the output of rectification circuit, is used for the input triggering signal; Relay K 1 has coil and normally opened contact, and wherein an end of normally opened contact is connected with the live wire end of AC power, and the other end is connected with load; Relay drive circuit, input is connected with the other end of triggering signal input block SK, and output is connected with the coil of relay, is used for the break-make of control coil.And, as can be seen from Figure 1, the other end ground connection of the coil of relay K 1.
As shown in Figure 1, by rectification circuit is set in ON-OFF control circuit, the alternating current that alternating-current voltage source is provided is converted into the lower direct voltage of magnitude of voltage, and by triggering signal input block input triggering signal, the coil of relay drive circuit is in connect or the state of outage, and then can opens or close and being connected of load according to the state control normally opened contact of coil.Because the triggering signal input block is connected between rectification circuit and the relay drive circuit, the voltage at triggering signal input block place is direct voltage, harmless, use safer, thereby overcome leak electricity the easily problem of Danger Electric shock risk of ON-OFF control circuit of the prior art.
Fig. 2 shows the circuit connection diagram according to the ON-OFF control circuit of the embodiment of the invention one.
Wherein, as shown in Figure 2, the rectification circuit of ON-OFF control circuit comprises: first capacitor C 1, and the one end forms first ac input end of rectification circuit; Rectifier SSR, first exchanges side ports is connected with the other end of first capacitor C 1, and second exchanges side ports forms second ac input end, and the cathode output end place has first node P1, cathode output end ground connection; The first voltage stabilizing didoe ZD1, negative pole is connected to first node P1, plus earth; The first polar capacitor C2, positive pole is connected to first node P1, minus earth.
Relay drive circuit comprises: digital bistable circuit BTC, and power input VDD is connected to first node P1, common VSS ground connection, input end of clock CP is connected with the end of triggering signal input block SK as the input of relay drive circuit; The second polar capacitor C4, the input end of clock CP of anodal and digital bistable circuit BTC is connected, and the forbidding of negative pole and digital bistable circuit BTC holds INH to be connected back ground connection; First resistance R 8 is connected in parallel with the second polar capacitor C4; Triode Q1, collector electrode is connected to first node P1, and base stage is connected with the first pulse data output Y1 of digital bistable circuit BTC, and emitter is connected with an end of the coil of relay K 1.
When pressing SK touching switch once, capacitor C 4 chargings, after capacitor C 4 chargings, the integrated bistable circuit BTC of this triggering signal triggered digital steady operation, make positive pulse voltage of digital bistable circuit BTC output give the base stage of triode Q1, make triode Q1 conducting, make the coil electricity of relay K 1, thereby make the normal opened contact closure of relay K 1, drive loaded work piece.Press SK touching switch more once, capacitor C 4 chargings are after capacitor C 4 chargings, this triggering signal triggered digital bistable circuit BTC steady operation makes the output negative pulse voltage of digital bistable circuit BTC, and triode Q1 is ended, thereby make the coil blackout of relay K 1, and switch is disconnected.
Use the technical scheme in the present embodiment, by rectifier is set in ON-OFF control circuit, the alternating current that alternating-current voltage source is provided is converted into the lower direct voltage of magnitude of voltage, and by the work of triggering signal input block input triggering signal triggered digital bistable circuit, and then make relay open or close and being connected of load according to the output triggering signal of digital bistable circuit.Because the voltage of the various piece of ON-OFF control circuit is direct voltage, and is harmless, use safer, thereby overcome leak electricity the easily problem of Danger Electric shock risk of ON-OFF control circuit of the prior art.
And as can be seen from Figure 2, have only and still keep original connected mode between live wire and the load, do not need to be connected with many leads, and the line between AC power and the switch only needs a thin wire to get final product, thereby the number of conductors in the ON-OFF control circuit is reduced in a large number, thereby reduced the cost of ON-OFF control circuit, realized the purpose of safety energy-conserving environment protection.
Fig. 3 shows the digital bistable state pin of chip schematic diagram according to the embodiment of the invention one.As shown in Figure 3, in order to reduce the quantity of the device in the circuit, adopt digital bistable state chip to drive relay work in this enforcement.The digital bistable state chip that adopts in the present embodiment has pin VSS publicly, power input pin VDD, and for the input end of clock CP of input clock signal, reset terminal CR forbids holding INH, pulse data output Y0 to Y3.Wherein, when reset terminal CR input signal is high level, Y0 pin output high level, Y1 pin and Y2 pin output low level; Forbidding holding INH is low level, and input end of clock CP can make digital bistable electro road technique when being sinusoidal signal, and changes the output of Y0 to Y2 pin.
Therefore, configuration can be learnt according to this numeral bistable state pin of chip, when reset terminal CR is high level and when forbidding holding INH to be low level, Y0 is output as high level " 1 "; When giving high level of input end of clock CP input, Y1 is high level " 1 ", and Y0 becomes low level " 0 "; When giving high level of input end of clock CP input again, Y2 is high level " 1 ", and Y1 becomes low level " 0 ", and Y0 still keeps low level " 0 " at this moment.
Fig. 4 shows the principle schematic according to the ON-OFF control circuit of the embodiment of the invention two.As shown in Figure 4, for each components and parts among the embodiment one are protected, the ON-OFF control circuit in the present embodiment also comprises: the live wire end that is connected in power supply exchanges the resistance R 1 between the side ports with rectifier SSR first; Be connected in the cathode output end of rectifier SSR and the resistance R 2 between the first node P1; Be connected in the resistance R 3 between the coil of the emitter of triode Q1 and relay K 1; Be connected in the resistance R 4 between the first pulse data output Y1 of the base stage of triode Q1 and digital bistable circuit BTC; Be connected in the end of triggering signal input block SK and the resistance R 7 between the first node P1; Be connected in the diode D1 at the coil two ends of relay K 1.
Wherein, 1 pair of capacitor C of resistance R 1 is carried out discharge prevention, resistance R 2 is used for voltage stabilizing didoe ZD1 is carried out current-limiting protection; prevent the voltage surge fluctuation; resistance R 3 is used for the coil of triode Q1 and relay K 1 is carried out current-limiting protection; and resistance R 4 plays the effect of digital bistable circuit BTC being isolated trigger protection, prevents the device that the excessive scaling loss of voltage on the circuit is connected with these resistance.And the first diode D1 that is connected in the coil two ends of relay K 1 plays the effect of protection relay K1.
Fig. 5 shows the principle schematic according to the ON-OFF control circuit of the embodiment of the invention three.As shown in Figure 5, the ON-OFF control circuit in the present embodiment also comprises: be connected in the resistance R 6 between the power input VDD of first node P1 and digital bistable circuit BTC; Be connected in the 3rd polar capacitor C3 between the reset terminal CR of the power input VDD of digital bistable circuit BTC and digital bistable circuit BTC, wherein, the reset terminal CR of digital bistable circuit BTC is connected with the second pulse data output Y2 of digital bistable circuit BTC.Because reset terminal CR is connected with pulse data output Y2, then reset terminal CR also becomes high level when Y2 output high level, and this moment, digital bistable circuit resetted.
Simultaneously, the ON-OFF control circuit in the present embodiment also comprises: first LED 1, and the first pulse data output Y1 of anodal and digital bistable circuit BTC is connected; Second LED 2, the 3rd pulse data output Y0 of anodal and digital bistable circuit BTC is connected; Resistance R 5, one ends are connected other end ground connection with the negative pole of first LED 1 and the negative pole of second LED 2 respectively.
Circuit working principle in the present embodiment is as follows: the hot voltage of civil power 220V voltage source transfers to rectifier SSR and carries out rectification after capacitor C 1 step-down, and is used to capacitor C 1 discharge with capacitor C 1 parallel resistor R1.Rectifier SSR becomes direct voltage with alternating voltage after carrying out rectification, and cathode output end output forward voltage transfers to voltage stabilizing didoe ZD1 through resistance R 2 and carries out voltage stabilizing, and transfers to capacitor C 2 and carry out filtering.Be series at the resistance R 2 of connecting between the cathode output end of voltage stabilizing didoe ZD1 and rectifier SSR and be used for preventing that the fluctuation of electrical network surge is excessive, thereby cause the possibility of scaling loss voltage stabilizing didoe ZD1.The positive voltage of the cathode output end output of rectifier SSR is through the power input of current-limiting resistance R6 dividing potential drop to digital bistable circuit BTC, and for digital bistable circuit work, current-limiting resistance also plays the effect of the digital bistable circuit of protection simultaneously.3 of the capacitor C that is connected between power input and the reset terminal of numeral bistable circuit are used for carrying out filtering, prevent that the fluctuation on the circuit from causing bistable circuit misoperation to occur.Resistance R 7 is connected with the cathode output end of rectifier SSR, then plays the dividing potential drop effect, protects connected key switch.
When pressing SK touching switch once, capacitor C 4 chargings, after capacitor C 4 chargings, discharged by R8, the electricity that is full of on the C4 electric capacity is put fast, prepare conversion next time positive or negative pulse triggering signal and come triggered digital bistable circuit BTC work, whenever SK touches once, stable positive or negative pulse voltage of first pulse data trigger end output of numeral bistable circuit BTC is given the base stage of triode Q1 through R4, make triode Q1 conducting or end, thereby the closed or disconnection of the coil electricity that makes relay K 1, thereby the normal opened contact energising that makes relay K 1 is closed or thereby disconnection energising drive load is closed and go into operation work, and when digital bistable circuit was output as the state of positive pulse, LED 1 indicator light was bright, be relay often open the node closure, the state that load is described is the state of operating state, and when digital bistable circuit was output as negative pulse, LED 2 indicator lights were bright, the node of often opening that shows relay is opened, and illustrates that load is in off state.The effect that is LED1, LED2 is safety utilization of electric power caution indicator light.
And in the present embodiment, C1 adopts the work to take power of resistance-capacitance depressurization pattern, and polar capacitor C1 is equivalent to a small-sized reactive power compensation electric capacity, and the loss of C1 merit is considerably less, can play the effect of stablizing alternating voltage.
Fig. 6 shows the principle schematic according to the ON-OFF control circuit of the embodiment of the invention four.As shown in Figure 6, ON-OFF control circuit also comprises: be connected in the 3rd LED 3 between the common VSS of the 8th resistance R 8 and digital bistable circuit BTC, be used to indicate the state of triggering signal input block SK.
When pressing triggering signal input block SK once the time, capacitor C 4 chargings, LED 3 indicator lights can be bright simultaneously, LED3 is bright to illustrate that then triggering signal is normal, after capacitor C 4 chargings, form a discharge circuit by resistance R 8 and LED 3, electricity sufficient on the C4 electric capacity is put fast, prepare conversion next time positive or negative pulse triggering signal and come triggered digital bistable circuit BTC work.
In the above embodiment of the present invention, triggering signal input block SK is key switch.Thereby can send triggering signal to digital bistable circuit, and cost is lower.Can certainly adopt other triggering signal input block, as audio-switch, infrared switch etc., realize importing the function of triggering signal.
Fig. 7 shows the logic schematic diagram according to the digital bistable circuit of the embodiment of the invention.As shown in Figure 7, digital bistable circuit comprises: power input VDD (not shown) is used to digital bistable circuit BTC that operating voltage is provided; Common VSS is used for making digital bistable circuit BTC effective grounding; Schmidt circuit is made up of inverter 11 and inverter 12 and dividing potential drop feedback resistance (not shown), and input forms the input end of clock CP of digital bistable circuit BTC; What second inverter 14, input formed digital bistable circuit BTC forbids holding INH; First AND circuit 13, first input end is connected with the output of Schmidt circuit, and second input is connected with the output of several second inverters, and output forms clock signal input node; The 3rd inverter 15, input form the reset terminal CR of digital bistable circuit BTC; The 4th inverter 16, input is connected with the output of the 3rd inverter 15; First synchronous rs flip-flop 17, first input end is connected with the output of the 4th inverter 16, and second input is connected with common VSS, and the clock end is connected to clock signal input node; Second synchronous rs flip-flop 18, first input end is connected with the output of the 4th inverter 16, and second input is connected with first output of first rest-set flip-flop 17, and the clock end is connected to the clock signal input node; First OR-NOT circuit 19, first input end is connected with first output of first synchronous rs flip-flop 17, and second input is connected with second output of second synchronous rs flip-flop 18, and the 3rd input is connected with second output of the 3rd synchronous rs flip-flop 21; Second OR-NOT circuit 20, first input end is connected with second output of second synchronous rs flip-flop 18, and second input is connected with the output of first OR-NOT circuit 19; The first input end of the 3rd synchronous rs flip-flop 21 is connected with the output of the 4th inverter 16, and second input is connected with the output of second OR-NOT circuit, and the clock end is connected to the clock signal input node; The 4th synchronous rs flip-flop 22, first input end is connected with the output of the 4th inverter 16, and second input is connected with first output of the 3rd rest-set flip-flop 21, and the clock end is connected to the clock signal input node; Second AND circuit 25, output form the first pulse data output Y1 of digital bistable circuit BTC; The 3rd AND circuit 28, output form the second pulse data output Y0 of digital bistable circuit BTC; The 4th AND circuit 31, output form the 3rd pulse data output Y2 of digital bistable circuit BTC.
Wherein, second output of first synchronous rs flip-flop 17 is connected with the first input end of second AND circuit 25 through the 5th inverter 23 backs, and first output of second synchronous rs flip-flop 18 is connected with second input of second AND circuit 25 through hex inverter 23 backs; First output of the 4th synchronous rs flip-flop 22 is connected with the first input end of the 3rd AND circuit 28 through the 7th inverter 26 backs, and first output of first synchronous rs flip-flop 17 is connected with second input of the 3rd AND circuit 28 through the 8th inverter 27 backs; Second output of second synchronous rs flip-flop 18 is connected with the first input end of the 4th AND circuit 31 through the 9th inverter 29 backs, and first output of the 3rd synchronous rs flip-flop 21 is connected with second input of the 4th AND circuit 31 through the tenth inverter 30 backs.Only illustrate schematically wherein a kind of logic schematic diagram of digital bistable circuit in the present embodiment, can also adopt other structure certainly, perhaps change in structure shown in Figure 7, as long as can realize the logic of circuit among Fig. 7.
As can be seen from the above description, the above embodiments of the present invention have realized following technique effect:
By rectifier is set in ON-OFF control circuit, the alternating current that alternating-current voltage source is provided is converted into the lower direct voltage of magnitude of voltage, and by the work of triggering signal input block input triggering signal triggered digital bistable circuit, and then make relay open or close and being connected of load according to the output signal of digital bistable circuit.Because the voltage of the various piece of ON-OFF control circuit is direct voltage, and is harmless, use safer, thereby overcome leak electricity the easily problem of Danger Electric shock risk of ON-OFF control circuit of the prior art.
Simultaneously, have only in the present invention and still keep original connected mode between live wire and the load, do not need to be connected with many leads, and the line between AC power and the switch only needs a thin wire to get final product, thereby the number of conductors in the ON-OFF control circuit is reduced in a large number, thereby reduced the cost of ON-OFF control circuit, realized purpose of energy saving.
The above is the preferred embodiments of the present invention only, is not limited to the present invention, and for a person skilled in the art, the present invention can have various changes and variation.Within the spirit and principles in the present invention all, any modification of doing, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (3)
1. an electronic switch control circuit is characterized in that, comprising:
Rectification circuit, first ac input end is connected with the live wire end of AC power, and second ac input end is connected with the zero line side of described AC power, is used for alternating current is converted to direct current;
Triggering signal input block (SK), first end is connected to the output of described rectification circuit, is used for the input triggering signal;
Relay (K1) has coil and normally opened contact, and an end of wherein said normally opened contact is connected with the live wire end of described AC power, and the other end is connected with load;
Relay drive circuit, input is connected with second end of described triggering signal input block (SK), and output is connected with the coil of described relay, is used for the break-make of the described coil of control;
Described rectification circuit comprises:
First electric capacity (C1), one end form first ac input end of described rectification circuit;
Rectifier (SSR), first exchanges side ports is connected with the other end of described first electric capacity (C1), and second exchanges second ac input end that side ports forms described rectification circuit, and the cathode output end place has first node (P1), cathode output end ground connection;
First voltage stabilizing didoe (ZD1), negative pole are connected to described first node (P1), plus earth;
First polar capacitor (C2), positive pole are connected to described first node (P1), minus earth;
Described relay drive circuit comprises:
Numeral bistable circuit (BTC), power input (VDD) is connected to described first node (P1), common (VSS) ground connection, input end of clock (CP) is connected with second end of described triggering signal input block (SK);
Second polar capacitor (C4), the input end of clock (CP) of anodal and described digital bistable circuit (BTC) is connected, and negative pole is connected back ground connection with the end (INH) of forbidding of described digital bistable circuit (BTC);
First resistance (R8) is connected in parallel with described second polar capacitor (C4);
Triode (Q1), collector electrode are connected to described first node (P1), and base stage is connected with the first pulse data output (Y1) of described digital bistable circuit (BTC), and emitter is connected with an end of the coil of described relay (K1);
Described electronic switch control circuit also comprises:
The live wire end that is connected in described power supply exchanges second resistance (R1) between the side ports with described rectifier (SSR) first;
Be connected in the cathode output end of described rectifier (SSR) and the 3rd resistance (R2) between the described first node (P1);
Be connected in the 4th resistance (R3) between the coil of the emitter of described triode (Q1) and described relay (K1);
Be connected in the 5th resistance (R4) between the first pulse data output (Y1) of the base stage of described triode (Q1) and described digital bistable circuit (BTC);
Be connected in an end of described triggering signal input block (SK) and the 6th resistance (R7) between the described first node (P1);
Be connected in first diode (D1) at the coil two ends of described relay (K1);
Described electronic switch control circuit also comprises:
Be connected in the 7th resistance (R6) between the power input (VDD) of described first node (P1) and described digital bistable circuit (BTC);
Be connected in the 3rd polar capacitor (C3) between the reset terminal (CR) of the power input (VDD) of described digital bistable circuit (BTC) and described digital bistable circuit (BTC), wherein,
The reset terminal (CR) of described digital bistable circuit (BTC) is connected with the 3rd pulse data output (Y2) of described digital bistable circuit (BTC);
Described ON-OFF control circuit also comprises:
First light-emitting diode (LED1), the first pulse data output (Y1) of anodal and described digital bistable circuit (BTC) is connected;
Second light-emitting diode (LED2), the second pulse data output (Y2) of anodal and described digital bistable circuit (BTC) is connected;
The 8th resistance (R5), an end are connected other end ground connection with the negative pole of described first light-emitting diode (LED1) and the negative pole of described second light-emitting diode (LED2) respectively;
Described ON-OFF control circuit also comprises:
Be connected in the 3rd light-emitting diode (LED3) between the common (VSS) of described the 8th resistance (R8) and described digital bistable circuit (BTC).
2. ON-OFF control circuit according to claim 1 is characterized in that, described triggering signal input block (SK) is key switch.
3. ON-OFF control circuit according to claim 1 and 2 is characterized in that, described digital bistable circuit (BTC) comprising:
Power input (VDD) is used to described digital bistable circuit (BTC) that operating voltage is provided;
Common (VSS) is used for making described digital bistable circuit (BTC) effective grounding;
Schmidt circuit, input form the input end of clock (CP) of described digital bistable circuit (BTC);
Second inverter (14), input form described digital bistable circuit (BTC) forbid the end (INH);
First AND circuit (13), first input end is connected with the output of described Schmidt circuit, and second input is connected with the output of described second inverter, and output forms clock signal input node;
The 3rd inverter (15), input form the reset terminal (CR) of described digital bistable circuit (BTC);
The 4th inverter (16), input is connected with the output of described the 3rd inverter (15);
First synchronous rs flip-flop (17), first input end is connected with the output of described the 4th inverter (16), and second input is connected with described common (VSS), and the clock end is connected to described clock signal input node;
Second synchronous rs flip-flop (18), first input end is connected with the output of described the 4th inverter (16), and second input is connected with first output of described first synchronous rs flip-flop (17), and the clock end is connected to described clock signal input node;
First OR-NOT circuit (19), first input end is connected with first output of described first synchronous rs flip-flop (17), second input is connected with second output of described second synchronous rs flip-flop (18), and the 3rd input is connected with second output of the 3rd synchronous rs flip-flop (21);
Second OR-NOT circuit (20), first input end is connected with second output of described second synchronous rs flip-flop (18), and second input is connected with the output of described first OR-NOT circuit (19);
The first input end of described the 3rd synchronous rs flip-flop (21) is connected with the output of described the 4th inverter (16), and second input is connected with the output of described second OR-NOT circuit (20), and the clock end is connected to described clock signal input node;
The 4th synchronous rs flip-flop (22), first input end is connected with the output of described the 4th inverter (16), and second input is connected with first output of described the 3rd synchronous rs flip-flop (21), and the clock end is connected to described clock signal input node;
Second AND circuit (25), output forms the first pulse data output (Y1) of described digital bistable circuit (BTC), wherein, second output of described first synchronous rs flip-flop (17) is connected with the first input end of described second AND circuit (25) through the 5th inverter (23) back, and first output of described second synchronous rs flip-flop (18) is connected with second input of described second AND circuit (25) through hex inverter (23) back;
The 3rd AND circuit (28), output forms the second pulse data output (Y0) of described digital bistable circuit (BTC), wherein, first output of described the 4th synchronous rs flip-flop (22) is connected with the first input end of described the 3rd AND circuit (28) through the 7th inverter (26) back, and first output of described first synchronous rs flip-flop (17) is connected with second input of described the 3rd AND circuit (28) through the 8th inverter (27) back;
The 4th AND circuit (31), output forms the 3rd pulse data output (Y2) of described digital bistable circuit (BTC), wherein, second output of described second synchronous rs flip-flop (18) is connected with the first input end of described the 4th AND circuit (31) through the 9th inverter (29) back, and first output of described the 3rd synchronous rs flip-flop (21) is connected with second input of described the 4th AND circuit (31) through the tenth inverter (30) back.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201010568401 CN101997525B (en) | 2010-11-30 | 2010-11-30 | Switch control circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201010568401 CN101997525B (en) | 2010-11-30 | 2010-11-30 | Switch control circuit |
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| CN101997525A CN101997525A (en) | 2011-03-30 |
| CN101997525B true CN101997525B (en) | 2013-09-11 |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4879495A (en) * | 1986-10-06 | 1989-11-07 | Yujiro Yamamoto | Illumination control methods and means |
| US4896079A (en) * | 1988-05-20 | 1990-01-23 | Prescolite, Inc. | Bi-level switch |
| CN201119103Y (en) * | 2007-10-24 | 2008-09-17 | 何伟 | Multi-channel switch control module for lighting lamp |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201985829U (en) * | 2010-11-30 | 2011-09-21 | 张献忠 | Switch control circuit |
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2010
- 2010-11-30 CN CN 201010568401 patent/CN101997525B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4879495A (en) * | 1986-10-06 | 1989-11-07 | Yujiro Yamamoto | Illumination control methods and means |
| US4896079A (en) * | 1988-05-20 | 1990-01-23 | Prescolite, Inc. | Bi-level switch |
| CN201119103Y (en) * | 2007-10-24 | 2008-09-17 | 何伟 | Multi-channel switch control module for lighting lamp |
Non-Patent Citations (1)
| Title |
|---|
| FAIRCHILD SEMICONDUCTOR.CD4017BC CD4022BC Decade Counter/Divider with 10 Decoded Outputs Divide-by-8 Counter/Divider with 8 Decoded Outputs.《CD4017BC CD4022BC Decade Counter/Divider with 10 Decoded Outputs Divide-by-8 Counter/Divider with 8 Decoded Outputs》.2002,第1页至第2页. * |
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