CN101996480A - Wireless sensor measurement system of self-calibration integrated circuit - Google Patents
Wireless sensor measurement system of self-calibration integrated circuit Download PDFInfo
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Abstract
The invention discloses a wireless sensor measurement system of a self-calibration integrated circuit. In the system, the output end of a phase-locked loop is connected with the input end of a power amplifier, and the output end of an amplitude detector is connected with a first data processor; the reference voltage output end of an energy converter is connected with an analog/digital (A/D) converter, the output end of the A/D converter is connected with the input end of a second data processor, and the output end of the second data processor is connected with a load modulator; and the load modulator, the energy converter and one of a pair of resonance coils are connected in parallel, and the power amplifier, the other one of the pair of resonance coils and the amplitude detection are connected in sequence, wherein the A/D converter is provided with a self-calibration circuit, and a self-calibration algorithm circuit is integrated on the first data processor. The wireless sensor measurement system has the advantage that the influences of environment variation, technical errors and the like on measurement precision are weakened.
Description
Technical field
The present invention relates to a kind of wireless sensing measuring system.This system integration self-calibration circuit, the measuring accuracy height.
Background technology
The wireless sensing measuring technique is widely used in every field, comprises the real-time monitoring of temperature, humidity, pressure etc.Because complexity is low, cost is low, the life-span is waited so long remarkable advantage, the passive sensing chip has obtained using widely than active sensor chip in the wireless sensing measuring system.The passive and wireless sensing measurement system comprises transmitting chip and two parts of passive sensing chip, the passive sensing chip is converted into self energy needed with the electromagnetic wave of transmitting chip emission, and the variable that sensor detected is converted into digital signal, be coupled to transmitting chip.Transmitting chip can detect this digital signal and transfer to single-chip microcomputer and handle.
But owing to the wireless sensing measuring system is used under the environment condition of severe of being everlasting, such as high temperature, humidity etc., conventional measuring method can be subjected to bigger influence, and causes measuring result error bigger.The present invention is integrated self-calibration circuit in wireless sensing measured chip group, and this circuit structure is simple, weakens simultaneously the influence to measuring accuracy of working environment, production technology greatly.
Summary of the invention
The wireless sensing measuring system that the purpose of this invention is to provide a kind of integrated self-calibration circuit.
For achieving the above object, the technical solution used in the present invention is: the wireless sensing measuring system of this integrated self-calibration circuit comprises transmitting chip, passive sensing chip and a pair of resonance coil, described transmitting chip comprises phaselocked loop, power amplifier, range detector and first data processor, and described passive sensing chip comprises load modulator, energy converter, second data processor and analog to digital converter; The output terminal of described phaselocked loop is connected with the input end of power amplifier, and the output terminal of range detector is connected with first data processor; The reference voltage output terminal of described energy converter is connected with analog to digital converter, and the output terminal of described analog to digital converter is connected with the input end of second data processor, and the output terminal of second data processor is connected with load modulator; One of them resonance coil in load modulator, energy converter and the described a pair of resonance coil is parallel with one another, and another coil, range detector in power amplifier, the described a pair of resonance coil connect successively.
Further, first data processor of the present invention comprises demoder, phase inverter, first latch, second latch, divider, multiplier and data-interface converter; The data input pin of described demoder is connected with the output terminal of range detector, the wherein one digit number of described demoder is connected with the clock end of first latch, the input end of phase inverter respectively according to output terminal, the corresponding connection of each data input pin of other bit data output terminal of demoder and first latch, second latch; The output terminal of phase inverter is connected with the clock end of second latch, the data output end of first latch is connected with the divisor input end of divider, the data output end of second latch is connected with one of them input end of multiplier, another input end of multiplier is connected with high level, the output terminal of multiplier is connected with the dividend input end of divider, and merchant's output terminal of divider is connected with the data input pin of data-interface converter.
Further, analog to digital converter of the present invention comprises selector switch, counter, the 3rd latch, comparer, d type flip flop, delay cell, two-divider, current source, electric capacity and NMOS pipe, described current source and capacitance series, the NMOS pipe is in parallel with electric capacity, a wherein end ground connection of described electric capacity, the other end of this electric capacity is connected with the V+ of comparer end; 1 port of selector switch is connected with the reference voltage output terminal of energy converter, the output terminal of selector switch is connected with the V-of comparer end, the output terminal of comparer is connected with the data terminal of d type flip flop, the output terminal of d type flip flop respectively with the clock end of the 3rd latch, the input end of delay cell connects, the output terminal of delay cell respectively with the input end of two-divider, the grid of NMOS pipe, the reset terminal of counter connects, the output terminal of two-divider and the selecting side of selector switch, the wherein one digit number of the 3rd latch connects according to input end, and other data input pins of the 3rd latch are connected with the data output end of counter.
Compared with prior art, the useful effect that has of the present invention is:
A) the integrated selector switch of analog to digital converter in the passive sensing chip, the reference voltage V that selector switch produces at energy converter
RefDividing potential drop V with sensor and fixed resistance
DataMiddle its V-that exports to comparer in the lump end of selecting.Thereby, the analog to digital converter proposed by the invention reference voltage V that not only samples
RefValue, and sampling sensor detection variable V
DataValue, the variable of sampling is the relative value of sensor electrical pressure ratio reference voltage.By the control of two-divider, the sample objects of analog to digital converter is at reference voltage V
RefWith the sensor variable V
DataBetween automatically switch.Traditional measuring method is survey sensor detection variable V only
DataValue, but because the influence of environmental change, process deviation etc., reference voltage V
RefCan change and cause measurement result inaccurate.Different with conventional method, the present invention utilizes analog to digital converter sampling sensor detection variable V
DataWith reference voltage V
RefValue, thereby the relative value that obtains has been avoided because of the unstable influence that measuring accuracy is caused of reference voltage.
B) the transmitting chip two secondary data V that will receive
DataAnd V
RefSend in first data processor, in first data processor, integrated parallel binary multiplier and parallel binary divider.After demoder is correctly decoded, carry out binary arithmetic, V
DataMultiply by 0x3FF and divided by V
Ref, its result is aligned between 0～1024.At last, this result sends in the data-interface converter and output, thereby realizes automatic calibration algorithm.The data-interface converter can be selected pulse modulated wave maker, serial communication interface etc. for use.The present invention is a pulse-modulated signal with data calibration, the interface of reduced data and single-chip microcomputer, and circuit structure is simple, and is practical.
Description of drawings
Fig. 1 is the structural representation of wireless sensing measuring system of the present invention;
Fig. 2 is the circuit theory diagrams of analog to digital converter of the present invention;
Fig. 3 is the circuit theory diagrams of first data processor of the present invention.
Among the figure: 1, phaselocked loop, 2, power amplifier, 3, range detector, 4, first data processor, 5, resonance coil, 6, load modulator, 7, energy converter, 8, second data processor, 9, analog to digital converter, 10, resistance sensor, 11, selector switch, 12, counter, 13, the 3rd latch, 14, comparer, 15, delay cell, 16, d type flip flop, 17, two-divider, 18, demoder, 19, phase inverter, 20, first latch, 21, second latch, 22, divider, 23, multiplier, 24, the data-interface converter, 25, current source.
Embodiment
The invention will be further described below in conjunction with drawings and Examples.
As shown in Figure 1, the wireless sensing measuring system of the integrated self-calibration circuit of the present invention comprises transmitting chip, passive sensing chip and a pair of resonance coil 5, transmitting chip comprises phaselocked loop 1, power amplifier 2, range detector 3 and first data processor 4, and the passive sensing chip comprises load modulator 6, energy converter 7, second data processor 8 and analog to digital converter 9; The output terminal of phaselocked loop 1 is connected with the input end of power amplifier 2; The output terminal of analog to digital converter 9 is connected with the input end of second data processor 8, and the output terminal of second data processor 8 is connected with load modulator 6; Load modulator 6, energy converter 7 are in parallel with one of them resonance coil in a pair of resonance coil, and another coil in power amplifier 2, a pair of resonance coil, range detector 3 connect successively.
As shown in Figure 2, analog to digital converter 9 adopts the integral form structure, analog to digital converter 9 comprises selector switch 11, counter 12, the 3rd latch 13, comparer 14, d type flip flop 16, delay cell 15, two-divider 17, current source 25, electric capacity and NMOS pipe, current source 25 and capacitance series, the NMOS pipe is in parallel with electric capacity, a wherein end ground connection of electric capacity, the other end of this electric capacity is connected with the V+ end of comparer 14; 1 port of selector switch 11 is connected with the reference voltage output terminal of energy converter 7, the output terminal of selector switch 11 is connected with the V-end of comparer 14, the output terminal of comparer 14 is connected with the data terminal of d type flip flop 16, the output terminal of d type flip flop 16 respectively with the clock end of the 3rd latch 13, the input end of delay cell 15 connects, the output terminal of delay cell 15 respectively with the input end of two-divider 17, the grid of NMOS pipe, the reset terminal of counter 12 connects, the selecting side of the output terminal of two-divider 17 and selector switch 11, the wherein one digit number of the 3rd latch 13 connects according to input end, and other data input pins of the 3rd latch 13 are connected with the data output end of counter 12.
As shown in Figure 3, first data processor 4 comprises demoder 18, phase inverter 19, first latch 20, second latch 21, divider 22, multiplier 23 and data-interface converter 24; The data input pin of demoder 18 is connected with the output terminal of range detector 3, the wherein one digit number of demoder 18 is connected with the clock end of first latch 20, the input end of phase inverter 19 respectively according to output terminal, the corresponding connection of each data input pin of other bit data output terminal of demoder 18 and first latch 20, second latch 21; The output terminal of phase inverter 19 is connected with the clock end of second latch 21, the data output end of first latch 20 is connected with the divisor input end of divider 22, the data output end of second latch 21 is connected with one of them input end of multiplier 23, another input end of multiplier 23 is connected with high level, the output terminal of multiplier 23 is connected with the dividend input end of divider 22, and merchant's output terminal of divider is connected with the data input pin of data-interface converter 24.
The present invention can be widely used in the detection of variablees such as temperature, humidity, pressure according to the difference of sensor 10 types, and sensor 10 should be resistance sensor.During use, with the reference voltage V of 7 generations of energy converter in the passive sensing chip
RefBe connected with an end of resistance sensor 10, the other end of resistance sensor respectively with 0 port, the fixed resistance R of selector switch 11
1An end connect fixed resistance R
1Other end ground connection, form bleeder circuit, as shown in Figure 2.The course of work of the present invention is as follows:
A) transmitting chip by phaselocked loop 1 and power amplifier 2 through the outside launching electromagnetic wave of one of them resonance coil, the passive sensing chip is through another resonance coil received energy, by energy converter 7 electromagnetic wave is converted into stable voltage and entire chip work is provided, and produce reference voltage V
RefOffer analog to digital converter 9.
B) passive sensing chip dies number converter 9 is converted to digital signal with the variation of external sensor 10, via second data processor, 8 codings, gives load modulator 6, carrier wave is modulated, and be coupled to transmitting chip.Concrete principle of work can be referring to Fig. 2: at first, and 25 pairs of capacitor C of 2uA current source
1Charging, unison counter 12 begin counting, work as capacitor C
1Charging voltage V+ when equaling V-, comparer 14 output high level through d type flip flop 16 back generation synchronously Latch signal, and are latched into the value of this hour counter 12 in the 3rd latch 13, this value is the binary data of V-correspondence.Then, V-is by resistance sensor 10 resistance R
SensorWith fixed resistance R
1Dividing potential drop V
DataWith reference voltage V
RefGet via selector switch 11.Through two-divider 17 gained, promptly V-is at V by the Latch signal for selection signal SEL
DataWith V
RefThe middle automatic switchover.Select signal SEL to be connected according to input end D12 simultaneously, be used for judging that these data are V with the one digit number of the 3rd latch 13
DataOr V
RefAt last, behind the delayed unit 15 of Latch signal, become the RST signal simultaneously with counter 12 zero clearings, and open NMOS pipe M
1, make capacitor C
1Discharge.Comparer 14 is output as lowly then, and behind d type flip flop 16, RST becomes low, closes NMOS pipe M
1, the charging of a beginning new round.Analog to digital converter 9 V that not only samples
DataValue, and the sampling V
RefValue, two values all will be sent into second data processor 8 and modulation.
C) transmitting chip is by range detector 3 detected carrier envelopes, demodulate correct data-signal after, transfer to first data processor 4 and handle and calibration.In first data processor 4, correct data are converted into parallel data through demoder 18 with serial data earlier, and judge according to D12, if 1, these data are sent into first latch 20, show that these data are V
RefData; If 0, these data are sent into second latch 21, show that these data are V
DataData.Carry out binary arithmetic, V then
DataMultiply by 0x3FF and divided by V
Ref, its result is aligned between 0～1024.At last, this result sends in the data-interface converter and output, thereby realizes automatic calibration algorithm.The data-interface converter can be selected pulse modulated wave maker, serial communication interface etc. for use.The present invention is a pulse-modulated signal with data calibration, the interface of reduced data and single-chip microcomputer, and circuit structure is simple, and is practical.
Claims (3)
1. the wireless sensing measuring system of an integrated self-calibration circuit, it is characterized in that: comprise transmitting chip, passive sensing chip and a pair of resonance coil (5), described transmitting chip comprises phaselocked loop (1), power amplifier (2), range detector (3) and first data processor (4), and described passive sensing chip comprises load modulator (6), energy converter (7), second data processor (8) and analog to digital converter (9); The output terminal of described phaselocked loop (1) is connected with the input end of power amplifier (2), and the output terminal of range detector (3) is connected with first data processor (4); The reference voltage output terminal of described energy converter (7) is connected with analog to digital converter (9), the output terminal of described analog to digital converter (9) is connected with the input end of second data processor (8), and the output terminal of second data processor (8) is connected with load modulator (6); One of them resonance coil in load modulator (6), energy converter (7) and the described a pair of resonance coil is parallel with one another, and another coil, range detector (3) in power amplifier (2), the described a pair of resonance coil connect successively.
2. the wireless sensing measuring system of integrated self-calibration circuit according to claim 1, it is characterized in that: described first data processor (4) comprises demoder (18), phase inverter (19), first latch (20), second latch (21), divider (22), multiplier (23) and data-interface converter (24); The data input pin of described demoder (18) is connected with the output terminal of range detector (3), the wherein one digit number of described demoder (18) is connected with the clock end of first latch (20), the input end of phase inverter (19) respectively according to output terminal, the corresponding connection of each data input pin of other bit data output terminal of demoder (18) and first latch (20), second latch (21); The output terminal of phase inverter (19) is connected with the clock end of second latch (21), the data output end of first latch (20) is connected with the divisor input end of divider (22), the data output end of second latch (21) is connected with one of them input end of multiplier (23), another input end of multiplier (23) is connected with high level, the output terminal of multiplier (23) is connected with the dividend input end of divider (22), and merchant's output terminal of divider is connected with the data input pin of data-interface converter (24).
3. the wireless sensing measuring system of integrated self-calibration circuit according to claim 1 and 2, it is characterized in that: described analog to digital converter (9) comprises selector switch (11), counter (12), the 3rd latch (13), comparer (14), d type flip flop (16), delay cell (15), two-divider (17), current source (25), electric capacity and NMOS pipe, described current source (25) and capacitance series, the NMOS pipe is in parallel with electric capacity, a wherein end ground connection of described electric capacity, the other end of this electric capacity is connected with the V+ end of comparer (14); 1 port of selector switch (11) is connected with the reference voltage output terminal of energy converter (7), the output terminal of selector switch (11) is connected with the V-end of comparer (14), the output terminal of comparer (14) is connected with the data terminal of d type flip flop (16), the output terminal of d type flip flop (16) respectively with the clock end of the 3rd latch (13), the input end of delay cell (15) connects, the output terminal of delay cell (15) respectively with the input end of two-divider (17), the grid of NMOS pipe, the reset terminal of counter (12) connects, the selecting side of the output terminal of two-divider (17) and selector switch (11), the wherein one digit number of the 3rd latch (13) connects according to input end, and other data input pins of the 3rd latch (13) are connected with the data output end of counter (12).
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103456157A (en) * | 2013-09-23 | 2013-12-18 | 东南大学 | Long distance passive wireless sensor remote-measuring system |
| CN103456156A (en) * | 2013-09-23 | 2013-12-18 | 东南大学 | Long-distance passive wireless sensor remote-measuring system with working frequency adjustable |
| CN103575306A (en) * | 2013-11-18 | 2014-02-12 | 东南大学 | Passive wireless multi-parameter sensor system and multi-parameter measurement method thereof |
| CN103925944A (en) * | 2014-04-11 | 2014-07-16 | 东南大学 | Airtight spraying room environment monitoring system based on passive wireless sensing technology |
| CN105806410A (en) * | 2016-03-31 | 2016-07-27 | 东南大学 | Multipoint pressure-sensor passive wireless measuring circuit |
| CN106683387A (en) * | 2016-12-10 | 2017-05-17 | 杭州鸿雁智能科技有限公司 | Passive sensing device and passive type wireless sensing system |
| CN115437437A (en) * | 2021-06-03 | 2022-12-06 | 辉芒微电子(深圳)股份有限公司 | Chip and chip parameter offset power-on self-calibration circuit and method thereof |
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Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103456157A (en) * | 2013-09-23 | 2013-12-18 | 东南大学 | Long distance passive wireless sensor remote-measuring system |
| CN103456156A (en) * | 2013-09-23 | 2013-12-18 | 东南大学 | Long-distance passive wireless sensor remote-measuring system with working frequency adjustable |
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| CN103925944A (en) * | 2014-04-11 | 2014-07-16 | 东南大学 | Airtight spraying room environment monitoring system based on passive wireless sensing technology |
| CN105806410A (en) * | 2016-03-31 | 2016-07-27 | 东南大学 | Multipoint pressure-sensor passive wireless measuring circuit |
| CN106683387A (en) * | 2016-12-10 | 2017-05-17 | 杭州鸿雁智能科技有限公司 | Passive sensing device and passive type wireless sensing system |
| CN115437437A (en) * | 2021-06-03 | 2022-12-06 | 辉芒微电子(深圳)股份有限公司 | Chip and chip parameter offset power-on self-calibration circuit and method thereof |
| CN115437437B (en) * | 2021-06-03 | 2023-10-27 | 辉芒微电子(深圳)股份有限公司 | Chip and chip parameter imbalance power-on self-calibration circuit and method thereof |
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