CN101986594B - Method and device for realizing communication between single boards - Google Patents

Method and device for realizing communication between single boards Download PDF

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Publication number
CN101986594B
CN101986594B CN201010548897.3A CN201010548897A CN101986594B CN 101986594 B CN101986594 B CN 101986594B CN 201010548897 A CN201010548897 A CN 201010548897A CN 101986594 B CN101986594 B CN 101986594B
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message
master control
control borad
vlan
veneer
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CN101986594A (en
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孙士友
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ZTE Corp
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ZTE Corp
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Priority to PCT/CN2011/072933 priority patent/WO2012065404A1/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/24Traffic characterised by specific attributes, e.g. priority or QoS
    • H04L47/2425Traffic characterised by specific attributes, e.g. priority or QoS for supporting services specification, e.g. SLA
    • H04L47/2433Allocation of priorities to traffic types
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L2012/40267Bus for use in transportation systems
    • H04L2012/40273Bus for use in transportation systems the transportation system being a vehicle

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Small-Scale Networks (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

The invention discloses a method and a device for realizing communication between single boards. The method comprises that: when constructing a message, a sending single board adds a priority processing sign into the message encapsulated with emergency information, preferentially sends the message into a management channel according to the sign and transmits the message to a receiving single board; and after receiving the message, the receiving single board preferentially resolves the message encapsulated with the emergency information according to the priority processing sign. Chips of master control boards are stacked and soft highways (HW) are established between the main control boards and service boards to simplify the structure of equipment, effectively transmit information, fulfill the aim of fast protection switching at the same time of saving side lines of a backboard and realize fastest information transmission and protection switching on links among the main control boards and between the main control boards and the service boards; therefore, the method and the device can improve the data communication capacity and protection capacity of the overall system under a simple system architecture.

Description

A kind of method and device realizing communication between single boards
Technical field
The present invention relates to technical field of communication equipment, particularly relate to a kind of method and the device that realize communication between single boards.
Background technology
In communication apparatus, generally take master control borad (NCP) to add the framework of business board, clock board usually and master control borad be integrated, business board comprises intersection (exchange) plate, interface board, wiring board and tributary card etc.Between master control borad and business board, have one or more passage, master control borad is responsible for the management and supervision to each business board.Business board needs timing or sporadically reports various state information, as information such as alarm, expense and heartbeats.Pretection switch control centre is generally arranged on master control borad, the information such as alarm and heartbeat that master control borad feeds back according to business board, issues switching control information after treatment.This just requires that the information such as corresponding alarm, expense, heartbeat and switching control can be transmitted rapidly between master control borad and each business board, to ensure that master control borad obtains critical alarm rapidly and makes a policy, as informing business plate carries out data channel switching or board switchover etc.Because the importance and functions of master control borad is extremely important, so generally arrange two or more than two master control borad in system, the protected modes such as 1+1,1:1,1+N or 1:N are taked to carry out work.
As shown in Figure 1, at present, the implementation method of the quick alarm passage between master control borad and business board comprises following two kinds:
(1) special HW(high-speed channel is adopted) bus run, HW bus run only transmits alarm and the information higher to delay requirement such as to switch, for management information, as the information for download program, system management and monitoring etc., the management channels that usual employing is other, the HDLC(high-level data connection control passage as traditional) S mouth passage or ethernet channel etc.The advantage of this way is that special passage can provide enough bandwidth, the quick transmission of guarantee information, and it is too much that shortcoming is that backboard sidles line, for the Iarge-scale system of interconnected complexity, cabling too much causes the backboard number of plies to increase, and cost increases, or does not possess production capacity.
(2) in view of the quantitative limitation of backplane signal number, also separately can not ward off special HW bus run, but adopt management channels to complete the transmission of alarm and switch messages.Although this way saves the quantity on backboard side line road, due to common-use tunnel Bandwidth-Constrained, be difficult to the quick transmission of emergence messages such as ensureing alarm and switch.
In addition, between multiple master control borad, the how Fast synchronization of guarantee information, realize pretection switch fast, the time how ensureing communicating interrupt after switching as far as possible short grade be also need faced by problem, traditional way adopts a reserved data synchronizing channel between primary and backup master control borad, as HDLC passage or Ethernet FE(100 m ethernet), GE(gigabit Ethernet), 10GE(ten thousand mbit ethernet) passage etc., synchronous and mutual for the number between standby usage master control borad; Simultaneously leave some hardware interconnection lines, as host(is primary between standby usage master control borad) and ready(be ready to) line etc., transmit the state of standby usage master control borad and carry out switching control.The shortcoming of this way is: active and standby is carried out activestandby state decision-making and the promptness that exchanges information is difficult to ensure; especially in the moment that masterslave switchover occurs or moment of frequently occurring of even more serious masterslave switchover, the temporary or long-time chain rupture of management channels can often be caused.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of method and the device that realize communication between single boards, when not increasing cabling, realizes the efficient information transmission fast between standby usage master control borad and business board.
For solving the problems of the technologies described above, a kind of method realizing communication between single boards of the present invention, comprising:
Transmitting single plate, when constructing message, adds priority treatment mark in the message being packaged with emergence message, and to be sent in management channels by message prior according to this mark and to pass to reception veneer;
After reception veneer receives message, preferentially the message being packaged with emergence message is resolved according to priority treatment mark.
Further, the method also comprises:
When transmitting single plate or reception veneer are one of them of polylith master control borad, chip polymerization is carried out to this polylith master control borad, realize the information interaction between polylith master control borad by the passage formed after chip polymerization.
Further, priority treatment is labeled as the VLAN(VLAN in ethernet frame structure) label.
Further, transmitting single plate is master control borad, and when reception veneer is the business board receiving message, the VLAN priority in the VLAN that VLAN tag identifier is corresponding with the slot of business board, VLAN label is set to represent limit priority.
Further, transmitting single plate is business board, and when reception veneer is the master control borad receiving message, the object physical address of VLAN label is the physical address of the master control borad receiving message, and the VLAN priority in VLAN label is set to represent limit priority.
Further, the method also comprises:
Receive after the master control borad of message receives message, this message is sent to other master control borads in polylith master control borad by the passage formed after chip polymerization.
Further, a kind of device realizing communication between single boards, comprising: transmitting single plate and reception veneer, and transmitting single plate and reception veneer include programmable logic device and exchange chip, wherein:
The programmable logic device of transmitting single plate, for when constructing message, adds priority treatment mark in the message being packaged with emergence message;
The exchange chip of transmitting single plate, passes to reception veneer for being sent in management channels by message prior according to priority treatment mark;
Receiving the exchange chip of veneer, for receiving the message that transmitting single plate sends, after receiving the message comprising priority treatment mark, preferentially this message being sent to local programmable logic device;
Receive the programmable logic device of veneer, for after receiving message, the priority treatment mark according to comprising in message is preferentially resolved the message being packaged with emergence message.
Further, when transmitting single plate or reception veneer are one of them of polylith master control borad, polylith master control borad adopts chip polymerization, realizes the information interaction between polylith master control borad by the passage of formation after chip polymerization.
Further, priority treatment is labeled as the VLAN(VLAN in ethernet frame structure) label.
Further, transmitting single plate is business board, when reception veneer is one of them of polylith master control borad, and the exchange chip of master control borad, also for after receiving the message comprising priority treatment mark, this message is sent to other master control borads in polylith master control borad by the passage formed after chip polymerization.
In sum; the present invention is chip-stacked and set up soft HW passage between master control borad and business board by master control borad; the equipment of realization is simplified; and transmission information efficiently; can while saving backboard side line road; reach the object of quick protective switch, the link between master control borad and between master control borad and business board all reaches the fastest information transmission and pretection switch, thus data communication capabilities and the protective capability of whole system can be promoted under succinct system architecture.
Accompanying drawing explanation
Fig. 1 is the schematic block diagram of existing equipment protection scheme;
Fig. 2 is that present embodiment is based on the schematic diagram emulating HW and chip-stacked communication apparatus;
Fig. 3 is the flow chart realizing the method for communication between single boards of present embodiment.
Embodiment
In view of special HW bus run, backboard to be caused to sidle line for the situation that backboard slot is too much too much, present embodiment proposes the concept of a kind of soft HW, main thought is in management channels, simulate a designated lane, instead of hardware is set up separately a passage to the promptness of information transmission such as ensureing alarm and switch, both save backboard side line road, reach again the effect of specialized high-speed passage.
The implementation of soft HW bus, such as, can adopt and add priority treatment mark in the message of encapsulation emergence message, realize transmitting the emergence messages such as alarm, expense, heartbeat and switching control fast between plate.This scheme does not need to increase the line between each business board to master control borad, but utilize existing management channels between master control borad and business board, can be FE, GE etc., by marking the message carrying emergence message, construct, send, receive and resolve the message of tape label by hardware as programmable logic device, realize the emergence messages such as fast processing alarm, expense, heartbeat and switching control.Programmable logic device can adopt as field programmable gate array (Field Programmable Gate Array, FPGA) etc.
Present embodiment reaches the object of emulation HW line by marking message, realize the emergence messages such as alarm between plate, expense, heartbeat and switching control, transmitted fast by inner ethernet management passage.Such as, VLAN(VLAN can be added in the message carrying emergence message) label, realize the quick transmission of information between plate such as alarm, expense, heartbeat and switching control by adding VLAN.
Mark is carried out to message and realizes emulation HW line, be responsible for structure by FPGA, send, received and analytic message, make full use of FPGA relative to the superiority of CPU in real-time control, do not increase the weight of the burden of CPU process and analytic message on business board and master control borad.The time of the transmission cost of the emergence messages such as alarm, expense, heartbeat and switching control, depend primarily on FPGA structure, send, receive and time of analytic message, these times are generally in the scope of ten a few to tens of microseconds, therefore negligible, so the effect of special HW bus can be reached.
Chip-stacked (also claiming chip cascade) be by more than two or two chips by high-speed channel interconnected (sometimes needing the cooperation of communication packet form or communications protocol), realize effect multiple chips being modeled to a chips.
The original intention of chip-stacked generation is to increase chip capacity and interface quantity, thus the function of expensive chip.In the present embodiment, by the chip of more than two or two be positioned over respectively on different master control borad, be modeled to a chips, main purpose is not capacity increasing, but realizes pretection switch fast.Because different chips is placed on different veneer, chip stack is just equivalent to standby usage master control borad after building up one be one piece of veneer, and on standby usage master control borad, the information interaction of two or multiple chips has been modeled to the information transmission between each port of a chips.Like this, in synchronizing information, speed is faster on the one hand; Switching rate on the other hand when switching generation also can be faster.
Adopt chip-stacked in present embodiment between master control borad, between master control borad and business board, adopt soft HW, thus set up a complete closed data transmission channels.Every part in whole passage can ensure the highest efficiency, and whole system is simple, is easy to realize.
Below in conjunction with accompanying drawing, present embodiment is described in detail.
As shown in Figure 2, master control borad is configured with the FPGA that CPU, three layers/Layer2 switching chip and support mark message, wherein, L3 Switching chip can adopt the BCM56XXX family chip of BroadCom company, support chip-stacked by HiGig interface, the physical layer of HiGig interface is the transmission rate of XAUI interface, maximum 10Gbps; Business board is configured with the FPGA that CPU, Layer2 switching chip and support mark message.
As shown in Figure 3, present embodiment, from master control borad to business board direction, realizes the method for communication between single boards, comprising:
Step 301, the content (128 bytes) sending to each business board that FPGA on main control board will be write by CPU successively, be encapsulated in Ethernet message, and the VLAN corresponding with business board slot is added in the Ethernet message of encapsulation emergence message, wherein, the slot that different VLAN is corresponding different;
Such as, the filling mode of 4 bytes of VLAN is, TPID(tag protocol identifier): 0x8100(VLAN specific field, indicates this message and contains VLAN); The ID value of VLAN ID(VLAN): (self-defined); The priority of VlAN Priority(VLAN): 1(represents limit priority).
Add after VLAN message, a kind of Tagged Package(of the identified one-tenth of message adds the bag of encapsulation) or Priority tagged Package(have priority add wrapper).Ensure that message forwards with limit priority in two or three layers of repeating process, and after the FPGA arriving business board preferential dissection process.
Step 302, the FPGA of main control board is by the Ethernet message of structure, issued three/Layer2 switching chip of main control board by Ethernet interface, three/Layer2 switching chip of main control board according to IP or MAC Address by each message repeating on ethernet management passage corresponding to each slot;
Step 303, the Layer2 switching chip on business board is learnt it is the message of HW bus between plate, this message repeating is given the port at the FPGA place of this plate after receiving the message that main control board sends according to VlAN Priority;
Step 304, after the FPGA of business board receives message, takes out message payload, is saved in (128 byte) in read-only register, for this plate CPU access or be directly inserted into business expense in send.
The every 3.3ms of FPGA on main control board sends at most the message of 44 148 bytes, if business board is not in place, then without the need to sending, i.e. per second 13200 messages, flow is maximum is about 17.74M.Backboard side is used to the system of the point to point connects such as FE or GE, it is enough that remaining bandwidth is used for management channels.
In addition, when the FPGA of slave control board is in stand-by state, also can receive the CPU write of this master control borad and the content of amendment write-only register, but literary composition of outwards not transmitting messages, and receive only the message that each business board sends; Such process is the soft and hardware state in order to ensure all kinds of pretection switch control centres on each master control borad is consistent.
Business board is on the direction of master control borad, and send mode and the above-mentioned master control borad of message are similar to the working method of business board, comprising:
Step one, the FPGA on business board provides read-only register (as 128 bytes) and write-only register (as 128 bytes) by Local BUS or PCIE interface to the CPU of business board, and the traditional double being equivalent to 128 bytes is supplied to the interface of CPU to HW line;
Step 2, the content that CPU write or other hardware are inserted by the FPGA on business board, is encapsulated in Ethernet message, and adds VLAN;
Wherein, the object MAC(physical address of VLAN), each 6 bytes of source MAC, VLAN label 4 byte, CRC check 4 byte, increases by 20 bytes altogether, and object MAC is the MAC Address of main control board, and VLAN priority is set to represent limit priority.
Step 3, the FPGA on business board, by adding the message of VLAN, sends to three/Layer2 switching chip of main control board by Layer2 switching chip;
Step 4, three/Layer2 switching chip of main control board learns it is the message of HW line between plate according to VLAN, this message repeating is given the port (being also GE port) at the FPGA place of this plate, and issue the GE mouth between slave control board;
Step 5, after three/Layer2 switching chip of standby N CP receives message, forwards the packet to the GE port at the FPGA place on slave control board;
Step 6, after the FPGA of primary and backup master control borad receives message, according to source MAC know message from business board, taken out by message payload, deposit (128 byte) in read-only register corresponding to corresponding service plate, the CPU for this master control borad accesses.
Meanwhile, need synchronizing information between standby usage master control borad, chip-stacked owing to using, so this synchronizing information becomes the information transmission of chip internal, efficiency can be very high.Meanwhile, also can realize data fast-forwarding certain Single port to slave control board of main control board Single port easily, thus make the application of standby usage master control borad more flexible.
For partial content as K1(APS control signal 1), K2(APS control signal 2), SF(dropout) and SD(Signal Degrade) etc.; FPGA also needs to identify that it changes, and produces the CPU that interrupt signal notifies this master control borad in time.Master control borad needs for each business board and service interface board slot provide the read-only register of 128 bytes, 16 business board slots, 28 service interface board slots, need the read-only register of 128*44=5632 byte altogether.
For ensureing the real-time of transmission of information, the transmission cycle of message is decided to be 3.3ms, i.e. transmission per second 300 messages, message length is 148 bytes, occupied bandwidth is 0.4M, every block business board is accounted for about 0.4% of its 100M ethernet communication bus, concerning the connected 1GE port of the FPGA on master control borad, the flow that 44 business boards send at most is about 0.4*44=17.6M.The FPGA of primary and backup master control borad provides the write-only register of 128*44=5632 byte, for sending HW line information to each business board to the CPU of this master control borad by CPU parallel interface.
In a word, by the method and apparatus of present embodiment, a kind of succinct, efficient and the communication of stalwartness and protection mechanism can be set up on communication system.
The all or part of step that one of ordinary skill in the art will appreciate that in said method is carried out instruction related hardware by program and is completed, and program can be stored in computer-readable recording medium, as read-only memory, disk or CD etc.Alternatively, all or part of step of above-described embodiment also can use one or more integrated circuit to realize.Correspondingly, each module in above-described embodiment can adopt the form of hardware to realize, and the form of software function module also can be adopted to realize.The present invention is not restricted to the combination of the hardware and software of any particular form.
Certainly; the present invention also can have numerous embodiments; do not deviating from the situation of the present invention's spirit and essence thereof; those of ordinary skill in the art are when making various corresponding change or change according to the present invention; in every case done within the spirit and principles in the present invention any amendment, equivalent replacement, improvement, all should be included within protection scope of the present invention.

Claims (10)

1. realize a method for communication between single boards, comprising:
Transmitting single plate, when constructing message, adds priority treatment mark in the message being packaged with emergence message, and to be sent in existing management channels by described message prior according to this mark and to pass to reception veneer;
After described reception veneer receives described message, preferentially the described message being packaged with emergence message is resolved according to described priority treatment mark;
Wherein, constructed, send, receive and resolved the message of band priority treatment mark by the programmable logic device in veneer.
2. the method for claim 1, is characterized in that, the method also comprises:
When described transmitting single plate or reception veneer are one of them of polylith master control borad, chip polymerization is carried out to this polylith master control borad, realize the information interaction between polylith master control borad by the passage formed after chip polymerization.
3. method as claimed in claim 2, it is characterized in that, described priority treatment is labeled as VLAN (VLAN) label in ethernet frame structure.
4. method as claimed in claim 3, it is characterized in that, described transmitting single plate is master control borad, when described reception veneer is the business board receiving message, the VLAN that described VLAN tag identifier is corresponding with the slot of described business board, the VLAN priority in described VLAN label is set to represent limit priority.
5. method as claimed in claim 3, it is characterized in that, described transmitting single plate is business board, when described reception veneer is the master control borad receiving message, the object physical address of described VLAN label is the physical address of the master control borad of described reception message, and the VLAN priority in described VLAN label is set to represent limit priority.
6. method as claimed in claim 5, it is characterized in that, the method also comprises:
After the master control borad of described reception message receives described message, this message is sent to other master control borads in described polylith master control borad by the passage formed after described chip polymerization.
7. realize a device for communication between single boards, comprising: transmitting single plate and reception veneer, described transmitting single plate and reception veneer include programmable logic device and exchange chip, wherein:
The programmable logic device of described transmitting single plate, for when constructing message, adds priority treatment mark in the message being packaged with emergence message;
The exchange chip of described transmitting single plate, passes to described reception veneer for being sent in existing management channels by described message prior according to described priority treatment mark;
The exchange chip of described reception veneer, for receiving the message that described transmitting single plate sends, after receiving the message comprising described priority treatment mark, preferentially sends to local programmable logic device by this message;
The programmable logic device of described reception veneer, for after receiving message, the described priority treatment mark according to comprising in message is preferentially resolved the described message being packaged with emergence message;
Wherein, constructed, send, receive and resolved the message of band priority treatment mark by the programmable logic device in veneer.
8. device as claimed in claim 7, is characterized in that:
When described transmitting single plate or reception veneer are one of them of polylith master control borad, described polylith master control borad adopts chip polymerization, realizes the information interaction between polylith master control borad by the passage of formation after chip polymerization.
9. device as claimed in claim 8, it is characterized in that, described priority treatment is labeled as VLAN (VLAN) label in ethernet frame structure.
10. device as claimed in claim 9, is characterized in that:
Described transmitting single plate is business board, when described reception veneer is one of them of polylith master control borad, the exchange chip of described master control borad, also for after receiving the message comprising described priority treatment mark, this message is sent to other master control borads in described polylith master control borad by the passage formed after described chip polymerization.
CN201010548897.3A 2010-11-18 2010-11-18 Method and device for realizing communication between single boards Active CN101986594B (en)

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