CN101980149A - Main processor and coprocessor communication system and communication method - Google Patents
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Abstract
The invention discloses a main processor and coprocessor communication system, which comprises a main processor, a communication storage module, a communication control module, a coprocessor interrupt control module and a coprocessor. The main processor transmits a command word and a control word; the communication storage module stores the command word transmitted by the main processor; the communication control module receives the control word transmitted by the main processor and transmits a control signal; the coprocessor interrupt control module receives the control signal and transmits an interrupt signal; and the coprocessor acquires the command word from the communication storage module after receiving the interrupt signal. Compared with the prior art, the system has the advantages that: a design mode of a traditional coprocessor is changed, and communication between the main processor and the coprocessor is realized through a predefined command by adopting a mode of direct communication; therefore, the communication between the main processor and the coprocessor is more convenient and effective.
Description
[technical field]
The present invention relates to the chip design field, particularly the communication technology between primary processor and the coprocessor.
[background technology]
In the existing electronic product industry, require the construction cycle of new product shorter and shorter.As the conceptual design manufacturer of fruit product existing comparatively ripe and fixing hardware structure and software architecture, when putting out a new product, often main control chip can be do not changed, very big change will be done because the replacing main control chip means the hardware structure of total system and software architecture.When realizing new function, select usually to use coprocessor to replenish.Primary processor is the main process chip in the system, is used for the control of the whole workflow of system.Coprocessor can assist primary processor to finish certain function, has the certain calculation executive capability, and for example math co-processor can be handled by control figure, and graphics coprocessor can be handled video rendering.
Because the needs of cooperation need between primary processor and the coprocessor to carry out data transmission by certain mode, promptly communicate between primary processor and the coprocessor.Traditional primary processor mainly reaches the purpose of control coprocessor as the shared storage area by operation note and internal memory, but primary processor can not directly send look-at-me to coprocessor in this mode, carry out function but drive coprocessor by register and internal memory, coprocessor can not directly send interruption to primary processor, but sends interruption to primary processor by the functional module of coprocessor.This just makes and difficult communication between primary processor and the coprocessor can occur in the existing communication system, and coprocessor is passive, and communication speed waits problem slowly.
Therefore, be necessary to propose a kind of new technical scheme and solve above-mentioned shortcoming.
[summary of the invention]
The purpose of this part is to summarize some aspects of embodiments of the invention and briefly introduces some preferred embodiments.In this part and the application's specification digest and denomination of invention, may do a little simplification or omit avoiding the making purpose of this part, specification digest and denomination of invention fuzzy, and this simplification or omit and can not be used to limit the scope of the invention.
One object of the present invention is to provide a kind of new primary processor and coprocessor communication system.
Another object of the present invention is to provide a kind of new primary processor and the communication means of coprocessor system.
In order to reach purpose of the present invention, according to an aspect of the present invention, the invention provides a kind of new primary processor and coprocessor communication system, described system comprises: primary processor sends command word and control word; The communication memory module is stored the command word that described primary processor sends; Communication control module receives the control word of described primary processor transmission and sends control signal; Coprocessor interrupt control module receives described control signal and sends look-at-me; And coprocessor, after receiving look-at-me, obtain described command word from described communication memory module.
Further, described system also comprises unified access interface, and described primary processor is visited described communication memory module and communication control module by described unified access interface.
Further, described communication memory module is described primary processor and described coprocessor all addressable a slice shared drive zone or register.
Further, described communication control module is for can directly controlling the register of described coprocessor interrupt control module.
Further, described system also comprises the registration interruptable controller, described coprocessor is carried out the corresponding command after getting access to described command word, when needs send order answer, status information or execution result, described order answer, status information or execution result are stored in described communication memory module, and send interrupt request by described registration interruptable controller.
Further, described system also comprises primary processor interrupt control module, and described primary processor interrupt control module sends look-at-me to described primary processor after receiving described interrupt request.
Further, described registration interruptable controller, communication memory module, communication control module, coprocessor interrupt control module and coprocessor belong to a coprocessor system.
Further, the look-at-me of the described registration interruptable controller down trigger mode that provides mode and described primary processor interrupt control module is complementary.
According to a further aspect in the invention, the invention provides a kind of new primary processor and the communication means of coprocessor system, described method comprises:
Register that can control coprocessor interrupt control module in the coprocessor system is set at communication control module;
Shared drive in the coprocessor system or register are set at the communication memory module;
Primary processor by unified access interface send control word to described communication control module and transmission command word to the described memory module of communicating by letter;
Described communication control module transmits control signal after receiving control word to described coprocessor interrupt control module;
Described coprocessor interrupt control module sends look-at-me to coprocessor; With
Described coprocessor obtains described command word and execution from the communication memory module.
Further, described command word and control word are predefined.
Further, when needs send order answer, status information or execution result,
Described coprocessor is stored in described communication memory module with described order answer, status information or execution result;
Described coprocessor sends interrupt request by described registration interruptable controller and gives primary processor interrupt control module;
Described primary processor terminal control module sends look-at-me to described primary processor; With
Described primary processor obtains described order answer, status information or execution result from the communication memory module.
Compared with prior art, the present invention has changed the Design Mode of traditional coprocessor, adopt the mode of direct communication, realize communicating by letter between primary processor and the coprocessor, make that the communication between primary processor and the coprocessor is more convenient and effective by predefined command word.
[description of drawings]
In conjunction with reaching ensuing detailed description with reference to the accompanying drawings, the present invention will be more readily understood, the structure member that wherein same Reference numeral is corresponding same, wherein:
Fig. 1 is the primary processor among the embodiment among the present invention and the structural representation of coprocessor communication system.With
Fig. 2 is the primary processor among the embodiment among the present invention and the method flow diagram of coprocessor communication means.
[embodiment]
For above-mentioned purpose of the present invention, feature and advantage can be become apparent more, the present invention is further detailed explanation below in conjunction with the drawings and specific embodiments.
Primary processor of the present invention and coprocessor communication system and communication means adopt predefined command word to carry out communication, rather than adopt main processor operation register of the prior art and internal memory to reach the technical scheme of control coprocessor as the shared storage area.But primary processor of the present invention and coprocessor communication system and communication means both can be implemented with way of hardware and software combination separately, also can coexist with technical scheme of the prior art, are present in simultaneously in the cover system.
Please refer to Fig. 1, it shows the primary processor in one embodiment of the present of invention and the block diagram of coprocessor communication system 100.Described primary processor and coprocessor communication system 100 mainly comprise host processing system 120, association's disposal system 140 and unified access interface 160.
Described host processing system 120 comprises primary processor 121 and primary processor interrupt control module 122.
Described association disposal system 140 comprises coprocessor 141, coprocessor interrupt control module 142, communication control module 143, communication memory module 144 and registration interruptable controller 145.
Described primary processor 121 visits and controls association's disposal system 140 by described unified access interface 160.Described unified access interface 160 can be in the Standard bus interface host access interface (HostAccess Interface, HAI).When described primary processor 121 need be communicated by letter with described coprocessor 141, its by unified access interface 160 can send control word to described communication control module 143 and transmission command word to the described memory module 144 of communicating by letter.Described control word and command word be predefined can be by the signal of described primary processor 121 and described coprocessor 141 execution of discerning.
Described communication control module 143 can be the register that can directly control described coprocessor interrupt control module 142 in association's disposal system 140.Described primary processor 121 can send the purpose that internal state that control word changes described communication control module 143 reaches the described coprocessor interrupt control module 142 of control.
Described communication memory module 144 can be a slice shared drive zone or the register in association's disposal system 140.Described primary processor 121 and all addressable described memory module 144 of communicating by letter of described coprocessor 141.Described communication memory module 144 is used to store the command word that described primary processor 121 sends.
Described coprocessor interrupt control module 142 can be controlled by described communication control module 143, after receiving the control word that described primary processor 141 sends, described communication control module 143 sends control signal, described coprocessor interrupt control module 142 and then send look-at-me and give described coprocessor 141 to described coprocessor interrupt control module 142.Described coprocessor 141 obtains described command word to carry out from described communication memory module 144 after receiving this look-at-me.
The duty of constantly inquiring about described coprocessor 141 with primary processor described in the traditional scheme 121 is different, in the present embodiment, described coprocessor 141 is controlled some predetermined pin of described coprocessor 141 outsides by controlling described registration interruptable controller 145, the exterior interrupt of these predetermined external pins and described primary processor 121 links to each other, and can reach described coprocessor 141 like this and send the purpose of interrupting initiatively for described primary processor 121.Described coprocessor 141 is carried out the corresponding command after getting access to described command word, sending order at needs replys, when status information or execution result, described order is replied, status information or execution result are stored in described communication memory module 144, and send interrupt request by described registration interruptable controller 145 and give described primary processor interrupt control module 122, described primary processor interrupt control module 122 receives described interrupt request and sends look-at-me then to described primary processor 121, and described primary processor 121 can obtain the order of described coprocessor 141 and reply from described communication memory module 144, status information or execution result.
Will be appreciated that described primary processor 121 sends interruption by 143 pairs of coprocessors 141 of described communication control module, the same with coprocessor 141 normal process interrupt request, do not need to do special processing, so reduced the complicacy of described coprocessor 141.And described coprocessor 141 sends interruption can initiatively for described primary processor 121 by described registration interruptable controller 145, so that described primary processor 121 can obtain order answer, status information or the execution result of described coprocessor 141 as early as possible, make that the communication between primary processor and the coprocessor is more convenient and effective.
The present invention proposes the communication means of a kind of primary processor and coprocessor system simultaneously, please refer to Fig. 2, and it shows the primary processor among the embodiment among the present invention and the method flow diagram of coprocessor communication means 200.Described primary processor and coprocessor communication means 200 at first are set at communication control module with register that can control coprocessor interrupt control module in the coprocessor system; Shared drive in the coprocessor system or register are set at the communication memory module.Also pre-defined simultaneously command word and the control word that communicates between the two.Described primary processor and coprocessor communication means 200 comprise:
Above-mentioned explanation has fully disclosed the specific embodiment of the present invention.It is pointed out that and be familiar with the scope that any change that the person skilled in art does the specific embodiment of the present invention does not all break away from claims of the present invention.Correspondingly, the scope of claim of the present invention also is not limited only to described embodiment.
Claims (11)
1. primary processor and coprocessor communication system is characterized in that it comprises:
Primary processor sends command word and control word;
The communication memory module is stored the command word that described primary processor sends;
Communication control module receives the control word of described primary processor transmission and sends control signal;
Coprocessor interrupt control module receives described control signal and sends look-at-me; With
Coprocessor obtains described command word from described communication memory module after receiving look-at-me.
2. system according to claim 1 is characterized in that described system also comprises unified access interface, and described primary processor is visited described communication memory module and communication control module by described unified access interface.
3. system according to claim 1 is characterized in that, described communication memory module is described primary processor and described coprocessor all addressable a slice shared drive zone or register.
4. system according to claim 1 is characterized in that, described communication control module is for can directly controlling the register of described coprocessor interrupt control module.
5. system according to claim 1, it is characterized in that, described system also comprises the registration interruptable controller, described coprocessor is carried out the corresponding command after getting access to described command word, when needs send order answer, status information or execution result, described order answer, status information or execution result are stored in described communication memory module, and send interrupt request by described registration interruptable controller.
6. system according to claim 5 is characterized in that, described system also comprises primary processor interrupt control module, and described primary processor interrupt control module sends look-at-me to described primary processor after receiving described interrupt request.
7. system according to claim 5 is characterized in that, described registration interruptable controller, communication memory module, communication control module, coprocessor interrupt control module and coprocessor belong to a coprocessor system.
8. according to claim 6 or 7 described systems, it is characterized in that the down trigger mode that the look-at-me of described registration interruptable controller provides mode and described primary processor interrupt control module is complementary.
9. the communication means of primary processor and coprocessor system is characterized in that it comprises:
Register that can control coprocessor interrupt control module in the coprocessor system is set at communication control module;
Shared drive in the coprocessor system or register are set at the communication memory module;
Primary processor by unified access interface send control word to described communication control module and transmission command word to the described memory module of communicating by letter;
Described communication control module transmits control signal after receiving control word to described coprocessor interrupt control module;
Described coprocessor interrupt control module sends look-at-me to coprocessor; With
Described coprocessor obtains described command word and execution from the communication memory module.
10. method according to claim 9 is characterized in that described command word and control word are predefined.
11. method according to claim 9 is characterized in that:
When needs send order answer, status information or execution result,
Described coprocessor is stored in described communication memory module with described order answer, status information or execution result;
Described coprocessor sends interrupt request by described registration interruptable controller and gives primary processor interrupt control module;
Described primary processor terminal control module sends look-at-me to described primary processor; With
Described primary processor obtains described order answer, status information or execution result from the communication memory module.
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Cited By (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102156958A (en) * | 2011-03-16 | 2011-08-17 | 中国科学院上海技术物理研究所 | Embedded system on programmable chip (SOPC) having image coprocessor |
| CN103793208A (en) * | 2014-01-22 | 2014-05-14 | 芯原微电子(上海)有限公司 | Data processing system for collaborative operation of vector DSP and coprocessors |
| CN104731028A (en) * | 2013-12-19 | 2015-06-24 | 南京南瑞继保电气有限公司 | Automatic embedded multi-CPU-board signal exchange method based on signal names |
| CN104750518A (en) * | 2015-03-10 | 2015-07-01 | 昂纳信息技术（深圳）有限公司 | Upgrade control method and control module |
| CN105512085A (en) * | 2014-09-28 | 2016-04-20 | 联想(北京)有限公司 | Information processing method and electronic equipment |
| CN108073545A (en) * | 2016-11-17 | 2018-05-25 | 联芯科技有限公司 | A kind of multiprocessor communication device and method |
| CN108268281A (en) * | 2017-01-04 | 2018-07-10 | 中科创达软件股份有限公司 | Processor Synergistic method and circuit |
| CN108845828A (en) * | 2018-05-29 | 2018-11-20 | 深圳市国微电子有限公司 | A kind of coprocessor, matrix operation accelerated method and system |
| CN109117415A (en) * | 2017-06-26 | 2019-01-01 | 上海寒武纪信息科技有限公司 | Data-sharing systems and its data sharing method |
| WO2021128249A1 (en) * | 2019-12-27 | 2021-07-01 | 深圳市大疆创新科技有限公司 | Processor, task response method, movable platform, and camera |
| CN113312298A (en) * | 2020-02-27 | 2021-08-27 | Oppo广东移动通信有限公司 | Processor communication method and device, electronic equipment and computer readable storage medium |
| CN113765935A (en) * | 2021-09-17 | 2021-12-07 | 展讯通信（深圳）有限公司 | Communication method and device, readable storage medium, application processor and terminal |
| US11537843B2 (en) | 2017-06-29 | 2022-12-27 | Shanghai Cambricon Information Technology Co., Ltd | Data sharing system and data sharing method therefor |
| US11656910B2 (en) | 2017-08-21 | 2023-05-23 | Shanghai Cambricon Information Technology Co., Ltd | Data sharing system and data sharing method therefor |
| US11687467B2 (en) | 2018-04-28 | 2023-06-27 | Shanghai Cambricon Information Technology Co., Ltd | Data sharing system and data sharing method therefor |
| US11726844B2 (en) | 2017-06-26 | 2023-08-15 | Shanghai Cambricon Information Technology Co., Ltd | Data sharing system and data sharing method therefor |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0287115A2 (en) * | 1987-04-17 | 1988-10-19 | Hitachi, Ltd. | Coprocessor and method of controlling the same |
| CN1535427A (en) * | 2001-07-30 | 2004-10-06 | 皇家菲利浦电子有限公司 | Efficient interrupt system for system on chip design |
| CN101719115A (en) * | 2009-11-04 | 2010-06-02 | 北京中星微电子有限公司 | Communication method, device and system for main control processor and coprocessor system |
-
2010
- 2010-10-15 CN CN 201010509700 patent/CN101980149B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0287115A2 (en) * | 1987-04-17 | 1988-10-19 | Hitachi, Ltd. | Coprocessor and method of controlling the same |
| CN1535427A (en) * | 2001-07-30 | 2004-10-06 | 皇家菲利浦电子有限公司 | Efficient interrupt system for system on chip design |
| CN101719115A (en) * | 2009-11-04 | 2010-06-02 | 北京中星微电子有限公司 | Communication method, device and system for main control processor and coprocessor system |
Cited By (22)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102156958A (en) * | 2011-03-16 | 2011-08-17 | 中国科学院上海技术物理研究所 | Embedded system on programmable chip (SOPC) having image coprocessor |
| CN104731028A (en) * | 2013-12-19 | 2015-06-24 | 南京南瑞继保电气有限公司 | Automatic embedded multi-CPU-board signal exchange method based on signal names |
| CN104731028B (en) * | 2013-12-19 | 2017-07-18 | 南京南瑞继保电气有限公司 | The method that signal is exchanged automatically between embedded multi -CPU plate based on signal name |
| CN103793208A (en) * | 2014-01-22 | 2014-05-14 | 芯原微电子(上海)有限公司 | Data processing system for collaborative operation of vector DSP and coprocessors |
| CN103793208B (en) * | 2014-01-22 | 2016-07-06 | 芯原微电子(上海)有限公司 | The data handling system of vector dsp processor and coprocessor Collaboration |
| CN105512085A (en) * | 2014-09-28 | 2016-04-20 | 联想(北京)有限公司 | Information processing method and electronic equipment |
| CN104750518A (en) * | 2015-03-10 | 2015-07-01 | 昂纳信息技术（深圳）有限公司 | Upgrade control method and control module |
| CN108073545A (en) * | 2016-11-17 | 2018-05-25 | 联芯科技有限公司 | A kind of multiprocessor communication device and method |
| CN108268281A (en) * | 2017-01-04 | 2018-07-10 | 中科创达软件股份有限公司 | Processor Synergistic method and circuit |
| CN108268281B (en) * | 2017-01-04 | 2021-12-07 | 中科创达软件股份有限公司 | Processor cooperation method and circuit |
| CN109117415A (en) * | 2017-06-26 | 2019-01-01 | 上海寒武纪信息科技有限公司 | Data-sharing systems and its data sharing method |
| US11726844B2 (en) | 2017-06-26 | 2023-08-15 | Shanghai Cambricon Information Technology Co., Ltd | Data sharing system and data sharing method therefor |
| CN109117415B (en) * | 2017-06-26 | 2024-05-14 | 上海寒武纪信息科技有限公司 | Data sharing system and data sharing method thereof |
| US11537843B2 (en) | 2017-06-29 | 2022-12-27 | Shanghai Cambricon Information Technology Co., Ltd | Data sharing system and data sharing method therefor |
| US11656910B2 (en) | 2017-08-21 | 2023-05-23 | Shanghai Cambricon Information Technology Co., Ltd | Data sharing system and data sharing method therefor |
| US11687467B2 (en) | 2018-04-28 | 2023-06-27 | Shanghai Cambricon Information Technology Co., Ltd | Data sharing system and data sharing method therefor |
| CN108845828A (en) * | 2018-05-29 | 2018-11-20 | 深圳市国微电子有限公司 | A kind of coprocessor, matrix operation accelerated method and system |
| WO2021128249A1 (en) * | 2019-12-27 | 2021-07-01 | 深圳市大疆创新科技有限公司 | Processor, task response method, movable platform, and camera |
| CN113312298A (en) * | 2020-02-27 | 2021-08-27 | Oppo广东移动通信有限公司 | Processor communication method and device, electronic equipment and computer readable storage medium |
| CN113312298B (en) * | 2020-02-27 | 2022-11-08 | Oppo广东移动通信有限公司 | Processor communication method and device, electronic equipment and computer readable storage medium |
| CN113765935A (en) * | 2021-09-17 | 2021-12-07 | 展讯通信（深圳）有限公司 | Communication method and device, readable storage medium, application processor and terminal |
| CN113765935B (en) * | 2021-09-17 | 2023-09-12 | 展讯通信（深圳）有限公司 | Communication method and device, readable storage medium, application processor and terminal |
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