CN101976968B - Method for controlling midpoint potential of direct-current bus of three-level inverter - Google Patents

Abstract

The invention discloses a method for controlling the midpoint potential of a DC bus bar of a three-level inverter, which includes two parts. The first part is a traditional method, which makes a difference between the DC side voltage (u _dc1 + u _dc2 ) and the reference value U _ref Obtain the error signal, and add the error signal to the i _{1_d} obtained after the three-phase load current is decoupled by dq, to control the total voltage of the two voltage-dividing capacitors, the other part is the control method proposed in the present invention, which will be calculated The zero-sequence component of the appropriate amplitude and phase obtained later, that is, the fine-tuning command, is added to the command voltage before adjustment.

Description

Control Method of Midpoint Potential of DC Bus in Three-level Inverter

technical field

The present invention relates to the research field of inverters, in particular to a method for controlling the midpoint potential of the DC bus bar of a diode-clamped three-level inverter. The zero-sequence component is used to control the fluctuation of the midpoint potential.

Background technique

Since the 1970s, energy and environmental protection have gradually become one of the world's mainstream concerns. With the development of society, more and more industrial and living fields have an increasing demand for medium and high-voltage large-capacity inverters year by year, such as in steel rolling, cement, papermaking, shipbuilding and other industrial fields and high-speed railways, urban subways, electric vehicles, etc. Medium and high-voltage large-capacity frequency conversion speed regulation systems in public transportation fields, as well as power active filters widely used to solve reactive power and harmonic pollution of power grids. Due to the improvement of requirements for voltage and current levels, EMI (electromagnetic interference) and THD (total harmonic distortion) in industrial applications, the traditional two-level inverter has been developed into a three-level inverter, and the three-level inverter has been developed into More levels. Compared with other topologies, the three-level diode-clamped converter has the advantages of bidirectional power flow control, convenient power factor control, simple and stable topology, and can be cascaded with other topologies such as ordinary H-bridges to form more levels. The inverter has become a research hotspot in terms of high voltage and high power. However, the fluctuation of the midpoint potential of the DC bus due to the unbalanced charging and discharging of the DC voltage dividing capacitor and the inconsistency of the device parameters will directly lead to the distortion of the output voltage, which will additionally increase the withstand voltage level of the device and affect the stability of the system.

Through literature search, it is found that for the problem of midpoint potential fluctuation, the researchers proposed a solution from two aspects of hardware topology and modulation method. Among them, the hardware topology scheme increases the system size, loss and instability, and the modulation method has corresponding overall advantages in comparison. The modulation methods for midpoint potential control mainly include space vector modulation (SVPWM) and carrier modulation (SPWM). For the three-level neutral point clamp inverter, there are 27 19 kinds of space vectors, by judging the direction of the midpoint current and the deviation of the midpoint potential, reasonably selecting the modulation method and the choice of small vectors, basically it can The balance control of the midpoint potential is realized in one switching cycle, but the amount of calculation is large. For inverters with more levels, the complexity of vector and corresponding switch redundancy state and operating state control is greatly increased. Huge calculation The amount and complex algorithm limit its application. The SPWM method of injecting zero-sequence components is much simpler and more suitable for the use of inverters with more levels, such as three-level inverter modules cascaded with ordinary H-bridges, hybrid five-level inverters, etc. . For the three-phase three-wire system, the carrier wave remains unchanged, and the zero-sequence component is injected into the modulation wave to control the midpoint potential. Since there is no neutral wire, the three-phase output line voltage does not contain the zero-sequence component, and the zero-sequence component is injected at the same time It can also improve the utilization rate of the DC power supply voltage and reduce the switching loss. Although there are so many advantages, researchers have started to study since the 1990s, and there are related experimental results in recent years, but the existing literature shows that the research work in this area lacks rigorous theoretical analysis to prove that in the modulation wave The effectiveness of the method of injecting zero-sequence components has not been proved, and it has not been proved that several injections of zero-sequence components and how to choose reasonable values of the injected amplitude and phase can effectively control the fluctuation of the midpoint potential.

Contents of the invention

In view of the defects or deficiencies in the above-mentioned existing theories and technologies, the purpose of the present invention is to propose a method for controlling the midpoint potential of the DC bus bar of a diode-clamped three-level inverter. This control method can effectively control the fluctuation of the midpoint potential of the DC bus of the three-level inverter within a reasonable range without adding additional circuits, and the calculation amount is greatly reduced compared with the SVPWM method, so as to ensure that the inverter The device has a better output voltage waveform.

To achieve the above object, the present invention is achieved by taking the following technical solutions:

A method for controlling the midpoint potential of a three-level inverter DC bus, characterized in that it comprises the following steps:

Step 1, controlling the total voltage u _dc1 +u _dc2 of the two voltage dividing capacitors;

Step 2: Detect the voltages u _dc1 and u _dc2 of the upper and lower divider capacitors on the diode-clamped three-level DC bus, and make a difference between the two values to obtain the voltage difference Δu _dc ;

Step 3. Measure the magnitude and initial phase angle of the fundamental current and main subharmonic current of the inverter relative to the voltage on the grid side, and calculate the phase angle φ using the formula. The calculation formula is as follows:

Among them, U ₁ is the phase voltage of the power grid, U ₀ is the amplitude of the fundamental current to be compensated after being differentiated by the inductor, α is the initial phase angle of the reactive power, and U _n is the amplitude of the nth harmonic to be compensated after being differentiated by the inductor , θ _n is the initial phase of the nth harmonic relative to the fundamental wave, where n is an odd number;

Step 4, the voltage difference Δu _dc of the voltage dividing capacitor measured in step 2 is adjusted by the PI regulator to obtain the amplitude of the zero-sequence component that needs to be injected, and the phase angle φ obtained in step 3 is calculated by injecting the initial value of the six-order zero-sequence component Phase angle β, β=6φ, get the fine-tuning instruction of PWM modulation wave

通过3路加法器分别同微调前逆变器三相PWM调制波作加法，其输出作为最终的三相PWM调制波。Step 5, the fine-tuning instruction obtained in step 4

Three-way adders are respectively added to the three-phase PWM modulation wave of the inverter before fine-tuning, and its output is used as the final three-phase PWM modulation wave.

In the above steps, the main sub-harmonics refer to the 5th, 7th, 11th and 13th harmonics.

The present invention injects six zero-sequence components of a certain amplitude and phase into the PWM modulation wave to realize the midpoint potential control of the DC bus bar of the diode-clamped three-level inverter without additional auxiliary devices, and the method is simple and easy. It can be seen from the simulation results that the present invention can well realize the midpoint potential control of the DC bus bar of the diode-clamped three-level inverter. And it is applicable to the situation that the inverter outputs fundamental wave voltage harmonic voltage and fundamental wave current harmonic current. Since APF (Active Power Filter) can output both fundamental current and harmonic current and fundamental voltage and harmonic voltage, the present invention uses APF as a typical control object of the present invention to verify the effectiveness of the present invention.

Description of drawings

Figure 1 shows the main circuit structure of a diode-clamped three-level inverter as an APF (active power filter).

Fig. 2 is a block diagram of the control system of the present invention.

Figure 3 is a typical output waveform of a three-phase inverter.

Figure 4 is the simulated waveform of the DC bus voltage when the equivalent loss resistance R ₁ in Figure 1 is 150Ω and R ₂ is 100Ω and no control strategy is added; where (a) is the simulated waveform of the total DC bus voltage u _dc1 + u _dc2 ; (b ) is the simulation waveform of the voltage u _dc1 on the voltage dividing capacitor C ₁ ; (c) is the simulation waveform of the voltage u _dc2 on the voltage dividing capacitor C ₂ ;

Figure 5 is the simulation waveform of the DC bus voltage when the equivalent loss resistance R ₁ of Figure 1 is 150Ω and R ₂ is 100Ω plus the control strategy; where (a) is the simulation waveform of the total DC bus voltage u _dc1 + u _dc2 ; (b) is The simulation waveform of the voltage u _dc1 on the voltage dividing capacitor C ₁ ; (c) is the simulation waveform of the voltage u _dc2 on the voltage dividing capacitor C ₂ ;

Detailed ways

Referring to FIG. 1 , a series diode-clamped three-level inverter 3 is connected between a three-phase power supply 1 and a nonlinear load 2 . The diode-clamped three-level inverter 3 consists of DC-side energy storage elements C ₁ and C ₂ , equivalent loss resistors R ₁ and R ₂ , and a voltage source PWM inverter. The DC-side energy storage elements are generally composed of power capacitors Composed of series and parallel, the voltage source PWM inverter is composed of fully controlled devices such as IGBT and GTO. One end of the line inductance 31, 32 and 33 is connected in series to the A, B, C three-phase voltage source PWM converter, and the other end is connected in parallel between the three-phase power supply 1 and the nonlinear load 2, and the selection of its parameters mainly depends on the voltage The switching frequency of the source PWM converter.

For the convenience of description, the three-phase voltage of the power supply is recorded as u _s , namely: u _sa , _usb , u _sc ; the three-phase current of the power supply is recorded as is _s , namely: _isa , _isb , and i _sc ; The voltages are u _dc1 and u _dc2 respectively; the given value of the DC side voltage is recorded as U _ref ; the three-phase compensation current output by the inverter is recorded as i _c , namely: i _ca , i _cb , i _cc ; the three-phase load current Recorded as i _L , namely: i _1a , i _1b , i _1c .

Referring to Fig. 2, the diode-clamped three-level inverter DC bus voltage control method in the present invention includes two parts, the first part is a traditional method, and the DC side voltage (u _dc1 + u _dc2 ) and the reference value U _ref Make a difference to get the error signal, and add the error signal to the i _{1_d} obtained after the three-phase load current is decoupled by dq, so as to control the total voltage of the two voltage-dividing capacitors. The other part is the control method proposed in the present invention. The zero-sequence component of the appropriate amplitude and phase obtained after calculation, that is, the fine-tuning command, is added to the command voltage before adjustment. The specific steps are as follows:

Step 1: Detect the voltages u _dc1 and u _dc2 of the upper and lower divider capacitors on the diode-clamped three-level DC bus, and make a difference between the two values to obtain a voltage difference Δu _dc .

Step 2. Measure the magnitude and initial phase angle of the fundamental current of the inverter and the main (here 5th) harmonic current relative to the voltage on the grid side, and use the formula to calculate the inverter U in a fundamental cycle. The phase angle φ of the zero-crossing point of the phase output voltage is shown in Figure 3 (the three-phase output waveform is the fundamental wave plus the fifth and sixth harmonics), and the calculation formula is as follows: U ₁ sin(φ)+U ₀ cos(φ- α)+U ₅ cos(5φ-θ ₅ ))＝0, where U ₁ is the grid phase voltage, U ₀ is the fundamental reactive power amplitude, α is the initial phase angle of reactive power, and U ₅ is the 5 times to be compensated The amplitude of the harmonic after being differentiated by the inductance, θ ₅ is the initial phase of the 5th harmonic relative to the fundamental wave.

Step 3, the voltage difference Δu _dc of the voltage dividing capacitor measured in step 1 is adjusted by the PI regulator to obtain the amplitude U ₆ of the zero-sequence component to be injected, and the phase angle φ obtained in step 2 is calculated by β=6φ to inject the zero-sequence The initial phase angle of the component to get the fine-tuning command of the PWM modulation wave

$\mathrm{<span\; class="notranslate">\; \&Delta;</span>}{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; 0</span>}}^{<span\; class="notranslate">\; *</span>}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; 6</span>}}\mathrm{<span\; class="notranslate">\; sin</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 6</span>}\mathrm{<span\; class="notranslate">\; \&omega;t</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; \&beta;</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; .</span>$

Step 4, the fine-tuning instruction obtained in step 3 Three-way adders are respectively added to the three-phase PWM modulation wave of the inverter before fine-tuning, and its output is used as the final three-phase PWM modulation wave.

As shown in Figures 5 and 6, the present invention uses the simulink module in MATLAB to simulate and verify the method of the present invention. It can be seen from Fig. 5 that the control method of the present invention is not adopted, because the losses on the side of the upper and lower voltage-dividing capacitors are not equal, after 0.6 seconds, the voltage difference between the upper and lower voltage-dividing capacitors reaches 200V; as can be seen from Fig. 6, the control method of the present invention is adopted , although the side-to-side losses of the upper and lower voltage-dividing capacitors are not equal, the voltage of the voltage-dividing capacitors can always be stabilized at 400V throughout the process, and its fluctuation range is reasonable. It can be seen from the comparison between the two that the control method of the present invention can well control the midpoint potential of the diode-clamped three-level DC bus bar.

Claims (2)

1. A control method of a three-level inverter DC bus midpoint potential, characterized in that, comprising the following steps: Step 1, control the diode to clamp the total voltage u _dc1 +u _dc2 of the upper and lower voltage dividing capacitors on the three-level DC bus; Step 2: Detect the voltages u _dc1 and u _dc2 of the upper and lower divider capacitors on the diode-clamped three-level DC bus, and make a difference between the two values to obtain the voltage difference Δu _dc ; Step 3. Measure the magnitude and initial phase angle of the fundamental current and main subharmonic current of the inverter relative to the voltage on the grid side, and calculate the phase angle φ using the formula. The calculation formula is as follows: U ₁ sin(φ)+U ₀ cos(φ-α)+U ₅ cos(5φ-θ ₅ )+U ₇ cos(7φ-θ ₇ )+…+U _n cos(nφ-θ _n )＝0， Among them, U ₁ is the phase voltage of the power grid, U ₀ is the amplitude of the fundamental current to be compensated after being differentiated by the inductor, α is the initial phase angle of the reactive power, and U _n is the amplitude of the nth harmonic to be compensated after being differentiated by the inductor , θ _n is the initial phase of the nth harmonic relative to the fundamental wave, where n is an odd number; Step 4, the voltage difference ΔU _dc of the voltage dividing capacitor measured in step 2 is adjusted by the PI regulator to obtain the amplitude of the zero-sequence component to be injected, and the phase angle φ obtained in step 3 is calculated by injecting the initial value of the six-order zero-sequence component Phase angle β, β=6φ, get the fine-tuning instruction of PWM modulation wave Step 5, the fine-tuning instruction obtained in step 4

Three-way adders are respectively added to the three-phase PWM modulation wave of the inverter before fine-tuning, and its output is used as the final three-phase PWM modulation wave. 2. The method for controlling the midpoint potential of the DC bus of the three-level inverter according to claim 1, wherein the main sub-harmonics refer to the 5th, 7th, 11th and 13th harmonics.

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