CN101976649A - Preparation method of OLED panel polycrystalline silicon - Google Patents

Preparation method of OLED panel polycrystalline silicon Download PDF

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Publication number
CN101976649A
CN101976649A CN 201010275417 CN201010275417A CN101976649A CN 101976649 A CN101976649 A CN 101976649A CN 201010275417 CN201010275417 CN 201010275417 CN 201010275417 A CN201010275417 A CN 201010275417A CN 101976649 A CN101976649 A CN 101976649A
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layer
carry out
glass substrate
photoresist
cleaned
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李惠元
徐正勋
高昕伟
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Sichuan CCO Display Technology Co Ltd
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Sichuan CCO Display Technology Co Ltd
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Priority to CN 201010275417 priority Critical patent/CN101976649A/en
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Abstract

The invention relates to a preparation method of OLED panel polycrystalline silicon. Before a gate insulation layer and a gate metal layer are prepared, the following steps are performed: (1) after a glass substrate is cleaned, the plasma enhanced chemical vapor deposition (PECVD) is adopted to deposit a SiOx buffer layer on the glass substrate; and (2) the low pressure chemical vapor deposition (LPCVD) is adopted to deposit a certain thickness of amorphous silicon layer on the glass substrate, etc. The beneficial effect of the invention is as follows: after the crystallization treatment of the active layer of the amorphous silicon material is completed, the subsequent gate insulation layer technology and gate layer technology are performed, thus when the subsequent technologies are performed, the active layer can not deform and the properties of the thin film transistor (TFT) can not be affected.

Description

A kind of oled panel polysilicon manufacture method
Technical field
The invention belongs to Organic Light Emitting Diode (Organic Light-Emitting Diode, OLED) Display Technique field, relate in particular to a kind of active matrix organic light-emitting diode (Active Matrix/OrganicLight Emitting Diode, the AMOLED) technology of panel.
Background technology
When making the AMOLED panel, (Thin Film Transistor, TFT), the different qualities of the active layer of TFT has determined the different grades of AMOLED panel need to make Thin Film Transistor (TFT) at each pixel place of AMOLED panel.The difference of active layer material when making according to TFT, TFT can be divided into non-crystalline silicon tft, multi-crystal TFT, organic tft etc.Multi-crystal TFT is compared non-crystalline silicon tft, fast tens of times to hundreds of times approximately of electron mobility, and the advantage with the drive IC that can be integrated in AMOLED panel outside when can making the compact device, also can be made high-resolution, high-grade device.But.Shown in Figure 1; be common AMOLED structure; it on the glass substrate 1 resilient coating 2; it on the centre position of resilient coating 2 active layer 4 of polycrystalline silicon material; be interlayer insulating film 3 on the position, both sides of resilient coating 2; it on the gate insulator 9 grid layer 10; it on the grid layer 10 interlayer insulating film 3; except reserving source/drain electrode data line layer 5 and contact hole that the active layer 4 of polycrystalline silicon material is connected; interlayer insulating film 3 is with resilient coating 2; polysilicon active layer 4 and grid layer 10 cover fully; be source/drain electrode data line layer 5 on the position, interlayer insulating film 3 both sides; source/drain electrode data line layer 5 is connected with polysilicon active layer 4 by contact hole; on interlayer insulating film 3 centre positions and be thin-film encapsulation layer 6 on source/drain electrode data line layer 5; on the thin-film encapsulation layer 6 anode layer 7 and protective layer 8; thin-film encapsulation layer 6 is except reserving anode layer 7 and contact hole that the source/drain electrode data line layer 5 is connected, and thin-film encapsulation layer 6 covers source/drain electrode data line layer 5 fully.Though omitted cathode layer among the figure, other each layer such as organic luminous layer, it only is to draw and expression in order to simplify that but the one of ordinary skilled in the art should be able to recognize this omission, can't have influence on the correct understanding of technical staff to technical scheme, in diagram, each layer of not drawing or describing, be that those of ordinary skills are known, on narration one deck is positioned at glass substrate or another layer or under the time, this layer can be located immediately on glass substrate or another layer or under, or also can have other known intermediate layer of those of ordinary skills therebetween.Existing AMOLED panel many in the manufacture method of silicon active layer 4, how to finish through the following steps: as shown in Figure 1 through the crystallization and the activate of silicon active layer 4, at first behind the resilient coating 2 that completes on the glass substrate 1, at the active layer 41 of making amorphous silicon material on the resilient coating 2 successively (after crystallization is handled, becoming polysilicon active layer 4), gate insulator 5 and grid layer 6, after finishing the making of grid layer 6, active layer 41 is carried out ion doping to be injected, at last glass substrate 1 is put in the crystal growing furnace, finished the crystallization and the activate of active layer 41 simultaneously.In this process, the variation of active layer 41 crystallization processing can causing active layer 41 volume before and after crystallization, thus cause the poor adhesion between oxide interface and silicon interface to cause TFT characteristic variation.
Summary of the invention
The objective of the invention is deficiency, proposed a kind of manufacture method of oled panel for the manufacture method of the polysilicon active layer 4 that overcomes existing oled panel.
To achieve these goals, technical scheme of the present invention is: a kind of oled panel polysilicon manufacture method before making formation gate insulator and gate metal layer, comprises the steps:
(1) glass substrate is cleaned after, by plasma reinforced chemical vapour deposition method (PECVD) cvd silicon oxide (SiOx) resilient coating thereon;
(2) utilize Low Pressure Chemical Vapor Deposition (LPCVD) on glass substrate, to deposit certain thickness amorphous silicon formation amorphous silicon layer;
(3) glass substrate is carried out cleaning before the photoetching, and on amorphous silicon layer, evenly be coated with certain thickness photoresist layer;
(4) photoresist is exposed and develop;
(5) glass substrate after developing is carried out silicon etching and obtain the amorphous silicon active layer;
(6) in photoresist lift off liquid, carry out peeling off of photoresist;
(7) substrate is cleaned, by the certain thickness nickel of sputtering method evaporation;
(8) substrate is put into crystal growing furnace and carried out the active layer 4 that the low temperature polycrystalline silicon crystallization is handled the formation polycrystalline silicon material by the horizontal revulsion of metal (MILC);
(9) at sulfuric acid: carry out nickel in the hydrogen peroxide mixed liquor and remove technology elimination nickel.
Behind the active layer of polycrystalline silicon material that completes, also comprise step:
(10) carry out silica (SiOx) gate insulator deposition by plasma reinforced chemical vapour deposition method (PECVD);
(11) glass substrate is cleaned, and by sputtering method evaporation gate metal layer;
(12) glass substrate is cleaned after, carry out the gate metal layer photoetching process, the coating photoresist and exposes, develops;
(13) carry out the gate metal layer etching technics;
(14) carry out the gate insulator deep dry etch process;
(15) glass substrate 1 is carried out ion doping to the active layer two ends that link to each other with source/drain electrode data line layer after cleaning;
(16) polysilicon active layer being carried out activate handles;
(17) glass substrate is cleaned after, improve chemical vapour deposition (CVD) by plasma and carry out the interlayer insulating film deposition;
(18) carry out contact hole technology, formation source/drain electrode data line layer is passed the contact hole that interlayer insulating film is connected with active layer;
(19) glass substrate is carried out after cleaning, carry out source/drain electrode data line layer by sputter and deposit;
(20), after glass substrate carried out photoresist coating, exposure, develops, source/drain electrode data line layer is carried out etching by photoetching process;
(21) carry out after the photoresist lift off glass substrate being cleaned, improve chemical vapour deposition (CVD) by plasma then and carry out the thin-film encapsulation layer deposition;
(22) carry out the thin-film encapsulation layer etching;
(23) by photoetching process, after carrying out photoresist coating, exposure, developing, carry out contact hole technology, form anode ITO/IZO metal and pass thin-film encapsulation layer and contact hole that the source/the drain electrode data line layer is connected;
(24) glass substrate is cleaned after, carry out anode ITO/IZO metal deposition;
(25), carry out carrying out protective layer and making after photoresist coating, exposure, development, the oven dry by photoetching process.
The invention has the beneficial effects as follows: carry out follow-up gate insulator and grid layer technology again after the crystallization that the solution of the present invention is finished the active layer of amorphous silicon material is earlier handled, therefore, when carrying out subsequent technique, thereby active layer can not deform and influences the characteristic of TFT.
Description of drawings
Fig. 1 is common AMOLED structural representation.
Fig. 2 is the structural representation of the present invention when proceeding to step 3.
Fig. 3 is the structural representation of the present invention when proceeding to step 4.
Fig. 4 is the structural representation of the present invention when proceeding to step 5.
Fig. 5 is the structural representation of the present invention when proceeding to step 7.
Fig. 6 is the structural representation of the present invention when proceeding to step 9.
Fig. 7 is the structural representation of the present invention when proceeding to step 11.
Fig. 8 is the structural representation of the present invention when proceeding to step 14.
Description of reference numerals: glass substrate 1, resilient coating 2, interlayer insulating film 3, active layer 4, amorphous silicon layer 41, photoresist layer 42, amorphous silicon active layer 43, nickel film 44, source/drain electrode data line layer 5, thin-film encapsulation layer 6, anode ITO/IZO metal 7, protective layer 8, gate insulator 9, gate metal layer 10.
Embodiment
The invention will be further described below in conjunction with the drawings and specific embodiments.
For the AMOLED structure that completes as shown in Figure 1, need carry out following steps successively:
(1) glass substrate 1 is cleaned after, by plasma reinforced chemical vapour deposition method (PECVD) cvd silicon oxide (SiOx) resilient coating 2 thereon.
(2) utilize Low Pressure Chemical Vapor Deposition (LPCVD) deposition of amorphous silicon 500 dusts on the glass substrate 1 to form amorphous silicon layer 41; The thickness of amorphous silicon can be regulated as required.
(3) glass substrate is carried out cleaning before the photoetching, and evenly be coated with photoresist layer 42 on amorphous silicon layer 41, the thickness of photoresist is 1.2 microns, forms structure as shown in Figure 2, and the thickness of photoresist can be regulated as required.
(4) photoresist is exposed and develop; Form structure as shown in Figure 3 after eliminating unnecessary photoresist layer 42.
(5) glass substrate after developing is carried out silicon etching and obtain the amorphous silicon active layer; Form structure as shown in Figure 4.
(6) handled 20 minutes down in 60 ℃ in photoresist lift off liquid, carry out peeling off of photoresist, the stripping conditions of photoresist can be regulated as required, is advisable with stripping photoresist fully.
(7) substrate is cleaned, by sputtering method evaporation nickel 50 dusts; Form structure as shown in Figure 5, the thickness of nickel can be regulated as required, is as the criterion can carry out step (8) smoothly;
(8) substrate is put into crystal growing furnace and carried out the low temperature polycrystalline silicon crystallization, under 560 ℃ of conditions, handled 1 hour; This process is the horizontal revulsion of metal (MILC), adopts metallic nickel to induce amorphous silicon to form polysilicon by this method, and concrete condition of work can be set as required.
(9) at sulfuric acid: carry out 70 minutes nickel in hydrogen peroxide (mass ratio 6: the 4) mixed liquor and remove technology, form structure as shown in Figure 6; Concrete condition of work can be set as required.
(10) carry out silica (SiOx) gate insulator 9 depositions by plasma reinforced chemical vapour deposition method (PECVD);
(11) glass substrate 1 is cleaned, and, form structure as shown in Figure 7 by sputtering method evaporation gate metal layer 10;
(12) glass substrate 1 is cleaned after, carry out gate metal layer 10 photoetching processes, the coating photoresist and exposes, develops;
(13) carry out gate metal layer 10 etching technics;
(14) carry out gate insulator 9 deep dry etch process, form structure as shown in Figure 8;
(15) glass substrate 1 is cleaned afterwards carrying out ion doping with active layer 4 two ends that the source/drain electrode data line layer 5 links to each other;
(16) carry out activate under hydrogen flowing quantity is 130SCCM, 590 ℃, atmospheric pressure state and handled 2 hours, concrete condition of work can be set as required;
(17) glass substrate 1 is cleaned after, improve chemical vapour deposition (CVD) by plasma and carry out interlayer insulating film 3 depositions;
(18) carry out contact hole technology, formation source/drain electrode data line layer 5 is passed the contact hole that interlayer insulating film 3 is connected with active layer 4;
(19) glass substrate 1 is carried out after cleaning, carry out source/drain electrode data line layer 5 by sputter and deposit;
(20), after glass substrate 1 carried out photoresist coating, exposure, develops, source/drain electrode data line layer 5 is carried out etching by photoetching process;
(21) carry out after the photoresist lift off glass substrate 1 being cleaned, improve chemical vapour deposition (CVD) by plasma then and carry out thin-film encapsulation layer 6 depositions;
(22) carry out thin-film encapsulation layer 6 etchings;
(23) by photoetching process, after carrying out photoresist coating, exposure, developing, carry out contact hole technology, form anode ITO/IZO metal 7 and pass thin-film encapsulation layer 6 and contact hole that the source/drain electrode data line layer 5 is connected;
(24) glass substrate 1 is cleaned after, carry out anode ITO/IZO metal 7 deposition;
(25) by photoetching process, carry out after photoresist coating, exposure, development, the oven dry, carry out protective layer 8 and make; (26) finish the TFT substrate manufacture.
Those of ordinary skill in the art will appreciate that embodiment described here is in order to help reader understanding's principle of the present invention, should to be understood that protection scope of the present invention is not limited to such special statement and embodiment.Those of ordinary skill in the art can make various other various concrete distortion and combinations that do not break away from essence of the present invention according to these technology enlightenments disclosed by the invention, and these distortion and combination are still in protection scope of the present invention.

Claims (2)

1. an oled panel polysilicon manufacture method is characterized in that, before making formation gate insulator and gate metal layer, comprises the steps:
(1) glass substrate is cleaned after, by plasma reinforced chemical vapour deposition method (PECVD) cvd silicon oxide (SiOx) resilient coating thereon;
(2) utilize Low Pressure Chemical Vapor Deposition (LPCVD) on glass substrate, to deposit certain thickness amorphous silicon formation amorphous silicon layer;
(3) glass substrate is carried out cleaning before the photoetching, and on amorphous silicon layer, evenly be coated with certain thickness photoresist layer;
(4) photoresist is exposed and develop;
(5) glass substrate after developing is carried out silicon etching and obtain the amorphous silicon active layer;
(6) in photoresist lift off liquid, carry out peeling off of photoresist;
(7) substrate is cleaned, by the certain thickness nickel of sputtering method evaporation;
(8) substrate is put into crystal growing furnace and carried out the active layer 4 that the low temperature polycrystalline silicon crystallization is handled the formation polycrystalline silicon material by the horizontal revulsion of metal (MILC);
(9) at sulfuric acid: carry out nickel in the hydrogen peroxide mixed liquor and remove technology elimination nickel.
2. according to a kind of oled panel polysilicon manufacture method shown in the claim 1, it is characterized in that, behind the active layer 4 of the polycrystalline silicon material that completes, also comprise step:
(10) carry out silica (SiOx) gate insulator deposition by plasma reinforced chemical vapour deposition method (PECVD);
(11) glass substrate is cleaned, and by sputtering method evaporation gate metal layer;
(12) glass substrate is cleaned after, carry out the gate metal layer photoetching process, the coating photoresist and exposes, develops;
(13) carry out the gate metal layer etching technics;
(14) carry out the gate insulator deep dry etch process;
(15) glass substrate 1 is carried out ion doping to the active layer two ends that link to each other with source/drain electrode data line layer after cleaning;
(16) polysilicon active layer being carried out activate handles;
(17) glass substrate is cleaned after, improve chemical vapour deposition (CVD) by plasma and carry out the interlayer insulating film deposition;
(18) carry out contact hole technology, formation source/drain electrode data line layer is passed the contact hole that interlayer insulating film is connected with active layer;
(19) glass substrate is carried out after cleaning, carry out source/drain electrode data line layer by sputter and deposit;
(20), after glass substrate carried out photoresist coating, exposure, develops, source/drain electrode data line layer is carried out etching by photoetching process;
(21) carry out after the photoresist lift off glass substrate being cleaned, improve chemical vapour deposition (CVD) by plasma then and carry out the thin-film encapsulation layer deposition;
(22) carry out the thin-film encapsulation layer etching;
(23) by photoetching process, after carrying out photoresist coating, exposure, developing, carry out contact hole technology, form anode ITO/IZO metal and pass thin-film encapsulation layer and contact hole that the source/the drain electrode data line layer is connected;
(24) glass substrate is cleaned after, carry out anode ITO/IZO metal deposition;
(25), carry out carrying out protective layer and making after photoresist coating, exposure, development, the oven dry by photoetching process.
CN 201010275417 2010-09-08 2010-09-08 Preparation method of OLED panel polycrystalline silicon Pending CN101976649A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9508859B2 (en) 2014-04-25 2016-11-29 Everdisplay Optronics (Shanghai) Limited TFT array substrate and manufacturing method of the same
WO2018126516A1 (en) * 2017-01-06 2018-07-12 武汉华星光电技术有限公司 Embedded type touch display panel and electronic device
WO2019134257A1 (en) * 2018-01-08 2019-07-11 深圳市华星光电半导体显示技术有限公司 P-type thin film transistor and preparation method therefor

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001250968A (en) * 2000-03-03 2001-09-14 Hitachi Cable Ltd Crystal silicon thin film semiconductor device, crystal silicon thin film photovoltaic element, and method of manufacturing for crystal silicon thin film semiconductor device
CN100397661C (en) * 2005-07-12 2008-06-25 南开大学 Metal inducement single direction transverse crystallization thin film transistor device and its preparing method
CN100437907C (en) * 1992-12-04 2008-11-26 株式会社半导体能源研究所 Semiconductor device and method for manufacturing the same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100437907C (en) * 1992-12-04 2008-11-26 株式会社半导体能源研究所 Semiconductor device and method for manufacturing the same
JP2001250968A (en) * 2000-03-03 2001-09-14 Hitachi Cable Ltd Crystal silicon thin film semiconductor device, crystal silicon thin film photovoltaic element, and method of manufacturing for crystal silicon thin film semiconductor device
CN100397661C (en) * 2005-07-12 2008-06-25 南开大学 Metal inducement single direction transverse crystallization thin film transistor device and its preparing method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9508859B2 (en) 2014-04-25 2016-11-29 Everdisplay Optronics (Shanghai) Limited TFT array substrate and manufacturing method of the same
WO2018126516A1 (en) * 2017-01-06 2018-07-12 武汉华星光电技术有限公司 Embedded type touch display panel and electronic device
WO2019134257A1 (en) * 2018-01-08 2019-07-11 深圳市华星光电半导体显示技术有限公司 P-type thin film transistor and preparation method therefor

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Application publication date: 20110216