CN101958270B - Method for preparing ultrathin strain material-on-insulator - Google Patents
Method for preparing ultrathin strain material-on-insulator Download PDFInfo
- Publication number
- CN101958270B CN101958270B CN2010102231248A CN201010223124A CN101958270B CN 101958270 B CN101958270 B CN 101958270B CN 2010102231248 A CN2010102231248 A CN 2010102231248A CN 201010223124 A CN201010223124 A CN 201010223124A CN 101958270 B CN101958270 B CN 101958270B
- Authority
- CN
- China
- Prior art keywords
- layer
- insulator
- semi
- described preparation
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Recrystallisation Techniques (AREA)
Abstract
The invention relates to a method for preparing an ultrathin material-on-insulator. The method is characterized by comprising the following steps of: epitaxially growing a layer of semiconductor material on a selected semiconductor substrate material, wherein the thickness of the epitaxially grown semiconductor material is within the critical thickness, and crystals are in a full strain state; implanting oxygen ions to ensure that the oxygen ions are mainly distributed in the semiconductor substrate material; and performing high-temperature annealing at the temperature of between 800 and 1,200 DEG C to form an insulating buried layer and simultaneously relax the top of the epitaxially grown semiconductor material so as to transfer stress to the top of the substrate material and form a new strain layer, wherein the thickness of the prepared ultrathin strain material layer is less than or equal to 50nm. By combining the oxygen ion implantation with the epitaxial process into one step, the processes of bonding and stripping are saved, and silicon-on-insulator is simply prepared.
Description
Technical field
The present invention relates to the preparation method of ultra-thin strain gauge material on a kind of insulator, belong to silicon-on-insulator (SOI) material and preparation field.
Background technology
The preparation method of strain gauge material is generally through technological processes such as extension, bonding, back grinding or smart peelings on traditional insulator; In practical operation, receive the influence of multiple different process; Preparation flow and complicacy thereof cause that the strain gauge material crystal mass is restricted on the insulator of final preparation.
Preparation smaller szie, more high performance device are the target and the direction of semi-conductor industry development always, along with development of semiconductor, rely on silicon materials can't prepare enough high speeds merely, the transistor of low-power consumption.Begin from 90nm technology, strained silicon (sSi) technology and silicon-on-insulator (SOI) technology become the two big sharp weapon that promote Moore's Law.Combined the strained-silicon-on-insulator technology of strained silicon and SOI technology to receive relevant scientific and technical personnel's pay attention to day by day now, being described as is one of preferred substrate material of CMOS technology of future generation.
The strained-silicon-on-insulator material generally is divided into two kinds, and a kind of is that strained silicon materials directly is attached on the insulating barrier of silicon substrate, forms sSi/SiO
2The sandwich structure of/Si (sSOI); Another kind is to also have one deck SiGe layer between strained silicon and the insulating barrier, forms sSi/SiGe/SiO
2The four-layer structure of/Si (SGOI).Because the having of tensile stress among the sSOI is beneficial to the raising electron mobility, however also not obvious to the castering action of hole mobility; And SGO work is a kind of double channel material, because the tensile stress in the strained silicon layer and the acting in conjunction of the compression in the SiGe layer, electronics and hole mobility in the material are improved simultaneously.
For this reason; The present invention intends the advantage that makes full use of SIMOX (Seperation by implantation of oxygen) technology; Select suitable annealing temperature; With the stress transfer of epitaxial material top layer, and avoided bonding and the stripping technology in the traditional preparation process method dexterously, both oversimplified technology and strain gauge material can simply be realized to original backing material.
Summary of the invention
The object of the present invention is to provide the method for the ultra-thin strain gauge material of preparation on a kind of insulator; The method that is provided is characterised in that only needs simple ion of a step to inject; Add that with traditional buffer growth strain gauge material that passes through the film transfer method compares, possess the advantage that technology is simple, be easy to realize.
Method implementation step provided by the invention is:
1, at first selected layer of semiconductor backing material, for example: silicon substrate, the semiconductor substrate materials that is provided comprises silicon or germanium;
2, another layer of epitaxial growth semi-conducting material on the semi-conducting material that step 1 is selected requires the lattice constant of epitaxially grown material bigger than the lattice constant of ground floor semiconductor substrate materials, and for example general formula is Si
1-xGe
xGermanium silicon material, 0＜x＜1;
The thickness of new growth germanium silicon semiconductor material makes crystal be in complete strain regime in critical thickness, and the quality of crystal also is able to guarantee that described critical thickness is with Si simultaneously
1-xGe
xIn the Ge component increase and reduce.The relation of critical thickness and Ge component x is h
e≈ 0.0234/ (1+0.04x)
2* ln (h
e/ 4) Si that, selects usually
1-xGe
xThe thickness 80-120nm of layer;
3, carry out oxonium ion and inject, inject the thickness decision of energy, oxonium ion mainly is distributed in the semiconductor substrate materials according to the growing semiconductor material, and apart from 10-50nm place, two layers of semi-conductor material interface; The implantation dosage of oxonium ion is: 1E14～1E19/cm
2
4, carry out high annealing then, annealing temperature 800-1200 ℃, annealing time 30-120 minute; In the process of annealing, insulating buried layer forms, and simultaneously, relaxation takes place at new epitaxially grown semi-conducting material top, and stress transfer in the top of backing material, is formed new strained material layer;
5, carry out wet etching then, remove the new grown semiconductor material of extension, obtain strain gauge material on the insulator;
Like the thicker strain gauge material of need, only need on strain gauge material on this insulator, carry out extension again, can obtain strain gauge material on the insulator of thick film.
This shows; The present invention only needs once simple oxonium ion to inject, and adds the oxonium ion injection technology through the extension strain gauge material, selects suitable annealing temperature; Utilize the advantage of SIMOX technology; Discharge epitaxially grown semiconductor top relaxation takes place, stress transfer in the top of backing material, is formed new strain gauge material.
Description of drawings
Fig. 1 is the method step of the ultra-thin strained layer of preparation provided by the invention.
(a) another layer of epitaxial growth semi-conducting material on the semiconductor substrate materials; (b) oxonium ion injects; (c) high annealing; (d) wet etching obtains ultra-thin strained layer on the insulator.
Embodiment
Below in conjunction with accompanying drawing, through the introduction of embodiment, with further elaboration substantive distinguishing features of the present invention and obvious improvement.
Embodiment 1
Provided by the invention on insulator the preparation method of ultra-thin strain gauge material, comprise following each step: main points are following:
1, at first selects layer of semiconductor backing material 11; For example: silicon substrate; Another layer of epitaxial growth semi-conducting material 12 on the selected semi-conducting material of step 1 then; The lattice constant of epitaxially grown material 12 of looking for novelty is bigger than the lattice constant of the selected backing material 11 of ground floor semiconductor, and epitaxially grown semi-conducting material general formula is Si
1-xGe
x, the thickness of new epitaxial growth of semiconductor material 12 makes crystal be in complete strain regime in critical thickness, and the quality of crystal also is able to guarantee simultaneously, for example: Si
1-xGe
x(Fig. 1 a) between 80-120nm for the thickness of layer;
2, carry out oxonium ion and inject, inject the thickness decision of energy, oxonium ion mainly is distributed in the semiconductor substrate materials according to the growing semiconductor material, and apart from 10-50nm place, two layers of semi-conductor material interface; The implantation dosage of oxonium ion is: 1E14～1E19/cm
2(Fig. 1 b)
3, carry out high annealing then, annealing temperature 800-1200 ℃, annealing time 60-120 minute; In the process of annealing, form insulating buried layer 13, simultaneously, make the new grown semiconductor material of extension 12 tops that relaxation take place, stress transfer in the top of backing material 11, is formed new strained material layer 14; (Fig. 1 c)
4, carry out wet etching at last, remove new grown semiconductor material 12, obtain strain gauge material on the insulator (Fig. 1 d).Ultra-thin strain gauge material thickness≤50nm on the common described insulator.Like the thicker strain gauge material of need, only need on strain gauge material on this insulator, carry out extension, can obtain strain gauge material on the insulator of thick film.
Embodiment 2
Semiconductor silicon material 11 usefulness germanium materials replace among the embodiment 1.All the other are with embodiment 1.
Embodiment 3
Annealing temperature is 1000-1200 ℃ among the embodiment 1, and annealing time is 30-60 minute, and annealing process forms insulating barrier buried regions 13.All the other are with embodiment 1 or 2.
Claims (8)
1. the preparation method of ultra-thin strain gauge material on the insulator is characterized in that described preparation method comprises following each step:
A) at first select the layer of semiconductor backing material, another layer of epitaxial growth semi-conducting material on this selected semi-conducting material then, the lattice constant of epitaxially grown semi-conducting material is bigger than the lattice constant of ground floor semiconductor substrate materials;
B) carry out oxonium ion and inject, inject the thickness decision of energy, oxonium ion mainly is distributed in the semiconductor substrate materials according to epitaxial growth of semiconductor material, and apart from 10-50nm place, two layers of semi-conductor material interface;
C) carry out high annealing then, annealing temperature 800-1200 ℃, in the process of annealing; Form insulating buried layer, simultaneously, make generation relaxation in epitaxially grown semi-conducting material top among the step a; Stress transfer in the top of backing material, is formed new strained material layer;
D) carry out wet etching at last, remove the newborn long semi-conducting material of extension among the step a, thereby obtain ultra-thin strain gauge material on the insulator.
2. by the described preparation method of claim 1, it is characterized in that the layer of semiconductor material of at first selecting among the step a is silicon or germanium.
3. by the described preparation method of claim 1, the general structure that it is characterized in that epitaxially grown semi-conducting material is Si
1-xGe
x, 0＜x＜1, and described epitaxial growth of semiconductor material is in complete strain regime in critical thickness; The relation of described critical thickness and Ge component x is h
e≈ 0.0234/ (1+0.04x)
2* ln (h
e/ 4).
4. by claim 1 or 3 described preparation methods, the thickness that it is characterized in that epitaxial growth of semiconductor material is 80-120nm.
5. by the described preparation method of claim 1, the implantation dosage that it is characterized in that oxonium ion among the step b is 1E14～1E19/cm
2
6. by the described preparation method of claim 1, the annealing time that it is characterized in that step c is 30-120 minute.
7. by the described preparation method of claim 1, it is characterized in that prepared ultra-thin strained layer thickness≤50nm.
8. by claim 1 or 7 described preparation methods, it is characterized in that only needing on ultra-thin strain gauge material on the insulator, to carry out extension again, obtain strain gauge material on the insulating thick film body.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010102231248A CN101958270B (en) | 2010-07-09 | 2010-07-09 | Method for preparing ultrathin strain material-on-insulator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010102231248A CN101958270B (en) | 2010-07-09 | 2010-07-09 | Method for preparing ultrathin strain material-on-insulator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101958270A CN101958270A (en) | 2011-01-26 |
| CN101958270B true CN101958270B (en) | 2012-09-26 |
Family
ID=43485528
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010102231248A Expired - Fee Related CN101958270B (en) | 2010-07-09 | 2010-07-09 | Method for preparing ultrathin strain material-on-insulator |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101958270B (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1722365A (en) * | 2004-07-14 | 2006-01-18 | 国际商业机器公司 | Method for manufacturing underlaying material and semiconductor underlaying material |
| CN101740463A (en) * | 2009-12-08 | 2010-06-16 | 中国科学院上海微系统与信息技术研究所 | Method to prepare strained silicon materials in insulators by anneal through oxygen implantation. |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7067430B2 (en) * | 2003-09-30 | 2006-06-27 | Sharp Laboratories Of America, Inc. | Method of making relaxed silicon-germanium on insulator via layer transfer with stress reduction |
-
2010
- 2010-07-09 CN CN2010102231248A patent/CN101958270B/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1722365A (en) * | 2004-07-14 | 2006-01-18 | 国际商业机器公司 | Method for manufacturing underlaying material and semiconductor underlaying material |
| CN101740463A (en) * | 2009-12-08 | 2010-06-16 | 中国科学院上海微系统与信息技术研究所 | Method to prepare strained silicon materials in insulators by anneal through oxygen implantation. |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101958270A (en) | 2011-01-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI225283B (en) | Strained semiconductor on insulator substrate and method of forming the same | |
| JP4678877B2 (en) | Silicon devices on Si: C-OI and SGOI and manufacturing methods | |
| CN100570889C (en) | In body silicon and SOI MOS device, make the structure and the method for dislocation-free stressed channels | |
| JP4919316B2 (en) | Method for producing silicon-on-glass via layer transfer | |
| JP4130652B2 (en) | Semiconductor structure and manufacturing method thereof | |
| Huang et al. | Carrier mobility enhancement in strained Si-on-insulator fabricated by wafer bonding | |
| US6690043B1 (en) | Semiconductor device and method of manufacturing the same | |
| KR100447492B1 (en) | Semiconductor device and semiconductor substrate | |
| JP2008505482A (en) | Method for forming strained Si / SiGe on insulator with silicon germanium buffer | |
| CN103633010B (en) | Doping superthin layer absorption is utilized to prepare the method for material on ultrathin insulating body | |
| CN104517883B (en) | A kind of method that utilization ion implantation technique prepares semiconductor-on-insulator (ssoi) material | |
| CN101866874B (en) | Method for preparing silicon germanium on insulator (SGOI) by layer transfer technology | |
| TW200427085A (en) | Strained transistor formed by isolation material having different thermal coefficient with the substrate | |
| US20110278645A1 (en) | Strain-direct-on-insulator (sdoi) substrate and method of forming | |
| JP2001217430A (en) | Method of manufacturing semiconductor substrate and semiconductor substrate manufactured thereby | |
| CN102709225A (en) | Method for forming a ge on iii/v-on-insulator structure | |
| CN102214694B (en) | Heterogeneous metal stacked grid strained silicon-germanium on insulator p-channel metal oxide semiconductor field effect tube (SSGOI pMOSFET) device structure | |
| JP2017532781A (en) | Method for fabricating a semiconductor layer including transistor channels having different strain states and related semiconductor layers | |
| JP2006080510A (en) | METHOD OF FORMING RELAXATION Si1-XGeX (0<X<1) LAYER WITH HIGH Ge CONTENT BY IMPLANTING BORON OR HELIUM, AND SILICON WITH HYDROGEN | |
| CN102208448B (en) | Polycrystalline Si1-xGex/metal parallel covering double-gate strained SiGe-on-insulator (SSGOI) n metal oxide semiconductor field effect transistor (MOSFET) device structure | |
| CN101916741B (en) | Method for preparing strained silicon-on-insulator | |
| US20130221412A1 (en) | Device System Structure Based On Hybrid Orientation SOI and Channel Stress and Preparation Method Thereof | |
| CN104752309A (en) | Method of preparing on-insulator material with accurate and controllable stripping position | |
| CN105428301A (en) | Method of preparing GOI at low temperature by microwave annealing technology | |
| CN101958270B (en) | Method for preparing ultrathin strain material-on-insulator |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120926 Termination date: 20180709 |