CN101938268A - Starting circuit for realizing zero static power consumption - Google Patents

Abstract

The invention discloses a starting circuit for realizing zero static power consumption. The starting circuit is formed by a universal metal-oxide semiconductor (MOS) field-effect transistor and is used for generating a starting current for controlling an auto bias circuit to start; and the zero static power consumption is realized by turning off the starting current when the auto bias circuit enters a self-adjustment state. The starting circuit of the invention can control the auto bias circuit to disengage from a zero current working state to enter a required normal working state, and simultaneously ensures that the starting circuit per se realizes the zero static power consumption.

Description

A kind of start-up circuit of realizing zero quiescent dissipation

Technical field

The present invention relates to start-up circuit, relate in particular to a kind of start-up circuit of realizing zero quiescent dissipation.

Background technology

In analog chip, generally included auto bias circuit, it provides one to stablize suitable dc point for different analog modules, thereby realizes the normal function of chip.Auto bias circuit generally has two kinds or more of stable operating states, and the operating state here also can be called convergence point, is the operating state that needs but have only a kind of state.Because auto bias circuit generally uses feedback circuit at work, therefore, in power up, needs start-up circuit to make auto bias circuit be converged in the operating state of needs.

Band-gap voltage reference is exactly a kind of of auto bias circuit, and it has two kinds of stable operating states, and as shown in Figure 1, a kind of is the operating state A that auto bias circuit needs, and a kind of is zero current operating state B; Ordinate is the current value I of metal-oxide-semiconductor drain electrode _D, abscissa is the voltage difference V between metal-oxide-semiconductor grid and the source electrode _GS, metal-oxide-semiconductor refers to mos field effect transistor here.Wherein, the zero current operating state is unwanted state, because it can not provide biasing for other circuit.In order to prevent that auto bias circuit is operated in the zero current operating state, need increase a start-up circuit for band-gap voltage reference, start-up circuit makes the operating state of auto bias circuit can be stabilized to the operating state that needs for band-gap voltage reference provides an initial electric current.

Work after the powering on start-up circuit of stable state of auto bias circuit is had a lot, and for example patent publication No. is that the application of CN200610157723 is a kind of start-up circuit, as shown in Figure 2, by metal-oxide-semiconductor M3, M4, M41, M42 and M34 form.When VDD began to power on, reference voltage source was in the zero current operating state, and promptly the A point is a low level, and the B point is a high level, so the C level point equals VDD; When VDD is elevated to when making the M34 conducting, the B point voltage is dragged down, make reference voltage source break away from the zero current operating state, the A point voltage raises; The A point voltage raises and makes the C point voltage reduce, thereby closes metal-oxide-semiconductor M34, finishes to start action, and reference voltage source feeds back by self and reaches balance.After finishing startup, the A level point is not to equal VDD, makes metal-oxide-semiconductor M3, M41, and M42 and M4 are in conducting state, consume certain quiescent dissipation like this, describe from patent, and its quiescent dissipation is about 3uA.

Patent publication No. is that the application of CN02120344 is another kind of start-up circuit, be to adopt the resistance drop low speed paper tape reader static power disspation, as shown in Figure 3, this start-up circuit provides power-on reset signal, for chip internal provides enough resetting times, realize the startup of chip, be not for auto bias circuit provides startup, its structure adopts a large amount of resistance, not only takies a large amount of areas, and have direct current channel between power supply and the ground under the operate as normal, consume a large amount of quiescent dissipations.Can reduce quiescent dissipation though increase resistance,, this will cause circuit to realize that area significantly increases, and cost is improved greatly.

From the patent of present start-up circuit, most of patent all has bigger quiescent dissipation when the circuit operate as normal, reduces quiescent dissipation thereby perhaps adopt a large amount of resistance to regulate bias voltage, and this has increased circuit cost.

U.S. Patent number is that the application of US2006038550 also is a kind of start-up circuit, as shown in Figure 4, is a kind of start-up circuit of zero quiescent dissipation, but has adopted special-purpose double pole triode (NPN) pipe on circuit is realized.Because the NPN pipe can't be realized in common CMOS (Complementary Metal Oxide Semiconductor) (CMOS) technology, need to use bipolar complementary metal oxide semiconductor (BICMOS) technology, this is restricted the scope of application of this patent, simultaneously because the relation of technology has also increased circuit cost.Simultaneously, this patent circuit structure more complicated, device is more, and circuit uses electric capacity, and it is bigger to achieve area, the cost height.

In sum, adopt above-mentioned each start-up circuit of existing techniques in realizing, though can control auto bias circuit from the zero current operating state to electric current is arranged, but reach the operating state of needs at auto bias circuit after, all there is problem in various degree separately, start-up circuit has static working current, has quiescent dissipation; Though realize that by resistance start-up circuit can lower quiescent dissipation, cost improves greatly; Adopt special-purpose NPN pipe can reach no quiescent dissipation, but pervasive range limited, be unfavorable for promoting the use of.

Summary of the invention

In view of this, main purpose of the present invention is to provide a kind of start-up circuit of realizing zero quiescent dissipation, can control auto bias circuit disengaging zero current operating state and enter required normal operating conditions, guarantees start-up circuit self realization zero quiescent dissipation simultaneously.

For achieving the above object, technical scheme of the present invention is achieved in that

A kind of start-up circuit of realizing zero quiescent dissipation, described start-up circuit is made of general mos field effect transistor metal-oxide-semiconductor, is used to generate the starting current that the control auto bias circuit starts; Enter at described auto bias circuit and to close described starting current when self adjusting state, realize zero quiescent dissipation.

Wherein, provide the metal-oxide-semiconductor of described starting current to be specially under the situation of PM0 in start-up circuit, described start-up circuit is further used for corresponding to the rising of VDD, V _{SG (PM0)}Progressively raise when reaching the magnitude of voltage that makes described PM0 be in inferior threshold values operating state, described PM0 self generates described starting current;

Wherein, described VDD is the operating voltage of described start-up circuit; Described V _{SG (PM0)}Be the voltage difference between described PM0 source electrode and the grid.

Wherein, described start-up circuit is further used for corresponding to described V _{SG (PM0)}Rising, described starting current progressively raises when reaching the current value that makes described auto bias circuit enter the state of self adjusting, and closes described starting current.

Wherein, the type of the metal-oxide-semiconductor in the start-up circuit comprises: P-channel metal-oxide-semiconductor field-effect transistor PMOS pipe and n channel metal oxide semiconductor field effect transistor NMOS pipe;

The type of the metal-oxide-semiconductor in described start-up circuit is done under the situation of symmetry displacement, and described start-up circuit is further used for described PMOS pipe symmetry is replaced into described NMOS pipe; Described NMOS pipe symmetry is replaced into described PMOS pipe.

Wherein, provide the metal-oxide-semiconductor of described starting current to be specially under the situation of NM0 in start-up circuit, described start-up circuit is further used for corresponding to the rising of VDD, V _{GS (NM0)}Progressively raise when reaching the magnitude of voltage that makes described NM0 be in inferior threshold values operating state, described NM0 pulls electric current and generates described starting current from described auto bias circuit;

Wherein, described VDD is the operating voltage of described start-up circuit; Described V _{GS (NM0)}Be the voltage difference between described NM0 grid and the source electrode.

Wherein, described start-up circuit is further used for corresponding to described V _{GS (NM0)}Rising, described starting current progressively raises when reaching the current value that makes described auto bias circuit enter the state of self adjusting, and closes described starting current.

Wherein, described start-up circuit is further used for making the NM1A conducting by V11, realizes closing of described starting current;

Wherein, described NM1A is the NMOS pipe that links to each other with described NM0; Described V11 is the emitter voltage value of PNP pipe Q1 in the described auto bias circuit, and the emitter of described Q1 links to each other with the grid of described NM1A.

Wherein, described start-up circuit is further used for making the NM1B conducting by V22, realizes closing of described starting current;

Wherein, described NM1B is the NMOS pipe that links to each other with described NM0; Described V22 is the emitter voltage value of PNP pipe Q0 in the described auto bias circuit, and the emitter of described Q0 links to each other with the grid of described NM1B.

Wherein, described start-up circuit is further used for making the NM1C conducting by VREF1, realizes closing of described starting current;

Wherein, described NM1C is the NMOS pipe that links to each other with described NM0; Described VREF1 is the gate voltage values of NMOS pipe NM3 in the described auto bias circuit, and the grid of described NM3 links to each other with the grid of described NM1C, and the NMOS that diode of series connection connects below the described NM1C manages NM1D.

Start-up circuit of the present invention is made of general metal-oxide-semiconductor, is used to generate the starting current that the control auto bias circuit starts; Enter at auto bias circuit and to close this starting current when self adjusting state, realize zero quiescent dissipation.

Adopt start-up circuit of the present invention, be used for initialization automatic biasing reference voltage or current circuit, can control auto bias circuit disengaging zero current operating state and enter required normal operating conditions, guarantee start-up circuit self realization zero quiescent dissipation simultaneously, thereby reduce circuit power consumption effectively.And the circuit structure of start-up circuit of the present invention is simple, can adopt common MOS to realize, has reduced power consumption and cost.Because this metal-oxide-semiconductor is different from special-purpose NPN pipe, is a kind of general metal-oxide-semiconductor, therefore, the scope of application is extensive, also is beneficial to and promotes the use of.

Description of drawings

Fig. 1 is the schematic diagram of two operating states of auto bias circuit;

Fig. 2 is the electrical block diagram of patent publication No. CN200610157723;

Fig. 3 is the electrical block diagram of patent publication No. CN02120344;

Fig. 4 is the electrical block diagram of U.S. Patent number US2006038550;

Fig. 5 is the electrical block diagram of one embodiment of the invention;

The waveform schematic diagram of Fig. 6 during for circuit start of the present invention;

Current diagram when Fig. 7 works for the present invention;

Fig. 8 is the electrical block diagram of another embodiment of the present invention;

Fig. 9 is the electrical block diagram of further embodiment of this invention;

Figure 10 is the electrical block diagram of yet another embodiment of the invention.

Embodiment

Basic thought of the present invention is: start-up circuit is made of general metal-oxide-semiconductor, is used to generate the starting current that the control auto bias circuit starts; Enter at auto bias circuit and to close this starting current when self adjusting state, realize zero quiescent dissipation.

Be described in further detail below in conjunction with the enforcement of accompanying drawing technical scheme.

A kind of start-up circuit of realizing zero quiescent dissipation, start-up circuit is made of general metal-oxide-semiconductor, is used to generate the starting current that the control auto bias circuit starts; Enter at auto bias circuit and to close this starting current when self adjusting state, realize the zero quiescent dissipation of start-up circuit.

Here it is pointed out that after auto bias circuit entered self adjustment state, auto bias circuit adopted prior art, can reach its needed normal operating conditions by self autobalance.

Generate the difference of starting current, and the type difference that is used to provide the metal-oxide-semiconductor of starting current, the specific implementation of drive circuit of the present invention is also different, comprises following two kinds of situations, below sets forth respectively.

First kind of situation: in start-up circuit, provide the metal-oxide-semiconductor of starting current to be specially under the situation of PMOS pipe PM0.

With regard to generating starting current, start-up circuit is further used for corresponding to the rising of VDD, V _{SG (PM0)}Progressively raise when reaching the magnitude of voltage that makes PM0 be in inferior threshold values operating state, PM0 self generates this starting current, uses to offer auto bias circuit, makes auto bias circuit break away from the zero current operating state.Wherein, VDD is the operating voltage of start-up circuit; V _{SG (PM0)}Be the voltage difference between PM0 source electrode and the grid.

With regard to closing starting current, start-up circuit is further used for corresponding to V _{SG (PM0)}Rising, starting current progressively raises when reaching the current value that makes auto bias circuit enter the state of self adjusting, and closes this starting current.

Here it is to be noted: the type of the metal-oxide-semiconductor in the start-up circuit comprises: PMOS pipe and NMOS pipe.Wherein, the PMOS pipe refers to the P-channel metal-oxide-semiconductor field-effect transistor; The NMOS pipe refers to n channel metal oxide semiconductor field effect transistor.The type of the metal-oxide-semiconductor in start-up circuit is done under the situation of symmetry displacement, and start-up circuit is further used for that PMOS is managed symmetry and is replaced into the NMOS pipe; NMOS is managed symmetry be replaced into the PMOS pipe.Do the symmetry displacement by this type, can obtain new drive circuit, equally also can realize zero quiescent dissipation, that is: the related following second kind of situation of drive circuit specific implementation metal-oxide-semiconductor in original drive circuit.

Second kind of situation: in start-up circuit, provide the metal-oxide-semiconductor of starting current to be specially under the situation of NMOS pipe NM0.

With regard to generating starting current, start-up circuit is further used for corresponding to the rising of VDD, V _{GS (NM0)}Progressively raise when reaching the magnitude of voltage that makes NM0 be in inferior threshold values operating state, NM0 pulls electric current and generates this starting current from auto bias circuit, uses to offer auto bias circuit, makes auto bias circuit break away from the zero current operating state.Wherein, VDD is the operating voltage of start-up circuit; V _{GS (NM0)}Be the voltage difference between NM0 grid and the source electrode.

With regard to closing starting current, start-up circuit is further used for corresponding to V _{GS (NM0)}Rising, starting current progressively raises when reaching the current value that makes auto bias circuit enter the state of self adjusting, and closes this starting current.

Here, second kind of situation comprises following three kinds of specific implementations, below sets forth respectively.

First kind of specific implementation: start-up circuit is further used for making the NM1A conducting by V11, realizes closing of starting current.Wherein, NM1A is the NMOS pipe that links to each other with NM0; V11 is the emitter voltage value of PNP pipe Q1 in the auto bias circuit, and the emitter of Q1 links to each other with the grid of NM1A.

Second kind of specific implementation: start-up circuit is further used for making the NM1B conducting by V22, realizes closing of starting current.Wherein, NM1B is the NMOS pipe that links to each other with NM0; V22 is the emitter voltage value of PNP pipe Q0 in the auto bias circuit, and the emitter of Q0 links to each other with the grid of NM1B.

The third specific implementation: start-up circuit is further used for making the NM1C conducting by VREF1, realizes closing of starting current.Wherein, NM1C is the NMOS pipe that links to each other with NM0; VREF1 is the gate voltage values of NMOS pipe NM3 in the auto bias circuit, and the grid of NM3 links to each other with the grid of NM1C, and NM1C is except with NM3 links to each other, and the NMOS of the diode connection of also will connecting below the NM1C manages NM1D.

Here it is to be noted: the NM0 in first kind of specific implementation is actually the NM0A among Fig. 8; NM0 in second kind of specific implementation is actually the NM0B among Fig. 9; NM0 in the third specific implementation is actually the NM0C among Figure 10; Adopting NM0A/NM0B/NM0C among the figure is in order to identify this NM0 respectively in three kinds of specific implementations, to reach the purpose of the convenient statement of contrast figure, to explain with the same NM0 of above-mentioned use and do not conflict.

In sum, the present invention mainly comprises following content:

Start-up circuit of the present invention as shown in Figure 5, transistor NM3, NM4, PM5 and PM6 and triode Q0, Q1 form common auto bias circuit, transistor PM0, PM1, NM0 and NM1 form start-up circuit.Wherein, the empty frame table in left side shows start-up circuit, and the empty frame table in right side shows auto bias circuit, and the expression that relates to empty frame among following Fig. 8,9,10 too.

Base stage and the collector electrode of triode Q0 and Q1 link together, and are connected to ground VSS.The emitter of triode Q0 is connected to the source electrode V22 of transistor NM3, and the emitter of Q1 is connected to the source electrode V11 of transistor NM4.The grid of transistor NM3 and the grid of NM4 link together, and the drain electrode of NM3, form node VREF1.This node is connected to the drain electrode of transistor PM5, and the grid of PM5 and the grid of PM6 link together, and is connected to the drain electrode of PM6, forms node VREF2.The drain electrode of transistor NM4 is connected to node VREF2.The source electrode of transistor PM5, PM6 is connected to power vd D.Like this, transistor NM3, NM4, PM5 and PM6 and triode Q0, Q1 just form common auto bias circuit.

The source electrode of transistor PM0 is connected to power vd D, and grid is connected to the drain electrode of PM1 and the drain electrode of NM1 simultaneously.The drain electrode of transistor PM0 is connected to the drain electrode of transistor NM0, and is connected to node VREF1.The grid of transistor PM1 is connected to node VREF2, and its source electrode is connected to power vd D.The grid of transistor NM0 and the grid of NM1 connect together, and are connected to ground VSS.Like this, transistor PM0, PM1, NM0 and NM1 form start-up circuit of the present invention.

As seen, main feature of the present invention is simple in structure, only is made up of four transistors, and quiescent dissipation is zero, can be integrated in the common CMOS technology, thus the cost of reduction integrated circuit.

Below in conjunction with operation principle, each embodiment of the present invention is specifically addressed respectively.

Embodiment one:

As shown in Figure 5, when power vd D began to power on, auto bias circuit was in the zero current operating state, and VREF2 is high level VDD, and VREF1 is low level VSS.VREF2 makes transistor PM1 close.When VDD raises, VA voltage is similar to two big electric resistance partial pressures that formed by two transistor PM1 that close and NM1, obtain an intermediate level that is between VSS and the VDD, being VA raises with the rising of VDD, but do not keep synchronously, thereby between the source electrode of transistor PM0 and grid, produce a voltage difference.When VDD was elevated to certain value, this voltage difference progressively increased, and when reaching 600mV, transistor PM0 is in the subthreshold value operating state, exported a very little electric current.This little electric current flows out from transistor PM0, arrives ground VSS through transistor NM3 and PNP pipe Q0.The voltage difference of VA and VDD increases with the rising of VDD, and this causes increasing gradually from the little electric current that PM0 flows out.The increase of this little electric current is risen node VREF1 voltage rapidly, and node VREF2 voltage raises and slows down, thereby makes auto bias circuit break away from zero current work.When being increased to, node VREF1 make transistor NM3, NM4 progressively during conducting, VREF2 voltage will descend, make transistor PM5 and PM6 progressively during conducting, also make the PM1 conducting, thereby cause node VA voltage to be elevated to VDD, transistor PM0 closes, and this moment, this little electric current was no longer exported, auto bias circuit feeds back by self and reaches balance, enters normal operating conditions.Like this, after start-up circuit is finished the startup effect, transistor PM1 conducting, PM0, NM0 and NM1 end, and start-up circuit does not have static working current, and its quiescent dissipation is zero.

In sum, generate starting current and offer with regard to the auto bias circuit with regard to start-up circuit, when VDD is elevated to a certain degree, the voltage difference that makes VDD and VA is V _{SG (PM0)}When reaching certain specific voltage, PM0 enters the subthreshold value operating state, makes it to export a little electric current and with V _{SG (PM0)}Increase and increase, the little electric current here is starting current.This electric current flows out from transistor PM0, enters auto bias circuit, arrives ground VSS through transistor NM3 and PNP pipe Q0.So just provide starting current to auto bias circuit, make it can withdraw from the zero current operating state.Wherein, V _{SG (PM0)}The specific voltage that reaches is: correspond to the rising of VDD, V _{SG (PM0)}Progressively raise until the magnitude of voltage that reaches when making PM0 be in inferior threshold values operating state.

With regard to starting current in closing start-up circuit, along with starting current flows into auto bias circuit, V _{GS (NM3/NM4)}And V _{SG (PM0)}Increase, when these two groups of voltage differences greater than threshold voltage V _THAfter, the abundant conducting of NM3/NM4 and PM5/PM6 just can make auto bias circuit enter the state in self in feedback adjusting stage.Because PM6 is fully conducting, this moment V _{SG (PM5/PM6)}=VDD-VREF2＞V _TH, make the V of PM1 like this _SGAlso greater than V _TH, causing the PM1 conducting, VA is shorted to VDD, the V of PM0 _SGBe V _{SG (PM0)}=VDD-VA near 0, closes PM0, and start-up circuit cuts out, no longer output current.In simple terms, enter self during this state at auto bias circuit, its metal-oxide-semiconductor is that the operating state of PM5/PM6 can make PM1 open, thereby makes VA be shorted to VDD, causes source electrode and the grid voltage difference V of PM0 adjusting stage _{SG (PM0)}=0, close PM0, close start-up circuit.

Fig. 6 is the waveform schematic diagram that each node voltage of start-up circuit raises with power vd D, and also as can be seen, when the voltage difference of VA and VDD increased, the electric current of PM0 output increased, and makes VREF1 increase sharply from figure, and VREF2 rising speed slows down relatively.After PM0 closed, after auto bias circuit entered automatic feedback adjusting process, VREF1 increased fast, and VREF2 reduces fast, thereby enters steady-working state.Wherein, the magnitude of voltage of the symbol among Fig. 6 * expression VREF1; Symbol △ represents the magnitude of voltage of VREF2; Symbol

The magnitude of voltage of expression VA; Symbol

The magnitude of voltage of expression VDD.

Fig. 7 is the current diagram of start-up circuit work of the present invention, as can be seen from the figure, start-up circuit operating current when work is being received an ampere rank, very low, simultaneously, finish startup, after auto bias circuit enters normal operating conditions at start-up circuit, the electric current of start-up circuit is zero, and its quiescent dissipation is zero.Wherein, the symbol among Fig. 7

Current value during the work of expression start-up circuit.

Following embodiment two, three, four is the embodiment after the type symmetrical treatment of doing metal-oxide-semiconductor on embodiment one basis.And, the starting current among the embodiment two, three, four, being different from embodiment one all is to be provided by NM0, draws electric current to walk from auto bias circuit.Along with the rising of VDD, VA raises, the V of NM0 _GSBe V _{GS (NM0)}=VA-VSS progressively increases, and enters sub-threshold region to NM0 to a certain degree, makes VREF2 no longer keep increasing synchronously with VDD, makes V _{SG (PM6)}Increase, PM6 is conducting gradually also, and start-up circuit pulls away a little electric current from auto bias circuit by PM6 like this.V _{SG (PM6)}Increase also make V _{SG (PM5)}Increase, onesize electric current process NM3 of PM5 output and Q0 are to VSS, and auto bias circuit breaks away from the zero current operating state.

Embodiment two:

Fig. 8 is the another kind of execution mode of start-up circuit Fig. 5 of the present invention, mainly is transistorized type in Fig. 5 start-up circuit to be carried out symmetry change, and the NMOS pipe is transformed into the PMOS pipe, and the PMOS pipe is transformed into the NMOS pipe.Its annexation is: PMOS pipe PM0A and PM1A grid and source electrode are connected to power vd D simultaneously, and the source electrode of PMOS pipe PM0A is connected to the drain electrode of NMOS pipe NM0A and is connected to VREF2, and the drain electrode of PMOS pipe PM1A is connected to the grid VAA of NMOS pipe NM0A.The source electrode of NMOS pipe NM1A is connected to ground VSS, and drain electrode is connected to VAA, and grid is connected to the source electrode V11 of NMOS pipe NM4.

Fig. 8 is that with the difference of Fig. 5 NMOS manages the part that is connected of NM1A grid, and it is not that PMOS pipe PM1 grid among Fig. 5 is connected to the VREF2 simple transformation to VREF1.This is in order to guarantee that auto bias circuit starts the back and closes and the optimization carried out at the proper operation point finishing, in the time of can guaranteeing to close start-up circuit auto bias circuit have broken away from the zero current operating state fully, has entered this state that auto bias circuit enters self adjusting stage.If the grid of NM1A is connected to VREF1 among Fig. 8, then when NM1A closed, the voltage of VREF1 also was in than low level, just less times greater than V _{TH (NM1A)}, this voltage can't make NMOS pipe NM3 and NM4 conducting fully, and auto bias circuit does not also carry out the automatic feedback adjusting stage fully.In Fig. 8, when start-up circuit cut out, the level value of VREF1 had reached V _{BE (Q1)}+ V _{GS (NM4)}, close start-up circuit at this level, can guarantee that auto bias circuit enters self feedback adjusting stage, can reach normal operating state by autobalance.Wherein, V _{TH (NM1A)}The threshold voltage that refers to transistor NM1A; V _{BE (Q1)}The base stage and the emitter voltage that refer to PNP pipe Q1 are poor.

In simple terms, start-up circuit makes the NM1A conducting by V11, thereby closes start-up circuit.

Embodiment three:

Fig. 9 is a kind of distortion of Fig. 8, with the difference of Fig. 8 be the emitter V22 that the grid of NM1B is connected to triode Q0.Because when the auto bias circuit operate as normal, the level of Q0 and Q1 emitter differs very little, therefore adopts the emitter level of Q0 or Q1 all can close start-up circuit smoothly when the auto bias circuit operate as normal arbitrarily.

In simple terms, start-up circuit makes the NM1B conducting by V22, thereby closes start-up circuit.

Embodiment four:

Figure 10 is another execution mode of Fig. 5, and is the same with Fig. 8, also is that the symmetry of Fig. 5 changes, and the NMOS pipe is transformed into the PMOS pipe, and the PMOS pipe is transformed into the NMOS pipe.Be connected to after Fig. 8 difference is NMOS pipe NM1D that diode of source series of NMOS pipe NM1C is connected VSS.NMOS manages the grid of NM1D and drains short circuit together, and is connected to the source electrode of NM1C, and its source electrode is connected to ground VSS.The drain electrode connection of NMOS pipe NM1C is consistent with Fig. 8 and Fig. 9, is connected to VAC, and its grid is connected to VREF1.The purpose of serial transistor NM1D is to make the level of VREF1 when closing start-up circuit enough high, and level value reaches V _{GS (NM1D)}+ V _{GS (NM1C)}, make the complete conducting of NM3 and NM4 to guarantee that auto bias circuit enters self feedback adjusting stage, thus the normal operating conditions of entering.

The NM1D that diode of series connection connects below transistor NM1C is a kind of method of VREF1 level when improving start-up circuit when closing just, adopts additive method also can realize function corresponding.Such as NM1D being changed into the PNP triode, it is low that its base stage and collector electrode are linked together, and forms diode and connect; It is also passable perhaps directly transistor NM1D to be changed into a diode.

In simple terms, start-up circuit makes the NM1C conducting by VREF1, thereby closes start-up circuit.But compare with V22 with V11, VREF1 voltage is wanted a high V _{GS (NM3)}, in order to guarantee that having entered self feedback adjusting at auto bias circuit closes start-up circuit after the stage, a NMOS pipe NM1D that diode connects has connected below NM1C.

Need to prove, auto bias circuit herein is a kind of application scenarios of start-up circuit of the present invention, at the auto bias circuit of other structures, such as the auto bias circuit structure among Fig. 2, the present invention also can realize the function that starts, and to keep quiescent dissipation be zero.

The above is preferred embodiment of the present invention only, is not to be used to limit protection scope of the present invention.

Claims (9)

1. a start-up circuit of realizing zero quiescent dissipation is characterized in that, described start-up circuit is made of general mos field effect transistor metal-oxide-semiconductor, is used to generate the starting current that the control auto bias circuit starts; Enter at described auto bias circuit and to close described starting current when self adjusting state, realize zero quiescent dissipation.

2. start-up circuit according to claim 1 is characterized in that, provides the metal-oxide-semiconductor of described starting current to be specially under the situation of PM0 in start-up circuit, and described start-up circuit is further used for corresponding to the rising of VDD, V _{SG (PM0)}Progressively raise when reaching the magnitude of voltage that makes described PM0 be in inferior threshold values operating state, described PM0 self generates described starting current;

Wherein, described VDD is the operating voltage of described start-up circuit; Described V _{SG (PM0)}Be the voltage difference between described PM0 source electrode and the grid.

3. start-up circuit according to claim 2 is characterized in that, described start-up circuit is further used for corresponding to described V _{SG (PM0)}Rising, described starting current progressively raises when reaching the current value that makes described auto bias circuit enter the state of self adjusting, and closes described starting current.

4. according to claim 2 or 3 described start-up circuits, it is characterized in that the type of the metal-oxide-semiconductor in the start-up circuit comprises: P-channel metal-oxide-semiconductor field-effect transistor PMOS pipe and n channel metal oxide semiconductor field effect transistor NMOS pipe;

The type of the metal-oxide-semiconductor in described start-up circuit is done under the situation of symmetry displacement, and described start-up circuit is further used for described PMOS pipe symmetry is replaced into described NMOS pipe; Described NMOS pipe symmetry is replaced into described PMOS pipe.

5. start-up circuit according to claim 4 is characterized in that, provides the metal-oxide-semiconductor of described starting current to be specially under the situation of NM0 in start-up circuit, and described start-up circuit is further used for corresponding to the rising of VDD, V _{GS (NM0)}Progressively raise when reaching the magnitude of voltage that makes described NM0 be in inferior threshold values operating state, described NM0 pulls electric current and generates described starting current from described auto bias circuit;

Wherein, described VDD is the operating voltage of described start-up circuit; Described V _{GS (NM0)}Be the voltage difference between described NM0 grid and the source electrode.

6. start-up circuit according to claim 5 is characterized in that, described start-up circuit is further used for corresponding to described V _{GS (NM0)}Rising, described starting current progressively raises when reaching the current value that makes described auto bias circuit enter the state of self adjusting, and closes described starting current.

7. start-up circuit according to claim 6 is characterized in that, described start-up circuit is further used for making the NM1A conducting by V11, realizes closing of described starting current;

Wherein, described NM1A is the NMOS pipe that links to each other with described NM0; Described V11 is the emitter voltage value of PNP pipe Q1 in the described auto bias circuit, and the emitter of described Q1 links to each other with the grid of described NM1A.

8. start-up circuit according to claim 6 is characterized in that, described start-up circuit is further used for making the NM1B conducting by V22, realizes closing of described starting current;

Wherein, described NM1B is the NMOS pipe that links to each other with described NM0; Described V22 is the emitter voltage value of PNP pipe Q0 in the described auto bias circuit, and the emitter of described Q0 links to each other with the grid of described NM1B.

9. start-up circuit according to claim 6 is characterized in that, described start-up circuit is further used for making the NM1C conducting by VREF1, realizes closing of described starting current;

Wherein, described NM1C is the NMOS pipe that links to each other with described NM0; Described VREF1 is the gate voltage values of NMOS pipe NM3 in the described auto bias circuit, and the grid of described NM3 links to each other with the grid of described NM1C, and the NMOS that diode of series connection connects below the described NM1C manages NM1D.

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