CN101937069B

CN101937069B - Voltage characteristic detection system and method of SOC (System On Chip) intelligent electric meter

Info

Publication number: CN101937069B
Application number: CN2010102769354A
Authority: CN
Inventors: 贾俊; 张小景; 李朝培; 邓廷
Original assignee: ZHUHAI ZHONGHUI MICROELECTRONICS CO Ltd
Current assignee: ZHUHAI ZHONGHUI MICROELECTRONICS CO Ltd
Priority date: 2010-09-08
Filing date: 2010-09-08
Publication date: 2013-11-27
Anticipated expiration: 2030-09-08
Also published as: CN101937069A

Abstract

The invention discloses voltage characteristic detection system and method of an SOC (System On Chip) intelligent electric meter. The system comprises a three-phase voltage signal sampling circuit, a three-phase voltage signal filter circuit, an SOC internal zero crossing detector and an SOC internal timer, wherein the SOC internal zero crossing detector is used for detecting a zero-crossing state and a zero-crossing sequence of each phase voltage signal, the SOC internal timer is used for detecting the length of each phase voltage signal period, the three-phase voltage signal filter circuit which is arranged through the external of a chip filters out high-frequency alternating current signals to ensure the accuracy of zero-crossing detection in a SOC chip, and the SOC internal timer interrupts length detection of each phase voltage signal period based on the zero-crossing detection generated by the zero crossing detector. By the technical scheme of the invention, the zero-crossing detection, reverse phase sequence detection and frequency measurement can be realized without realizing an algorithm at the SOC end, an algorithm of the zero-crossing detection, the reverse phase sequence detection and the frequency measurement avoid occupying SOC resources, and the execution efficiency of a software of a SOC processing unit is optimized.

Description

Voltage characteristic detection system and the method for SOC intelligent electric meter

Technical field

The present invention relates to electric energy metrical and intelligent electric meter technical field, be specifically related to the system and method that voltage characteristic in the intelligent electric meter based on SOC is detected, comprise zero passage detection, negative phase sequence detects and frequency measurement.

Background technology

Along with SOC (system on a chip) SOC(System on a Chip) height of the increasingly mature and resource of technology is integrated, makes it enjoy the favor of intelligent electric meter manufacturer.Monolithic process chip solution based on SOC can realize all functions of tradition based on the achieved intelligent electric meter of MCU+ computation chip framework at present, its practice is to write management software on monolithic SOC, and writes metering and the measurement function algorithm software of realizing computation chip.The metering algorithm is the core place of whole intelligent electric meter, must guarantee the execution that it is safe, stable.Because its management function of the intelligent electric meter based on SOC and metering algorithm function realize on same process chip, and the execution of metering algorithm is comparatively frequent, and it is higher to carry out requirement of real-time.Therefore, in the single process chip design proposal based on SOC, the resource that take full advantage of SOC realizes being optimized to the metering algorithm.

Summary of the invention

The object of the present invention is to provide a kind of more simple, efficient voltage characteristic detection system and method for the SOC intelligent electric meter, voltage characteristic detects and comprises that zero passage detection, negative phase sequence detect and frequency measurement.

The implementation of above-mentioned purpose is: a kind of voltage characteristic detection system of SOC intelligent electric meter, it is characterized in that, comprise three-phase voltage signal sample circuit, three-phase voltage signal filtering circuit, cross the SWPM16F256 type SOC chip internal zero-crossing detector of zero condition and zero passage order and measure the SWPM16F256 type SOC chip internal timer of each phase voltage signal Cycle Length for detection of each phase voltage signal.

A kind of detection method of the detection system of the voltage characteristic based on above-mentioned SOC intelligent electric meter, is characterized in that, comprises the following steps:

(1) utilize the three-phase voltage signal filtering circuit to carry out low-pass filtering treatment to the three-phase voltage signal of three-phase voltage signal sample circuit collection;

(2) three-phase voltage signal after filtering is processed is input to the zero-crossing detector of SOC built-in chip type, and zero-crossing detector detects simultaneously to the mistakes zero condition of three-phase voltage signal, when detect a certain mutually zero cross signal is arranged after, just produce the zero passage detection interruption; The built-in timer of SOC coordinates zero-crossing detector to measure the output pulse width of its interruption, zero passage detection interruption flow process is analyzed three-phase voltage signal, and according to the timer measurement result, carry out the calculating of signal period, last zero passage detection interrupt the process selecting three-phase voltage signal wherein one as reference, carry out mutually frequency computation part; Whether zero-crossing detector detects three-phase voltage signal zero passage order abnormal, if extremely export negative phase sequence and detect and interrupt.

The flow process that described generation zero passage detection is interrupted comprises: at first, the pulsewidth count value of current timer is accumulated in the phase voltage signal period counter be labeled, and removes the counter register content of timer; Then, by the status register of zero-crossing detector, determine it is which phase voltage signal has produced by negative to positive zero cross signal; If it is marked that this phase voltage does not have, this phase voltage of mark; If this phase voltage is the mark mistake, remove the phase voltage that other have recorded, and take this phase voltage as with reference to phase; Finally, with reference phase calculated rate.

The normal condition of described three-phase voltage signal zero passage order refer to " A-> B-> C-, B-> C-A-, C-> A-B-" three kinds, except these three kinds of situations, be abnormal conditions.

The three-phase voltage signal filtering circuit filtering high frequency ac signal that the present invention arranges by chip exterior, to guarantee the accuracy of zero passage detection in the SOC chip, the inner zero-crossing detector of SOC detects each phase voltage signal and crosses zero condition and zero passage order, and the zero passage detection that the SOC timer internal produces based on zero-crossing detector interrupts measuring each phase voltage signal Cycle Length.Technical solution of the present invention need to not hold implementation algorithm can realize zero passage detection at SOC, and negative phase sequence detects and frequency measurement, has avoided zero passage detection, and negative phase sequence detects and the frequency measurement algorithm takies the SOC resource, has optimized the execution efficiency of the software of SOC processing unit.

The accompanying drawing explanation

Fig. 1 realizes schematic diagram of the present invention for what embodiment provided.

The three-phase voltage signal sample circuit schematic diagram that Fig. 2 provides for embodiment.

The three-phase voltage signal filtering circuit schematic diagram that Fig. 3 provides for embodiment.

The filter characteristic figure that Fig. 4 provides for embodiment.

The functional block diagram of the zero-crossing detector that Fig. 5 provides for embodiment.

Fig. 6 interrupts process flow diagram for the zero passage detection of the zero-crossing detector that embodiment provides.

Embodiment

As shown in Figure 1, the voltage characteristic detection system that the present embodiment provides and method are based on that the SWPM16F256 type SOC chip of Zhuhai Microtronics A/S exploitation realizes, its ultimate principle is: utilize the zero-crossing detector of SWPM16F256 built-in chip type (to be realized by the three-phase voltage signal sample circuit sampling, see Fig. 2) and mistake zero condition and the negative phase sequence of the three-phase voltage simulating signal that (realized by the three-phase voltage signal filtering circuit, see Fig. 3) after filtering detect; And utilize the timer of SWP16F256 built-in chip type to count the high level pulsewidth of zero-crossing detector output, thereby the frequency of calculating voltage signal.

As shown in Figure 2, the three-phase voltage signal sample circuit comprises that three-phase voltage signal input circuit and three-phase voltage signal lifting circuit are (because each phase voltage signal is operated near 0V, namely there is negative voltage signal, so signal need to be carried out to lifting), the three-phase voltage signal input circuit comprises A, voltage signal UA after B and C phase dividing potential drop, UB and UC incoming end and sampling resistor R2, R13, R15, three-phase voltage lifting circuit is by capacitor C 8, amplifier U1A, capacitor C 9, capacitor C 10, resistance R 12, resistance 14, resistance R 16 forms, amplifier U1A adopts LM774, form the emitter follow circuit, be used for strengthening the driving force of SWP16F256 built-in chip type output reference voltage VrefA, afterwards through capacitor C 9, after capacitor C 10 filtering, pass through resistance R 12, resistance 14, resistance R 16 is carried out lifting to three-phase voltage respectively.

In practical engineering application, when harmonic component was larger, testing circuit may detect the zero cross signal of harmonic wave.In order to suppress the impact of harmonic signal, avoid it to appear near zero-crossing point, in detection system, added three-phase voltage signal filtering circuit (as shown in Figure 3), the three-phase filter circuit structure is identical with principle, the A phase voltage signal filtering circuit of below take describes as example: this A phase voltage signal filtering circuit is by resistance R 6, resistance R 11, capacitor C 2, the low-pass filter circuit that capacitor C 7 and amplifier LM774 form.If select R6=R11 the computing formula of the cutoff frequency fc of this filtering circuit is as follows:

The family curve of this filtering circuit as shown in Figure 4, in the present embodiment, is located approximately at fc (125Hz)-3dB decay, and with the velocity attenuation of-every 10 octaves of 40dB.

Please consult again shown in Figure 1, three-phase voltage signal is linked into through the three-phase voltage signal filtering circuit on three passages of zero-crossing detector of SWP16F256 built-in chip type, wherein, A phase voltage signal input access Zero cross detector-R, the input of B phase voltage signal is linked into Zero cross detector-T, C phase voltage signal input access Zero cross detector-S.

In conjunction with shown in Figure 5, during normal operation, the zero-crossing detection circuit of SWP16F256 built-in chip type detects simultaneously to the mistake zero condition of three-phase voltage signal, when detect a certain mutually zero cross signal is arranged after, just produce zero passage detection and interrupt.The process flow diagram that zero passage detection is interrupted, as shown in 6, at first is accumulated to the pulsewidth count value of current timer in the phase voltage signal period counter of mark (that is: produced zero cross signal), and removes the counter register content of timer.Then, by the status register of zero-crossing detector, determine it is which phase voltage signal has produced by negative to positive zero cross signal.If it is marked that this phase voltage does not have, record this phase voltage.If this phase voltage is the mark mistake, remove the phase voltage that other have been labeled, and take this phase voltage as with reference to phase.Finally, with reference phase calculated rate.As shown in Figure 1, the output that zero passage detection is interrupted is connected to timer, to trigger, timer is counted the pulsewidth of high level.The zero passage order that three-phase voltage detected when zero-crossing detector be not " A-> B-> C-, B-> C-A-, C-> A-B " any one among three kinds, zero-crossing detector will produce the negative phase sequence interruption.

Above embodiment only is fully open unrestricted the present invention, for example, the SWP16F256 chip is only a kind of in numerous SOC chips, is understandable that, as long as its internal resource configuration all belongs to scope disclosed by the invention with same or similar other SOC chips of SWP16F256 chip.

Claims

1. the voltage characteristic detection system of a SOC intelligent electric meter, based on SWPM16F256 type SOC chip, SWPM16F256 type SOC built-in chip type has zero-crossing detector and timer, and zero-crossing detector has three passages: Zero cross detector-R, Zero cross detector-T, Zero cross detector-S; It is characterized in that: this detection system comprises three-phase voltage signal sample circuit, three-phase voltage signal filtering circuit, crosses the SWPM16F256 type SOC chip internal zero-crossing detector of zero condition and zero passage order and measure the SWPM16F256 type SOC chip internal timer of each phase voltage signal Cycle Length for detection of each phase voltage signal; Wherein after the three-phase voltage signal filtering circuit, the input of A phase voltage signal accesses Zero cross detector-R, and the input of B phase voltage signal is linked into Zero cross detector-T, C phase voltage signal input access Zero cross detector-S.

2. the detection method based on the voltage characteristic detection system of the described SOC intelligent electric meter of claim 1, is characterized in that, comprises the following steps:

3. detection method according to claim 2, it is characterized in that: the flow process that described generation zero passage detection is interrupted comprises: at first, the pulsewidth count value of current timer is accumulated in the phase voltage signal period counter be labeled, and removes the counter register content of timer; Then, by the status register of zero-crossing detector, determine it is which phase voltage signal has produced by negative to positive zero cross signal; If it is marked that this phase voltage does not have, this phase voltage of mark; If this phase voltage is the mark mistake, remove the phase voltage that other have recorded, and take this phase voltage as with reference to phase; Finally, with reference phase calculated rate.

4. detection method according to claim 2 is characterized in that: the normal condition of described three-phase voltage signal zero passage order refer to " A-> B-> C-, B-> C-A-, C-> A-B-" three kinds, except these three kinds of situations, be abnormal conditions.