CN101931048A - One-time programmable memory unit, memory and operating method of one time programming unit - Google Patents
One-time programmable memory unit, memory and operating method of one time programming unit Download PDFInfo
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- CN101931048A CN101931048A CN 201010264413 CN201010264413A CN101931048A CN 101931048 A CN101931048 A CN 101931048A CN 201010264413 CN201010264413 CN 201010264413 CN 201010264413 A CN201010264413 A CN 201010264413A CN 101931048 A CN101931048 A CN 101931048A
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Abstract
The invention belongs to the technical field of the programmable memory and particularly relates to a one-time programmable memory (OTP) unit, a one-time programmable memory and an operating method of the OTP unit. The OTP unit comprises an upper electrode, a lower electrode and a graphene oxide layer which is arranged between the upper electrode and the lower electrode and used as the storage medium layer. The programming operating method of the OTP unit is to offset programming electric signals between the upper electrode and the lower electrode and ensure that the graphene oxide layer is converted to a conductive low-resistance state under a certain heating condition. The OTP memory comprises an OTP unit array, wherein the OTP unit array contains a plurality of the OTP units which are arranged in rows and columns. The OTP unit of the invention can be used as the storage medium of the one-time programmable memory, thus forming the one-time programmable memory based on the graphene oxide layer.
Description
Technical field
The invention belongs to the disposable programmable memory technical field, be specifically related to a kind of disposable programmable memory cell, memory and method of operation thereof based on the graphene oxide layer.
Background technology
Nonvolatile memory the time still can keep the data of being stored in outage, and this makes nonvolatile memory have in various dissimilar electronic equipments and uses widely.Disposable programmable memory (One-Time Programmable Memory, OTP) be a kind of in the common nonvolatile memory, it comes stored logic information by the memory cell that word line and bit line intersect, wherein, common memory cell has fuse, anti-fuse and charge trap-type device (for example field effect transistor is injected in the floating boom snowslide).Disposable programmable memory generally is not reproducible programming.
For fuse and anti-fuse-type memory, need a high voltage to puncture the electric capacity insulating barrier, in the electrical breakdown process, have the loss of high power consumption.In addition, because device can not be programmed and erase operation after in a single day breakdown again, so the test condition of device is had relatively high expectations, can not breakdown device during test, simultaneously can not carry out accelerated test,, influence the yield of product so the time that test is spent also will be longer to device.
For the charge trap-type memory, comprise Erasable Programmable Read Only Memory EPROM (EPROM) and Electrically Erasable Read Only Memory (EEPROM), in general, the manufacturing process that is used to make such nonvolatile memory will lag behind advanced CMOS logic process.For example, the technology that is used for the device of quickflashing EEPROM is added 30% mask step than the advanced CMOS technology of standard, so that make high voltage generation circuit, floating gate structure, ONO layer, triple-well, and special source that in these devices, generally has and required various special region and the structure of drain junction.
In view of the above, the device that is used for flash structures will lag behind one to two generation of advanced CMOS technology, and the cost of each chip is all than the latter expensive 30% simultaneously.As another example, must be suitable for making various anti-fuse structures and high voltage circuit based on the technology of the antifuse device of oxide layer breakdown effect, so this technology CMOS technology that is tending towards equally emulating the advanced falls behind a generation.
Along with dwindling of process, above-mentioned programmable read only memory all can run into bottleneck problem.For example, industrial quarters generally believes that flash memory will meet with the physics limit bottleneck, and the floating boom of FLASH can not develop unrestricted attenuate with technology generation; And will meet with the problem of soft breakdown (because the oxidated layer thickness attenuation, the probability that soft breakdown takes place is big more) based on the programmable read only memory of oxide layer breakdown effect.
Simultaneously, (Graphene owing to have special mechanics, quantum and electrical properties, is a kind of novel material that is widely studied in recent years G) to Graphene.Graphene is a kind of two-dimentional carbon atom crystal, has good electrical conductivity usually.And graphene oxide (perhaps is called graphene oxide, Graphene Oxide, GO) be a kind of material that has approximate insulation characterisitic relatively, comprising oxy radical (Oxygen-containing groups), such as hydroxyl (hydroxyl), epoxy radicals (epoxy) or the like.Graphene and graphene oxide all have two-dimensional characteristics, and its film can reach nano level thickness, and it is can semiconductor device compatible mutually.
And, exercise question is in " Nanoscale Tunable Reduction of Graphene Oxide for Graphene Electronics " (from " Science ", the 328th volume on June 11st, 2010) document, and people such as Zhongqing Wei have reported that graphene oxide (for example 130 degree heating) under certain heating condition can be converted to the material of conductivity by relative insulating properties.
In view of this, the present invention proposes a kind of new O TP.
Summary of the invention
The objective of the invention is to propose a kind of be different from fully traditional OTP, the New O TP based on graphene oxide, memory and method of operation thereof.
The disposable programmable memory cell that the present invention proposes comprises top electrode and bottom electrode, and comprise place between described top electrode and the described bottom electrode, as the graphene oxide layer of storage medium layer.
As a technical scheme of disposable programmable memory cell of the present invention, wherein, the area of described graphene oxide layer is less than or equal to the area of described bottom electrode.
As another technical scheme of disposable programmable memory cell of the present invention, wherein, the area of described graphene oxide layer is greater than the area of described bottom electrode.
As another technical scheme of disposable programmable memory cell of the present invention, wherein, also comprise dielectric layer, described dielectric layer is used for composition and forms described graphene oxide layer and/or bottom electrode.
Preferably, described dielectric layer is the low k dielectric layer.
Particularly, described bottom electrode is Co, Cu, W, Ni, Zr, Ta, TaN, Ti, TiN, Zn or Al.
Particularly, described very one of Pd, Ta, Ti, TaN, TiN, Cu, Al, Pt, W, Ni, Ru, Ru-Ta alloy, Pt-Ti alloy, Ni-Ta alloy of powering on perhaps is one of any composite material that both form in Pd, Ta, Ti, TaN, TiN, Cu, Al, Pt, W, Ni, Ru, Ru-Ta alloy, Pt-Ti alloy, the Ni-Ta alloy.
As another technical scheme of disposable programmable memory cell of the present invention, wherein, described graphene oxide layer is programmed ground, rear section or changes graphene layer fully into.
The present invention also proposes to prepare the method for described disposable programmable memory cell, may further comprise the steps:
(1) composition forms bottom electrode;
(2) formation is as the graphene oxide layer of storage medium layer; And
(3) composition forms top electrode.
As the optimal technical scheme of the inventive method, wherein, described step (2) comprises step:
(2a) on bottom electrode, form graphene layer by the chemical vapor deposition composition;
(2b) adopt reactive ion etching oxidation and remote plasma oxidation processes to form described graphene oxide layer to described graphene layer.
The operation scheme for programming of the described disposable programmable memory cell that the present invention proposes is by offset programming electric signals between described top electrode and bottom electrode, so that described graphene oxide layer is implemented in the low resistance state that changes conduction under certain heating condition.
Particularly, in the described heating condition, heating-up temperature is more than 130 ℃ or 130 ℃.When described graphene oxide layer changed the low resistance state of conduction into, described graphene oxide layer was partly or completely changed into graphene layer.
The present invention also provides a kind of disposable programmable memory, and it comprises: disposable programmable memory cell array, described disposable programmable memory cell array comprise a plurality of above-described programmable memory cell of arranging by row and column.
Particularly, described disposable programmable memory also comprises:
The row decoder that is connected with described disposable programmable memory cell array;
The column decoder that is connected with described disposable programmable memory cell array;
The address latch module;
Write driver module;
Sense amplifier;
Input/output (i/o) buffer; And
Logic control module.
Technique effect of the present invention is, this invention realizes the graphene oxide layer is heated by the electrical signal effect, thereby change low resistance state into by relative high-impedance state, realize the Reset transition process of disposable programmable memory, therefore, the graphene oxide layer can have been realized the disposable programmable memory based on the graphene oxide layer as the storage medium layer of disposable programmable memory.
Description of drawings
Fig. 1 is the structural representation according to the first embodiment OTP unit provided by the invention.
Fig. 2 is the electrical signal schematic diagram to the programming of OTP shown in Figure 1 unit.
Fig. 3 is the programming process schematic diagram of OTP shown in Figure 1 unit.
Fig. 4 is the structural representation according to the second embodiment OTP unit provided by the invention.
Fig. 5 is the programming process schematic diagram of OTP shown in Figure 4 unit.
Fig. 6 is the structural representation according to the 3rd embodiment OTP unit provided by the invention.
Fig. 7 is the programming process schematic diagram of OTP shown in Figure 6 unit.
Fig. 8 is the structural representation according to OTP embodiment provided by the invention.
Embodiment
In conjunction with diagram, in reference example, describe the present invention more completely hereinafter, the invention provides preferred embodiment, but should not be considered to only limit to embodiment set forth herein.In the drawings, for the clear thickness that has amplified layer and zone, but should not be considered to the proportionate relationship that strictness has reflected physical dimension as schematic diagram.
At this, reference diagram is the schematic diagram of idealized embodiment of the present invention, and embodiment shown in the present should not be considered to only limit to the given shape in the zone shown in the figure, but comprises resulting shape, the deviation that causes such as manufacturing.For example the curve that obtains of dry etching has crooked or mellow and full characteristics usually, but in embodiment of the invention diagram, all represents with rectangle, and the expression among the figure is schematically, but this should not be considered to limit the scope of the invention.
Figure 1 shows that structural representation according to the first embodiment OTP unit provided by the invention.As shown in Figure 1, in this embodiment, the OTP unit comprises bottom electrode 10, GO layer 30 and top electrode 50, and wherein GO layer 30 is as the storage medium layer of OTP, and this OTP unit is when initial state, and the GO layer shows as the high-impedance state characteristic, therefore can represent to store data " 1 ".
Wherein, bottom electrode 10 can be metallic conduction materials such as Co, Ni, Cu, W, Ni, Zr, Ta, TaN, Ti, TiN, Zn or Al.In addition, also can select to adopt Graphene as bottom electrode.In this embodiment, bottom electrode 10 is not just as conduction, on the other hand, when top electrode 50 and bottom electrode 10 are directly connected the signal of telecommunication, electric current by bottom electrode 10 can also cause the bottom electrode heating, partly to 30 heating of GO layer, impels it to change to conductive characteristic.Therefore, particularly, can select the higher metallic conduction material of resistivity as bottom electrode, to improve its heats, for example, resistivity is greater than 5 * 10
-8Ohm meter (for example can select tungsten) as bottom electrode.
Need to prove that the concrete preparation method of GO layer 30 is not limited by embodiments of the invention, along with going deep into of the research of Graphene, the GO layer preparation method of various new propositions all can be applied among the OPT of the present invention.
In the embodiment shown in fig. 1, this OTP unit also comprises medium 11.In this embodiment, dielectric layer 11 is used for composition and forms bottom electrode 10 and GO layer 30, and dielectric layer 11 surrounds bottom electrode 10 and GO layer 30.Therefore, the area size of bottom electrode 10 and GO layer 30 can limit by dielectric layer 11, and in this invention, the area size of bottom electrode 10 and GO layer 30 is nonrestrictive.Dielectric layer 11 can be insulating medium layers such as silica, silicon nitride, also can be various low k(dielectric constants) the dielectric layer material, preferably, can be chosen as the porous low k dielectric layer, like this, convenient in following programming process, might be when heating GO layer 30 is converted to G layer 40 owing to pyrolysis produce gas on a small quantity such as CO, CO2 and/or H2O, thus the porous low k dielectric layer can absorb the reliability that these gases help guaranteeing the OTP unit.
Figure 2 shows that electrical signal schematic diagram, Figure 3 shows that the programming process schematic diagram of OTP shown in Figure 1 unit the programming of OTP shown in Figure 1 unit.Operation scheme for programming in conjunction with Fig. 2 and explanation shown in Figure 3 OTP of the present invention unit.
In this invention, mainly utilize the GO layer under certain heating condition, can change the characteristic of low-resistance conduction state (for example changing the G layer into) into by relative high-impedance state in the above condition heating of 130 degree.As shown in Figure 3, to store status is the OTP unit of " 1 ", apply programming signal as shown in Figure 2, to form certain current lead-through between top electrode 50 and the bottom electrode 10, thereby can make 30 heating of GO layer to certain temperature (for example more than 130 degree), GO layer 30 further changes the low resistance state of conduction into.In this embodiment, GO layer 30 is to be converted to form G layer 40, thereby finishes Reset programming process as shown in Figure 3.The heating condition of GO layer 30 (comprising temperature height, time length etc.) is controlled by programming electrical signal shown in Figure 2, can select voltage (or electric current) size (height H), the length of holding time (t1 to t2 time period), the decisions such as (t2 to t3 time periods) of voltage (or electric current) decrease speed of this electrical signal.Certainly, when the parameters such as thickness of GO layer 30 not simultaneously, the programming electrical signal of selection is difference to some extent also.In addition, need to prove that in this embodiment, the heat that forms also can help to realize 30 conversion of GO layer to bottom electrode 10 because the programming electrical signal causes generating heat.
Figure 4 shows that structural representation according to the second embodiment OTP unit provided by the invention.In this embodiment, the main distinction of OTP unit and OTP unit shown in Figure 1 is, as the area of the GO layer 31 of the storage medium layer area greater than bottom electrode 10, dielectric layer 10 only is used for composition and forms bottom electrode 10.The OTP unit of this embodiment is similar substantially to the operation principle of OTP unit shown in Figure 1, does not repeat them here.
Figure 5 shows that the programming process schematic diagram of OTP shown in Figure 4 unit.As shown in Figure 5, the same programming electrical signal that between top electrode 50 and bottom electrode 10, applies as shown in Figure 2.Because electric current will concentrate on bottom electrode 10 The corresponding area, therefore, in the GO layer 31, only part is converted to G layer 41, resistance decreasing between the upper/lower electrode, thus realize by the Reset programming process of data " 1 " to data " 0 ".
Figure 6 shows that structural representation according to the 3rd embodiment OTP unit provided by the invention.In this embodiment, the main distinction of OTP unit and OTP unit shown in Figure 1 is, as the area of the GO layer 32 of the storage medium layer area less than bottom electrode 10, dielectric layer 10 only is used for composition and forms GO layer 32, and GO layer 32 is surrounded by dielectric layer 11.The OTP unit of this embodiment is similar substantially to the operation principle of OTP unit shown in Figure 1, does not repeat them here.
Figure 7 shows that the programming process schematic diagram of OTP shown in Figure 6 unit.As shown in Figure 5, the same programming electrical signal that between top electrode 50 and bottom electrode 10, applies as shown in Figure 2.In this embodiment, the spontaneous heating (not relying on the heating of bottom electrode 10) by GO layer 32 is programmed GO layer 32 and is converted to G layer 42 substantially, thereby realizes by the Reset programming process of data " 1 " to data " 0 ".Need to prove, for realize the programming conversion by spontaneous heating, the area of GO layer 32 can be oppositely arranged less, for example, be about 100 square nanometers to 1 square microns, easier like this realization programming conversion (H that for example is reflected in programming electrical signal as shown in Figure 2 can be littler, t1 to the t2 time period can be shorter).
Figure 8 shows that structural representation according to OTP embodiment provided by the invention.Just schematically illustrate the chief component of OTP among Fig. 8, this OTP can also comprise other many known elements, for example sense amplifier, row decoder, column decoder or the like.As shown in Figure 8, OTP 600 comprises OTP cell array 601, column decoder 602, row decoder 603, address latch 604, control logic 605, sense amplifier 606, writes drive circuit 607 and input/output (i/o) buffer 608.Wherein, OTP cell array 601 is to be arranged by the form of row and column by several above-described OTP unit to form, each OTP unit is formed between the crosspoint of word line and bit line, for example, the bottom electrode of OTP unit is connected with word line, the top electrode of OTP is connected with bit line, certainly, also can be connected with bit line for the bottom electrode of OTP unit, the top electrode of OTP is connected with word line.
When read-write OTP 600, the address signal of extraneous input is latched in the address latch 604, row address signal is input in the row decoder 603 that is connected with address latch 604, column address signal is input in the column decoder 602 that is connected with address latch 604, and corresponding delegation and row in the OTP cell array 601 are chosen in the output of column decoder 602 and row decoder 603 respectively.When carrying out the write memory operation, extraneous data-signal is input to by input/output (i/o) buffer 608 to be write in the drive circuit 607, write drive circuit 607 and generate according to the data of input and write voltage or write current (being programming electric signals shown in Figure 2) accordingly in OTP cell array 601, carry out write operation (being the Reset operation); When carrying out read operation, sense amplifier 606 applies certain read signal in OTP cell array 601, reads corresponding data-signal according to the different state of memory cell, and data-signal exports the external world to by inputoutput buffer 608.Control logic 605 is being controlled column decoder 602, row decoder 603, address latch 604, sense amplifier 606, is being write the sequential of drive circuit 607 and inputoutput buffer 608 these modules, thereby makes whole memory 600 operate as normal.It is to be noted that memory 600 is just illustrative, because may use many other technology to come storage array is carried out addressing, data are inputed or outputed storage array, the needed various operating voltages of storage array etc. are provided in case of necessity.
Above example has mainly illustrated the preparation method of OTP of the present invention unit, OTP unit, the operation scheme for programming and the memory of OTP unit.Although only the some of them embodiments of the present invention are described, those of ordinary skills should understand, and the present invention can be in not departing from its purport and scope implements with many other forms.Therefore, example of being showed and execution mode are regarded as illustrative and not restrictive, and under situation about not breaking away from as defined spirit of the present invention of appended each claim and scope, the present invention may be contained various modifications and replacement.
Claims (15)
1. a disposable programmable memory cell comprises top electrode and bottom electrode, it is characterized in that, also comprise place between described top electrode and the described bottom electrode, as the graphene oxide layer of storage medium layer.
2. disposable programmable memory cell as claimed in claim 1 is characterized in that, the area of described graphene oxide layer is less than or equal to the area of described bottom electrode.
3. disposable programmable memory cell as claimed in claim 1 is characterized in that the area of described graphene oxide layer is greater than the area of described bottom electrode.
4. as claim 1 or 2 or 3 described disposable programmable memory cell, it is characterized in that also comprise dielectric layer, described dielectric layer is used for composition and forms described graphene oxide layer and/or bottom electrode.
5. disposable programmable memory cell as claimed in claim 4 is characterized in that, described dielectric layer is the low k dielectric layer.
6. disposable programmable memory cell as claimed in claim 1 is characterized in that, described bottom electrode is Co, Cu, W, Ni, Zr, Ta, TaN, Ti, TiN, Zn or Al.
7. disposable programmable memory cell as claimed in claim 1, it is characterized in that, described top electrode or be one of Pd, Ta, Ti, TaN, TiN, Cu, Al, Pt, W, Ni, Ru, Ru-Ta alloy, Pt-Ti alloy, Ni-Ta alloy perhaps is one of both composite materials of forming arbitrarily in Pd, Ta, Ti, TaN, TiN, Cu, Al, Pt, W, Ni, Ru, Ru-Ta alloy, Pt-Ti alloy, the Ni-Ta alloy.
8. disposable programmable memory cell as claimed in claim 1 is characterized in that, described graphene oxide layer is programmed ground, rear section or changes graphene layer fully into.
9. one kind prepares the method for disposable programmable memory cell according to claim 1, it is characterized in that, may further comprise the steps:
(1) composition forms bottom electrode;
(2) formation is as the graphene oxide layer of storage medium layer; And
(3) composition forms top electrode.
10. method as claimed in claim 9 is characterized in that, described step (2) comprises step:
(2a) on bottom electrode, form graphene layer by the chemical vapor deposition composition;
(2b) adopt reactive ion etching oxidation and remote plasma oxidation processes to form described graphene oxide layer to described graphene layer.
11. operation scheme for programming of disposable programmable memory cell according to claim 1, it is characterized in that, by offset programming electric signals between described top electrode and bottom electrode, make described graphene oxide layer be implemented in the low resistance state that changes conduction under certain heating condition.
12. method as claimed in claim 11 is characterized in that, in the described heating condition, heating-up temperature is more than 130 ℃ or 130 ℃.
13. method as claimed in claim 11 is characterized in that, when described graphene oxide layer changed the low resistance state of conduction into, described graphene oxide layer was partly or completely changed into graphene layer.
14. a disposable programmable memory is characterized in that, comprising: disposable programmable memory cell array, described disposable programmable memory cell array comprise by row and column arrange a plurality of as each described programmable memory cell of claim 1-8.
15. disposable programmable memory as claimed in claim 14 is characterized in that, also comprises:
The row decoder that is connected with described disposable programmable memory cell array;
The column decoder that is connected with described disposable programmable memory cell array;
The address latch module;
Write driver module;
Sense amplifier;
Input/output (i/o) buffer; And
Logic control module.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103490009A (en) * | 2013-09-28 | 2014-01-01 | 复旦大学 | Flexible resistive random access memory based on oxidized graphene and preparation method thereof |
| CN106328808A (en) * | 2015-06-15 | 2017-01-11 | 华邦电子股份有限公司 | One-time programmable resistive memory |
| CN109087679A (en) * | 2018-07-27 | 2018-12-25 | 上海华力集成电路制造有限公司 | The storage array and OTP of storage unit and its composition |
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| CN101232075A (en) * | 2006-12-21 | 2008-07-30 | 奇梦达北美公司 | Pillar phase change memory cell |
| CN101599530A (en) * | 2009-06-24 | 2009-12-09 | 中国科学院宁波材料技术与工程研究所 | Memory cell of a kind of resistive random access memory (RRAM) and preparation method thereof |
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| CN101232075A (en) * | 2006-12-21 | 2008-07-30 | 奇梦达北美公司 | Pillar phase change memory cell |
| CN101599530A (en) * | 2009-06-24 | 2009-12-09 | 中国科学院宁波材料技术与工程研究所 | Memory cell of a kind of resistive random access memory (RRAM) and preparation method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103490009A (en) * | 2013-09-28 | 2014-01-01 | 复旦大学 | Flexible resistive random access memory based on oxidized graphene and preparation method thereof |
| CN106328808A (en) * | 2015-06-15 | 2017-01-11 | 华邦电子股份有限公司 | One-time programmable resistive memory |
| CN106328808B (en) * | 2015-06-15 | 2018-11-13 | 华邦电子股份有限公司 | One time programming resistance-type memory |
| CN109087679A (en) * | 2018-07-27 | 2018-12-25 | 上海华力集成电路制造有限公司 | The storage array and OTP of storage unit and its composition |
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Application publication date: 20101229 |