CN101908478B - Manufacturing method of copper electrode structure and application thereof - Google Patents
Manufacturing method of copper electrode structure and application thereof Download PDFInfo
- Publication number
- CN101908478B CN101908478B CN200910146910XA CN200910146910A CN101908478B CN 101908478 B CN101908478 B CN 101908478B CN 200910146910X A CN200910146910X A CN 200910146910XA CN 200910146910 A CN200910146910 A CN 200910146910A CN 101908478 B CN101908478 B CN 101908478B
- Authority
- CN
- China
- Prior art keywords
- layer
- insulating barrier
- copper
- patterned insulation
- insulation layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Abstract
The invention relates to a manufacturing method of a copper electrode structure and application thereof. The manufacturing method comprises the following steps of: sequentially forming a copper-containing metal layer and a first insulating layer on a substrate; forming a patterned photoresistance layer on the first insulating layer; carrying out etching on the first insulating layer by utilizing an oxygen-containing plasma and forming a copper oxide layer on the substrate so as to form a patterned insulating layer and the copper electrode structure, wherein the patterned insulating layer is positioned on the copper electrode structure; and removing the patterned photoresistance layer and the copper oxide layer. The method can be applied to a thin film transistor, a display substrate, a liquid crystal display panel and manufacturing methods thereof.
Description
Technical field
The invention relates to a kind of manufacturing approach and application thereof of copper electrode structure, and particularly relevant for the manufacturing approach that can be applicable to the copper electrode structure in thin-film transistor, display base plate, display panels and the manufacturing approach thereof.
Background technology
Usually, the speed of circuit signal transmission can be decided by the product of resistance (R) and electric capacity (C), and the RC product value is more little, and then transmission speed is fast more.Therefore, at present existingly use metal to be used as plain conductor, with the method for the signal delay problem that solves lead than low-resistance coefficient.
With the liquid crystal indicator is example, and along with the maximization and the high-resolution demand of LCD, the delay phenomenon (RC Delay) of plain conductor when signal transmits is even more serious.In order to promote signaling rate, adopted the metal of low-resistivity at present, for example: copper, silver or golden are used as the plain conductor or the gate electrode of display base plate.Please with reference to Figure 1A to Fig. 1 G, it illustrates the processing procedure generalized section according to a kind of thin-film transistor array base-plate of prior art.When manufacturing is the thin-film transistor array base-plate 900 of gate electrode with copper; Form grid 901, storage electrode 902 (shown in Figure 1A and Figure 1B), first insulating barrier 903, second insulating barrier 904 (shown in Fig. 1 C), semiconductor layer 905 (shown in Fig. 1 D), source electrode 906, drain electrode 907 (shown in Fig. 1 E), protective layer 908 (shown in Fig. 1 F) and transparency electrode 909 (shown in Fig. 1 G) in regular turn on glass substrate 910, to form thin-film transistor 920 and storage capacitors 930 on glass substrate 910.Grid 901 is to be material with copper with storage electrode 902, and is forming second insulating barrier 904 before on first insulating barrier 903, can carry out a cleaning, to remove the foreign matter (like particulate) or the impurity of not expecting.Transparency electrode 909 can be used as pixel electrode, and is coupled to drain electrode 907, and can form storage capacitors 930 between transparency electrode 909 and the storage electrode 902.
Shown in Figure 1A and Figure 1B; When forming grid 901 with storage electrode 902; Generally need utilize wet etching (wet etching) and patterning photoresist layer 911 to come patterning one metal copper layer 912, the strip pattern photoresist layer 911 again, to form grid 901 and storage electrode 902 on glass substrate 910.Yet, when strip pattern photoresist layer 911, corrode and injure the part or all of surface of grid 901 and storage electrode 902 easily, thereby influence the electrical and component characteristic of grid 901 and storage electrode 902 easily.And when utilizing wet etching to come pattern metal copper layer 912, the both sides of grid 901 and storage electrode 902 are easily because of the corrosion of etching solution, and have over etching or undercutting situations such as (undercut).
Moreover, shown in Fig. 1 G, if the general thickness of first insulating barrier 903, second insulating barrier 904 and protective layer 908 between transparency electrode 909 and glass substrate 910 is excessive or interlayer interface is too much, then influence easily LCD the substrate light transmittance.
Summary of the invention
Therefore one side of the present invention is manufacturing approach and the manufacturing approach thereof that is to provide a kind of copper electrode structure, uses the electrode that forms copper-containing metal and comes the electrical quality of lifting subassembly or device, and can guarantee the quality and the yield of copper wiring.
Another aspect of the present invention is manufacturing approach and the manufacturing approach thereof that is to provide a kind of copper electrode structure, uses to form copper electrode in display base plate and display floater, and can guarantee its light transmittance.
According to embodiments of the invention, the manufacturing approach of copper electrode structure of the present invention comprises following steps: substrate is provided; Form the copper-containing metal layer and first insulating barrier in regular turn on substrate; Form the patterning photoresist layer on first insulating barrier; Utilization contains oxygen plasma and carries out etching, is not patterned first insulating barrier that photoresist layer is covered to remove, and forms copper oxide on substrate, and forms patterned insulation layer and copper electrode structure, and patterned insulation layer is to be positioned on the copper electrode structure; And remove patterning photoresist layer and copper oxide.
Again, according to embodiments of the invention, method of manufacturing thin film transistor of the present invention comprises following steps: substrate is provided; Form the copper-containing metal layer and first insulating barrier in regular turn on substrate; Form the patterning photoresist layer on first insulating barrier; Utilization contains oxygen plasma and carries out etching, is not patterned first insulating barrier that photoresist layer is covered to remove, and forms copper oxide on substrate, and forms patterned insulation layer and grid, and patterned insulation layer is to be positioned on the grid; Remove patterning photoresist layer and copper oxide; Form second insulating barrier on patterned insulation layer; Form semiconductor layer on second insulating barrier and patterned insulation layer; And form source electrode and drain electrode, and the expose portion semiconductor layer forms channel region, wherein source electrode is respectively the both sides that are positioned at channel region with drain electrode.
Again, according to embodiments of the invention, the manufacturing approach of display base plate of the present invention comprises following steps: substrate is provided; Form the copper-containing metal layer and first insulating barrier in regular turn on substrate; Form the patterning photoresist layer on first insulating barrier, and expose part first insulating barrier; Utilization contains oxygen plasma and carries out etching, is not patterned first insulating barrier that photoresist layer is covered to remove, and forms copper oxide on substrate, and forms patterned insulation layer and grid, and patterned insulation layer is to be positioned on the grid; Remove patterning photoresist layer and copper oxide; Form second insulating barrier on patterned insulation layer; Form semiconductor layer on second insulating barrier and patterned insulation layer; Form source electrode and drain on each semiconductor layer, and the expose portion semiconductor layer forms channel region on each semiconductor layer respectively, wherein source electrode is respectively the both sides that are positioned at channel region with drain electrode; Form protective layer on channel region, source electrode, drain electrode and second insulating barrier, wherein protective layer has the hole of connecing; And form transparent electrode layer on protective layer, and utilize the hole that connects of protective layer to be electrically connected at drain electrode.
Again, according to embodiments of the invention, thin-film transistor of the present invention comprises substrate, grid, patterned insulation layer, second insulating barrier, semiconductor layer, source electrode and and drain electrode.Grid is to be formed on the substrate, and patterned insulation layer is formed on the grid, and wherein the area of patterned insulation layer and shape are area and the shapes that essence is same as grid; Second insulating barrier is formed on the patterned insulation layer; Semiconductor layer is formed at second insulating barrier, and is positioned on the patterned insulation layer, and source electrode and drain electrode are to be formed on the semiconductor layer; And the expose portion semiconductor layer forms channel region, and wherein source electrode is respectively the both sides that are positioned at channel region with drain electrode.
Again, according to embodiments of the invention, display base plate of the present invention comprises substrate, above-mentioned thin-film transistor, protective layer and transparent electrode layer.Thin-film transistor is to be formed on the substrate; Protective layer is formed on the thin-film transistor, and wherein protective layer has the hole of connecing, and it exposes the part drain electrode; Transparent electrode layer is to be formed on the protective layer, and via the drain electrode that the hole is electrically connected at thin-film transistor that connects of protective layer.
Again, according to embodiments of the invention, display panels of the present invention comprises colored filter substrate, thin-film transistor array base-plate and liquid crystal layer.Thin-film transistor array base-plate can be above-mentioned display base plate, and liquid crystal layer is to be formed between colored filter substrate and the thin-film transistor array base-plate.
Therefore, the present invention can guarantee the processing procedure quality and the yield of copper electrode, and utilizes the display base plate of method manufacturing of the present invention and display floater can guarantee its light transmittance.
Description of drawings
Figure 1A to Fig. 1 G illustrates the processing procedure generalized section according to a kind of thin-film transistor array base-plate of prior art.
Fig. 2 illustrates according to the display unit of one embodiment of the invention and the generalized section of module backlight.
Fig. 3 A to Fig. 3 K illustrates the processing procedure generalized section according to the thin-film transistor array base-plate of one embodiment of the invention.
Fig. 4 illustrates the method flow diagram according to the manufacturing approach of the display base plate of one embodiment of the invention.
Embodiment
For letting above and other objects of the present invention, characteristic, advantage and the embodiment can be more obviously understandable, this specification be enumerated a series of embodiment with the spy and is explained.But it should be noted that these embodiment, but not in order to limit the present invention just in order to execution mode of the present invention to be described.
Please with reference to Fig. 2, it illustrates according to the display unit of one embodiment of the invention and the generalized section of module backlight.The manufacturing approach of the copper electrode structure of present embodiment can be in order to making the electrode structure of copper-containing metal (like copper or copper alloy), and can improve the yield and the quality of copper wiring, and the manufacturing approach of present embodiment also can be applicable to semiconductor subassembly or electronic building brick.Display floater 100 with display unit is an example, and the copper electrode of present embodiment can for example be the grid of the thin-film transistor on the display floater 100 and the electrode of storage capacitors.This display floater 100 can be applicable to as in LCD (LCD), organic light emitting diode display (OLED), plasma display (PDP) or the field emission display display unit such as (Field Emission Display).With LCD is example, when display floater 100 is a display panels, and display floater 100 modules 200 backlight capable of being combined, and form liquid crystal indicator.
As shown in Figure 2; In the present embodiment; Display floater 100 for example is a display panels, and at this moment, display floater 100 can comprise thin-film transistor (Thin Film Transistor; TFT) array base palte 110 (that is display base plate), colored filter (Color Filter, CF) substrate 120, liquid crystal layer 130, first polaroid 140 and second polaroid 150.Colored filter substrate 120 relatively is provided with thin-film transistor array base-plate 110; Liquid crystal layer 130 is formed between colored filter substrate 120 and the thin-film transistor array base-plate 110, and wherein thin-film transistor array base-plate 110 can be provided with a plurality of holding wires (not illustrating), plurality of films transistor 107, a plurality of storage capacitors 108 and transparent electrode layer 119 (asking earlier with reference to Fig. 3 K).Holding wire for example is data wire and scan line, and mutual vertical interlaced, and forms a plurality of pixels (not illustrating), and thin-film transistor 107, storage capacitors 108 and transparent electrode layer 119 are arranged in each pixel.First polaroid 140 is provided with the outside of thin-film transistor array base-plate 110, and with respect to liquid crystal layer 130 (also being the incident side of thin-film transistor array base-plate 110).Second polaroid 150 is provided with the outside of colored filter substrate 110, and with respect to liquid crystal layer 130 (also being the bright dipping side of colored filter substrate 120).So be not limited thereto, in certain embodiments, colored filter and thin film transistor (TFT) array also configurable on same substrate (that is Color Filter on Array, COA).
Please with reference to Fig. 3 A to Fig. 4, Fig. 3 A to Fig. 3 K illustrates the processing procedure generalized section according to the thin-film transistor array base-plate of one embodiment of the invention, and Fig. 4 illustrates the method flow diagram according to the manufacturing approach of the display base plate of one embodiment of the invention.Shown in Fig. 3 A and Fig. 3 B, when the method for using this enforcement is made thin-film transistor array base-plate 110, at first, substrate 111 (step 301) is provided, this substrate 111 is preferably transparency carrier, for example quartz base plate, glass substrate or flexible base plate.Then, form the copper-containing metal layer 101 and first insulating barrier 102 in regular turn on substrate 111 (step 302).The material of this copper-containing metal layer 101 for example is copper or copper alloy, and the mode of its plating capable of using or sputter is formed on the substrate 111.First insulating barrier, 102 thermal oxidation methods capable of using, Low Pressure Chemical Vapor Deposition (LPCVD), aumospheric pressure cvd method (APCVD), plasma chemical vapor deposition (PECVD), atomic layer deposition method (ALD), physical vaporous deposition or other similar technology are formed on the copper-containing metal layer 101, and the material of this first insulating barrier 102 can be oxide, silica, silicon nitride, silicon oxynitride, dielectric materials, above-mentioned combination in any and/or other material.
Like Fig. 3 C, Fig. 3 D and shown in Figure 4, then, form patterning photoresist layer 103 on first insulating barrier 102 (step 303), and expose part first insulating barrier 102.At this moment, can be pre-formed photoresist layer 104 (shown in Fig. 3 C) on first insulating barrier 102, then, photoresist layer 104 carried out patterning, to form patterning photoresist layer 103 (shown in Fig. 3 D).In the present embodiment, patterning photoresist layer 103 can be used as light shield and comes the follow-up grid of patterning 112 and storage electrode 113 (please earlier with reference to Fig. 3 E).
Like Fig. 3 E and shown in Figure 4; Then, utilization contains oxygen plasma and carries out etching (step 304), that is carries out dry ecthing; Be not patterned first insulating barrier 102 that photoresist layer 103 is covered to remove; And form copper oxide 105 on substrate 111, and form grid 112, storage electrode 113 and patterned insulation layer 114 between copper oxide 105, patterned insulation layer 114 is to lay respectively on grid 112 and the storage electrode 113.This contains oxygen plasma and for example is oxygen (O
2) plasma or oxygen containing mist (SF for example
6/ O
2, CF
4/ O
2, C
2F
6/ O
2, C
3F
8/ O
2Or SiF
4/ O
2) plasma, it can produce oxygen radical, and produces oxidation with the copper ion of copper-containing metal layer 101, and for example forms cuprous oxide (CuO
2).Therefore; When utilization contains oxygen plasma and carries out etching; Patterning photoresist layer 103 can be used as the protection light shield, thereby is not patterned 102 of first insulating barriers that photoresist layer 103 covered and is removed by the dry ecthing of plasma institute, then; Be not patterned 101 generations of copper-containing metal layer oxidation that photoresist layer 103 is covered, and form copper oxide 105.At this moment; Copper-containing metal layer 101 can and contain oxygen plasma by patterning photoresist layer 103 and be patterned to grid 112 and storage electrode 113; Wherein grid 112 and storage electrode 113 are to be formed between the copper oxide 105, and first insulating barrier 102 can be patterned to patterned insulation layer 114 by patterning photoresist layer 103 and dry ecthing.Because grid 112, storage electrode 113 and patterned insulation layer 114 are to utilize simultaneously to contain oxygen plasma and carry out dry ecthing; Thereby but the area and the shape essence of grid 112 and storage electrode 113 are same as patterned insulation layer 114; And can obtain preferable side etching quantity, and can avoid over etching or undercutting problems such as (undercut).
Like Fig. 3 F and shown in Figure 4, then, remove patterning photoresist layer 103 and copper oxide 105 (step 305), thereby form the copper electrode structure (being positioned at grid 112 and storage electrode 113 under the patterned insulation layer 114) of present embodiment.At this moment, photoresistance stripper capable of using comes lift photoresist layer 103 and copper oxide 105 simultaneously.It should be noted that; When lift photoresist layer 103; Because patterning photoresist layer 103 has patterned insulation layer 114 respectively and between grid 112 and the storage electrode 113; Thereby patterned insulation layer 114 can be in order to the grill-protected utmost point 112 and storage electrode 113, to avoid receiving the influence or the corrosion of photoresistance stripper.
Like Fig. 3 G and shown in Figure 4, then, form second insulating barrier 115 on patterned insulation layer 114 (step 306).Second insulating barrier 115 thermal oxidation method also capable of using, Low Pressure Chemical Vapor Deposition (LPCVD), aumospheric pressure cvd method (APCVD), plasma chemical vapor deposition (PECVD), atomic layer deposition method (ALD), physical vaporous deposition or other similar technology are formed on the patterned insulation layer 114, and the material of this second insulating barrier 115 also can be oxide, silica, silicon nitride, silicon oxynitride, dielectric materials, above-mentioned combination and/or other material.Before forming second insulating barrier 115, can carry out a cleaning in advance, to remove foreign matter of not expecting (like particulate) or the impurity on patterned insulation layer 114 and the substrate.Moreover, owing to patterned insulation layer 114 has formed on grid 112 and the storage electrode 113, thereby the alternative minimizing of the thickness of second insulating barrier 115, with the light transmission of increase thin-film transistor array base-plate 110, and then the light transmission of the display floater 100 of increase Fig. 2.
Like Fig. 3 H, Fig. 3 I and shown in Figure 4, then, form semiconductor layer 116 on second insulating barrier 115 and patterned insulation layer 114 (step 307).Wherein, semiconductor layer 116 for example is made by amorphous silicon (a-Si) or polysilicon.Then; Form source electrode 117a and drain 117b on each semiconductor layer 116 (step 308); And expose portion semiconductor layer 116 forms a channel region 106 on each semiconductor layer 116; Thereby form thin-film transistor 107 on substrate 111, wherein source electrode 117a is the both sides that lay respectively at channel region 106 with drain electrode 117b.At this moment; Can be pre-formed conductive material layer (not illustrating) on semiconductor layer 116; The material of conductive material layer for example is Mo, Cr, Ta, Ti or its alloy, then, and this conductive material layer of patterning; To define source electrode 117a and drain electrode 117b, and expose portion semiconductor layer 116 forms channel region 106.
Like Fig. 3 J and shown in Figure 4, then, form protective layer 118 on channel region 106, source electrode 117a, drain electrode 117b and second insulating barrier 115 (step 309), wherein protective layer 118 has the hole of connecing 118a, meets hole 118a and can expose part drain electrode 117b.At this moment; Can form printing opacity insulation material layer (not illustrating) earlier on channel region 106, source electrode 117a, drain electrode 117b and second insulating barrier 115; The material of printing opacity insulation material layer for example is silicon nitride or silica, then, and this printing opacity insulation material layer of patterning; Meet hole 118a with formation, thereby form protective layer 118.
Like Fig. 3 K and shown in Figure 4; Then; Form transparent electrode layer 119 on protective layer 118 (step 310); And can be electrically connected at drain electrode 117b via the hole 118a that connects of protective layer 118, wherein can form storage capacitors 108 between transparent electrode layer 119 and the storage electrode 113, thereby form the thin-film transistor array base-plate 110 (display base plate) of present embodiment.At this moment; Can form printing opacity conductive material layer (not illustrating) earlier on protective layer 118, the material of printing opacity conductive material layer for example is ITO, IZO, AZO, GZO, TCO or ZnO, then; This printing opacity conductive material layer of patterning; To form transparent electrode layer 119,, thereby can be electrically connected at drain electrode 117b because transparent electrode layer 119 is to be covered in to connect on the 118a of hole.
Embodiment by the invention described above can know; The manufacturing approach of copper electrode structure of the present invention can be applicable in thin-film transistor, display base plate (like thin-film transistor array base-plate) and display floater and the manufacturing approach; And patterned insulation layer capable of using protects copper electrode, to guarantee the processing procedure quality and the yield of copper electrode.And utilize the display base plate of method manufacturing of the present invention and the thickness that display floater can reduce the insulating barrier under the transparent electrode layer, thereby can guarantee light transmittance.
In sum; Though the present invention with preferred embodiment openly as above; Right its is not in order to limit the present invention, to have common knowledge the knowledgeable in the technical field under the present invention, not break away from the spirit and scope of the present invention; When can doing various changes and retouching, so protection scope of the present invention is as the criterion when looking the aforesaid right requirement person of defining.
Claims (15)
1. the manufacturing approach of a copper electrode structure comprises:
One substrate is provided;
Form a copper-containing metal layer and one first insulating barrier in regular turn on this substrate;
Form a patterning photoresist layer on this first insulating barrier;
Utilize one to contain oxygen plasma and carry out etching; To remove this first insulating barrier that is not covered by this patterning photoresist layer; And form the copper monoxide layer on this substrate, and form a patterned insulation layer and this copper electrode structure, this patterned insulation layer is to be positioned on this copper electrode structure; And
Remove this patterning photoresist layer and this copper oxide.
2. manufacturing approach as claimed in claim 1 is characterized in that, the material of this copper-containing metal layer is copper or copper alloy.
3. manufacturing approach as claimed in claim 1, wherein the material of this first insulating barrier is oxide, silica, silicon nitride, silicon oxynitride, dielectric materials or above-mentioned combination in any.
4. manufacturing approach as claimed in claim 1, wherein this copper electrode structure is a grid or a storage electrode of a thin-film transistor.
5. manufacturing approach as claimed in claim 1 is characterized in that, this patterning photoresist layer utilizes a photoresistance stripper to peel off with this copper oxide.
6. method of manufacturing thin film transistor comprises:
One substrate is provided;
Form a copper-containing metal layer and one first insulating barrier in regular turn on this substrate;
Form a patterning photoresist layer on this first insulating barrier;
Utilize one to contain oxygen plasma and carry out etching; To remove this first insulating barrier that is not covered by this patterning photoresist layer; And form the copper monoxide layer on this substrate, and form a patterned insulation layer and a grid, this patterned insulation layer is to be positioned on this grid;
Remove this patterning photoresist layer and this copper oxide;
Form one second insulating barrier on this patterned insulation layer;
Form semi-conductor layer on this second insulating barrier and this patterned insulation layer; And
Form an one source pole and a drain electrode, and this semiconductor layer of expose portion forms a channel region, wherein this source electrode is respectively the both sides that are positioned at this channel region with this drain electrode.
7. manufacturing approach as claimed in claim 6 is characterized in that, the material of this first insulating barrier and/or second insulating barrier is oxide, silica, silicon nitride, silicon oxynitride, dielectric materials or above-mentioned combination in any.
8. the manufacturing approach of a display base plate comprises:
One substrate is provided;
Form a copper-containing metal layer and one first insulating barrier in regular turn on this substrate;
Form a patterning photoresist layer on this first insulating barrier, and expose this first insulating barrier of part;
Utilize one to contain oxygen plasma and carry out etching; To remove this first insulating barrier that is not covered by this patterning photoresist layer; And form the copper monoxide layer on this substrate, and form a patterned insulation layer and a plurality of grid, this patterned insulation layer is to be positioned on those grids;
Remove this patterning photoresist layer and this copper oxide;
Form one second insulating barrier on this patterned insulation layer;
Form a plurality of semiconductor layers on this second insulating barrier and this patterned insulation layer;
Form one source pole and and drain on each those semiconductor layer, and those semiconductor layers of expose portion form a channel region on each those semiconductor layer respectively, wherein this source electrode is respectively the both sides that are positioned at this channel region with this drain electrode;
Form a protective layer on those channel regions, those source electrodes, those drain electrodes and this second insulating barrier, wherein this protective layer has a plurality of holes that connect; And
Form a transparent electrode layer on this protective layer, and utilize this protective layer those connect the hole and be electrically connected at those drain electrodes.
9. manufacturing approach as claimed in claim 8 is characterized in that, the material of this first insulating barrier and/or this second insulating barrier is oxide, silica, silicon nitride, silicon oxynitride, dielectric materials or above-mentioned combination in any.
10. manufacturing approach as claimed in claim 8 is characterized in that, carries out in the etched step, more forms a plurality of storage electrodes utilizing this to contain oxygen plasma, and this patterned insulation layer is to be positioned on those grids and those storage electrodes.
11. a thin-film transistor comprises:
One substrate;
One grid is formed on this substrate;
One patterned insulation layer is formed on this grid, it is characterized in that, the area of this patterned insulation layer and shape are area and the shapes that is same as this grid;
One second insulating barrier is formed on this patterned insulation layer;
Semi-conductor layer is formed at this second insulating barrier, and is positioned on this patterned insulation layer; And
An one source pole and a drain electrode be formed on this semiconductor layer, and this semiconductor layer of expose portion form a channel region, and wherein this source electrode is respectively the both sides that are positioned at this channel region with this drain electrode.
12. thin-film transistor as claimed in claim 11, the material of this grid are copper or copper alloy, the material of this patterned insulation layer and/or this second insulating barrier is oxide, silica, silicon nitride, silicon oxynitride, dielectric materials or above-mentioned combination in any.
13. a display base plate is characterized in that, comprises:
One substrate;
The plurality of films transistor, wherein each thin-film transistor comprises:
One grid is formed on this substrate;
One patterned insulation layer is formed on this grid, and wherein the area of this patterned insulation layer and shape are area and the shapes that is same as this grid;
One second insulating barrier is formed on this patterned insulation layer;
Semi-conductor layer is formed at this second insulating barrier, and is positioned on this patterned insulation layer; And
An one source pole and a drain electrode be formed on this semiconductor layer, and this semiconductor layer of expose portion form a channel region, and wherein this source electrode is respectively the both sides that are positioned at this channel region with this drain electrode;
One protective layer is formed on those thin-film transistors, and wherein this protective layer has a plurality of holes that connect, and it exposes those drain electrodes of part; And
One transparent electrode layer is formed on this protective layer, and connects the hole via those of this protective layer and be electrically connected at those drain electrodes.
14. display base plate as claimed in claim 13 also comprises:
A plurality of storage electrodes are formed on this substrate, and this patterned insulation layer more is formed on those storage electrodes, and the area of this patterned insulation layer on those storage electrodes and shape are area and the shapes that is same as those storage electrodes.
15. a display panels comprises:
One colored filter substrate;
One thin-film transistor array base-plate comprises:
One substrate;
The plurality of films transistor, wherein each thin-film transistor comprises:
One grid is formed on this substrate;
One patterned insulation layer is formed on this grid, and wherein the area of this patterned insulation layer and shape are area and the shapes that is same as this canopy utmost point;
One second insulating barrier is formed on this patterned insulation layer;
Semi-conductor layer is formed at this second insulating barrier, and is positioned on this patterned insulation layer; And
An one source pole and a drain electrode be formed on this semiconductor layer, and this semiconductor layer of expose portion form a channel region, and wherein this source electrode is respectively the both sides that are positioned at this channel region with this drain electrode;
One protective layer is formed on those thin-film transistors, and wherein this protective layer has a plurality of holes that connect, and it exposes those drain electrodes of part; And
One transparent electrode layer is formed on this protective layer, and connects the hole via those of this protective layer and be electrically connected at those drain electrodes; And
One liquid crystal layer is formed between this colored filter substrate and this thin-film transistor array base-plate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200910146910XA CN101908478B (en) | 2009-06-05 | 2009-06-05 | Manufacturing method of copper electrode structure and application thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200910146910XA CN101908478B (en) | 2009-06-05 | 2009-06-05 | Manufacturing method of copper electrode structure and application thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101908478A CN101908478A (en) | 2010-12-08 |
| CN101908478B true CN101908478B (en) | 2012-01-18 |
Family
ID=43263899
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200910146910XA Expired - Fee Related CN101908478B (en) | 2009-06-05 | 2009-06-05 | Manufacturing method of copper electrode structure and application thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101908478B (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102324388B (en) * | 2011-09-01 | 2017-02-08 | 上海华虹宏力半导体制造有限公司 | Method for forming photoresistance layer |
| CN102411462B (en) * | 2011-11-18 | 2014-07-16 | 华映视讯（吴江）有限公司 | Manufacturing method for touch panel |
| CN103164056A (en) * | 2011-12-08 | 2013-06-19 | 群康科技(深圳)有限公司 | Touch control panel, formation method thereof and display system |
| KR102243747B1 (en) * | 2014-08-13 | 2021-04-23 | 주식회사 동진쎄미켐 | Manufacturing method of transparent electrod and transparent electrod laminate |
| CN105467499A (en) | 2016-01-15 | 2016-04-06 | 京东方科技集团股份有限公司 | Metal wire grating polaroid and manufacturing method thereof, display panel and display device |
| CN110112100A (en) * | 2019-04-24 | 2019-08-09 | 深圳市华星光电技术有限公司 | Preparation method, luminescent panel and the display device of luminescent panel |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1728351A (en) * | 2004-07-28 | 2006-02-01 | 中华映管股份有限公司 | Method for producing thin film trasistor |
-
2009
- 2009-06-05 CN CN200910146910XA patent/CN101908478B/en not_active Expired - Fee Related
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1728351A (en) * | 2004-07-28 | 2006-02-01 | 中华映管股份有限公司 | Method for producing thin film trasistor |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101908478A (en) | 2010-12-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10013124B2 (en) | Array substrate, touch screen, touch display device, and fabrication method thereof | |
| CN1728363B (en) | Thin film transistor array panel and manufacturing method thereof | |
| CN101552242B (en) | Thin film transistor array panel and method for manufacturing the same | |
| CN106972025B (en) | Thin-film transistor array base-plate | |
| CN110462830B (en) | Display substrate, preparation method thereof, display panel and display device | |
| CN101908478B (en) | Manufacturing method of copper electrode structure and application thereof | |
| CN103413820A (en) | Flexible display panel and manufacturing method thereof | |
| CN102593126B (en) | Panel and manufacturing method thereof | |
| CN103681690A (en) | Thin film transistor substrate and method of manufacturing the same | |
| CN103236419B (en) | Preparation method of array substrate, array substrate and display device | |
| KR20100075026A (en) | Thin film transistor array substrate and method of fabricating the same | |
| CN103227148B (en) | A kind of array base palte preparation method and array base palte and display unit | |
| CN104201152A (en) | Method for manufacturing display panel | |
| KR100437820B1 (en) | A composition substrate of an electric appliance using copper as a wiring layer and using a complex oxidant which is mainly comprised of an indium oxidation layer and a metal oxidant as a transparent conductiue layer and an electric appliance using the same | |
| CN104218019A (en) | Thin film transistor array substrate and method of manufacturing the same | |
| CN1897248A (en) | Method for forming contact hole and method for fabricating thin film transistor plate using the same | |
| KR20100005457A (en) | Thin film transistor substrate and method for fabricating the same | |
| CN104620389A (en) | Semiconductor device and method for manufacturing same | |
| CN103531640A (en) | Thin film transistor, array substrate, manufacturing method of array substrate and display device | |
| CN103413834B (en) | A kind of thin-film transistor and preparation method thereof, array base palte and display unit | |
| CN100429765C (en) | An array substrate of thin-film transistor and its manufacture method | |
| CN208622722U (en) | ESD protection circuit and display device | |
| CN101807552B (en) | Production method of semi-transmission type TFT array substrate | |
| CN103021942B (en) | Array base palte and manufacture method, display unit | |
| CN101388413B (en) | Thin-film transistor, manufacturing method thereof and liquid crystal display panel |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120118 Termination date: 20170605 |