CN101895288B - Method and device for compatibly receiving and sending E12 signal and T12 signal - Google Patents
Method and device for compatibly receiving and sending E12 signal and T12 signal Download PDFInfo
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- CN101895288B CN101895288B CN 201010191423 CN201010191423A CN101895288B CN 101895288 B CN101895288 B CN 101895288B CN 201010191423 CN201010191423 CN 201010191423 CN 201010191423 A CN201010191423 A CN 201010191423A CN 101895288 B CN101895288 B CN 101895288B
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Abstract
The invention discloses a method for compatibly receiving an E12 signal and a T12 signal. The method comprises the following steps of: receiving a clock signal by a receiving module; when the clock signal is an E12 clock signal, converting three levels of the E12 clock signal into two analog signals of a high level and a low level through a full-wave rectification polarity inversion circuit; converting the high level and the low level into a PCM (Pulse Code Modulation) signal by a multi-path difference single-end drive; recovering a digital clock of which the frequency is 2MHz from the PCM signal by a PCM signal circuit; and converting a T12 clock signal into the digital clock of which the frequency is 2MHz through the multi-path difference single-end drive. The invention also provides a corresponding sending method and a corresponding device. In the invention, a digital integrated chip technology is adopted to finish the compatibility of the E12 signal and the T12 signal, which shortens the switching time of the E12 signal and the T12 signal, overcomes the defects of low efficiency and easy error which are brought by wire jumpers of manual operations, avoids the limit of the switching number of times of a relay when the relay is used and improves the reliability of products.
Description
Technical field
The present invention relates to the signal transmission technology field, specially refer to the compatible reception of a kind of E12 and T12 and sending method and device.
Background technology
In SDH and the wdm system, external clock reference often adopts the 2M clock, and according to the requirement of International Telecommunications Union (ITU-T) suggestion, the external clock of 2M need provide the signal of two kinds of distinct interfaces: 2048kbit/s interface (E12) and 2048kHz interface (T12).The method that realizes these two kinds of interface compatibilities at present is to adopt manual wire jumper or adopt relay to switch at every pair of 2M transmission line.
Be example with the input and output of a pair of 2M signal, the method for existing E12 and T12 compatibility is described.In conjunction with Fig. 1, adopt wire jumper to realize the circuit diagram of E12 and T12 compatibility.2M clock receive direction, 2M differential signal INPUT+ and the INPUT-of input select with wire jumper respectively: when the 2M external clock is 2048kbit/s code signal (E12), 101,102 wire jumpers that close disconnect 103,104 wire jumpers, and the 2048kbit/s treatment circuit extracts the digital level clock.When the 2M external clock was 2048kHz signal (T12), 103,104 wire jumpers that close disconnected 101,102 wire jumpers, and the 2048kHz treatment circuit is finished level conversion and recovered the digital level clock.2M clock sending direction, 2M differential signal OUTPUT+ and the OUTPUT-of output select with wire jumper respectively: when the 2M external clock is 2048kbit/s code signal (E12), 105,106 wire jumpers close, disconnect 107,108 wire jumpers, the 2048kbit/s treatment circuit is finished coding and the transmission of digital level clock.When the 2M external clock was 2048kHz signal (T12), 107,108 wire jumpers that close disconnected 105,106 wire jumpers, and the 2048kHz treatment circuit converts the digital level clock signal to analog difference signal.
In conjunction with Fig. 2, realize the circuit diagram of E12 and T12 compatibility for adopting relay, 2M clock receive direction, 2M differential signal INPUT+ and the INPUT-of input select with relay respectively: when the 2M external clock is 2048kbit/s code signal (E12), software control 109,110 relays are opened, and the 2048kbit/s treatment circuit extracts the digital level clock.When the 2M external clock was 2048kHz signal (T12), software control 109,110 relays were shut, and the 2048kHz treatment circuit is finished level conversion and recovered the digital level clock.2M clock sending direction, 2M differential signal OUTPUT+ and the OUTPUT-of output select with relay respectively: when the 2M external clock is 2048kbit/s code signal (E12), control 111,112 relays are opened, and the 2048kbit/s treatment circuit is finished coding and the transmission of digital level clock.When the 2M external clock was 2048kHz signal (T12), software control 111,112 relays were shut, and the 2048kHz treatment circuit converts the digital level clock to analog difference signal.
In specific implementation process, the present inventor finds that the method for employing wire jumper is finished the manually setting of change wire jumper of switching of E12 and T12, uses inconvenience.Adopt the method for relay, the relay switch number of times is limited, and switch too frequently will shorten the relay life-span, and relay dies down the anti-overvoltage capabilities of product before being placed on anti-overvoltage crowbar, has therefore influenced properties of product.
Summary of the invention
Main purpose of the present invention is for providing the reception of using analog circuit and digital integrated chip to finish E12 clock signal and T12 clock signal, the method of control figure integrated chip output E12 clock signal or T12 clock signal, thereby reception and sending method and the device of realization E12 and T12 compatibility.
The present invention proposes a kind of E12 and the compatible method of reseptance of T12, comprising:
Receiver module receive clock signal;
When the clock signal is the E12 clock signal, by the full-wave rectification polarity transformation circuits three kinds of level conversion of E12 clock signal are become high level and two kinds of analog signals of low level;
It is the PCM signal with high level and low transition that the multichannel difference is changeed single-ended driver;
The PCM signal circuit recovers the dagital clock signal that frequency is 2MHz from the PCM signal.
Further, also comprise behind the receiver module receive clock signal:
When the clock signal was the T12 clock signal, the multichannel difference was changeed single-ended driver the T12 clock signal is converted to the dagital clock signal that frequency is 2MHz.
Further, when the clock signal is the E12 clock signal, become high level and two kinds of analog signals of low level to be specially three kinds of level conversion of E12 clock signal by the full-wave rectification polarity transformation circuits:
When the clock signal was the E12 clock signal, the full-wave rectification polarity transformation circuits was high level with 1 level of E12 clock signal and-1 level conversion, was low level with 0 level conversion of E12 clock signal.
Further, multichannel difference commentaries on classics single-ended driver comprises high level and low transition for the PCM signal:
The first via differential received anode that the multichannel difference is changeed single-ended driver receives high level, and first via differential received negative terminal receives low level;
The second tunnel differential received anode that the multichannel difference is changeed single-ended driver receives low level, and the second tunnel differential received negative terminal receives high level;
The multichannel difference is changeed single-ended driver high level is converted to digital level PCM+, is digital level PCM-with low transition.
The present invention also proposes a kind of E12 and the compatible sending method of T12, comprising:
Judging needs the tranmitting data register signal mode;
When the clock signal was the E12 clock signal, the control three-state driver opened the E12 Enable Pin and cuts out the T12 Enable Pin; Three-state driver sends the E12 clock signal by the output amplitude regulating circuit;
When the clock signal was the T12 clock signal, the control three-state driver opened the T12 Enable Pin and cuts out the E12 Enable Pin;
Three-state driver sends the T12 clock signal by block isolating circuit.
Further, judge and need be specially by the tranmitting data register signal mode:
Judge it is the interface shape of E12 or T12 according to the input interface of need tranmitting data register signal;
When the input interface of need tranmitting data register signal is the E12 interface shape, judge that needing the tranmitting data register signal is the E12 clock signal;
When the input interface of need tranmitting data register signal is the T12 interface shape, judge that needing the tranmitting data register signal is the T12 clock signal.
The present invention also proposes a kind of E12 and the compatible receiving system of T12, comprising:
Receiver module is used for the receive clock signal;
The full-wave rectification polarity transformation circuits is used for when the clock signal is the E12 clock signal, and translation circuit becomes high level and two kinds of analog signals of low level with three kinds of level conversion of E12 clock signal;
The multichannel difference is changeed single-ended driver, and being used for high level and low transition is the PCM signal;
The PCM signal circuit is used for recovering the dagital clock signal that frequency is 2MHz from the PCM signal.
Further, the multichannel difference is changeed single-ended driver also for when the clock signal is the T12 clock signal, and the T12 clock signal is converted to the dagital clock signal that frequency is 2MHz.
Further, the full-wave rectification polarity transformation circuits specifically is used for when the clock signal is the E12 clock signal, is high level with 1 level and-1 level conversion of E12 clock signal, is low level with 0 level conversion of E12 clock signal.
Further, multichannel difference commentaries on classics single-ended driver comprises:
First via differential received anode is used for receiving high level;
First via differential received negative terminal is used for receiving low level;
The second tunnel differential received anode is used for receiving low level;
The second tunnel differential received negative terminal is used for receiving high level;
Modular converter is used for high level is converted to digital level PCM+, is digital level PCM-with low transition
The present invention also proposes a kind of E12 and the compatible dispensing device of T12, comprises judge module, control module, three-state driver, output amplitude regulating circuit and block isolating circuit:
Judge module, being used for judgement needs the tranmitting data register signal mode;
Control module is used for when the clock signal is the E12 clock signal, and the control three-state driver opens the E12 Enable Pin and cuts out the T12 Enable Pin; When the clock signal was the T12 clock signal, the control three-state driver opened the T12 Enable Pin and cuts out the E12 Enable Pin;
Three-state driver is used for sending the E12 clock signal by the output amplitude regulating circuit when the E12 Enable Pin is opened; When the T12 Enable Pin is opened, send the T12 clock signal by block isolating circuit.
Further, judge module specifically is used for:
Judge it is the interface shape of E12 or T12 according to the input interface of need tranmitting data register signal; When the input interface judgement of need tranmitting data register signal is the E12 interface shape, judge that needing the tranmitting data register signal be the E12 clock signal; When the input interface judgement of need tranmitting data register signal is the T12 interface shape, judge that needing the tranmitting data register signal be the T12 clock signal.
The present invention adopts digital integrated chip technology to finish E12 and T12 compatibility, shortened E12 and T12 switching time, has overcome the drawback that the efficient that the manual operation wire jumper brings is low, easily make mistakes.Limited by the relay switch number of times, improved reliability of products.
Description of drawings
Fig. 1 realizes E12 and the compatible circuit diagram that receives of T12 for prior art adopts wire jumper;
Fig. 2 realizes E12 and the compatible circuit diagram that sends of T12 for prior art adopts wire jumper;
Fig. 3 realizes E12 and the compatible circuit diagram that receives of T12 for prior art adopts relay;
Fig. 4 realizes E12 and the compatible circuit diagram that sends of T12 for prior art adopts relay
Fig. 5 is the flow chart of an embodiment of a kind of E12 of the present invention and the compatible method of reseptance of T12;
Fig. 6 is the flow chart of an embodiment of a kind of E12 of the present invention and the compatible sending method of T12;
Fig. 7 is the structural representation of an embodiment of a kind of E12 of the present invention and the compatible receiving system of T12;
Fig. 8 is the structural representation of an embodiment of a kind of E12 of the present invention and the compatible dispensing device of T12.
The realization of the object of the invention, functional characteristics and advantage will be in conjunction with the embodiments, are described further with reference to accompanying drawing.
Embodiment
Should be appreciated that specific embodiment described herein only in order to explaining the present invention, and be not used in restriction the present invention.
With reference to Fig. 5, be the flow chart of an embodiment of the compatible method of reseptance of a kind of E12 of the present invention and T12;
Step S101, receive clock signal;
Receiver module receives the clock signal that the opposite end sends.
The pattern of step S102, judgement clock signal;
Receiver module judges that through impedance matching clock signal is T12 clock signal or E12 clock signal after receiving clock signal.When being the E12 clock signal, the clock signal enters step S103; When being the T12 clock signal, the clock signal enters step S106.
Step S103, full-wave rectification polarity transformation circuits become high level and two kinds of analog signals of low level with three kinds of level conversion of E12 clock signal;
When the clock signal was the E12 clock signal, the E12 clock signal was connected to full-wave rectification change in polarity circuit after by protective circuit, and the full-wave rectification polarity transformation circuits becomes high level and two kinds of analog signals of low level with three kinds of level conversion of E12 clock signal.
Concrete, when the clock signal was the E12 clock signal, the full-wave rectification polarity transformation circuits was high level with 1 level and-1 level conversion of E12 clock signal, was low level with 0 level conversion of E12 clock signal.
The 2M differential signal INPUT+ of input and INPUT-are at pcb board upper bifurcation cabling; one road 2M analog differential clock line is through impedance matching; after the protective circuit, by the three kind level analog signals of full-wave rectification polarity transformation circuits with 2048kbit/s coding: " 1 ", " 0 ", " 1 " convert the analog signal of high level and two kinds of level of low level to.The multichannel difference is changeed the analog signal of the first via differential received anode reception high level of single-ended driver, first via differential received negative terminal receives low-level analog signals, the level"1" of 2048kbit/s coding converts high level to through the full-wave rectification polarity transformation circuits, be sent to first via differential received anode, change single-ended driver by the multichannel difference and change into digital level PCM (+).The second tunnel differential received anode that the multichannel difference is changeed single-ended driver receives low level analog signal, the second tunnel differential received negative terminal receives the analog signal of high level, " 1 " level of 2048kbit/s coding converts high level to through the full-wave rectification polarity transformation circuits, be sent to the second tunnel differential received negative terminal, change single-ended driver through the multichannel difference and change into digital level PCM (-), the function of full-wave rectification polarity transformation circuits can be by being with centre tapped transformer and diode to realize.
It is the PCM signal with high level and low transition that step S104, multichannel difference are changeed single-ended driver;
The first via differential received anode that the multichannel difference is changeed single-ended driver receives high level, and first via differential received negative terminal receives low level;
The second tunnel differential received anode that the multichannel difference is changeed single-ended driver receives low level, and the second tunnel differential received negative terminal receives high level;
The multichannel difference is changeed single-ended driver high level is converted to digital level PCM (+), is digital level PCM (-) with low transition.
Step S105, PCM signal circuit recover the dagital clock signal that frequency is 2MHz from the PCM signal.
The PCM signal circuit is finished decoding and recovered clock function for handling the 2048kbit/s interface chip of digital pcm signal capabilities.
Step S106, when the clock signal is the T12 clock signal, the multichannel difference is changeed single-ended driver the T12 clock signal is converted to the dagital clock signal that frequency is 2MHz.
When clock signal impedance coupling; after being judged as the T12 clock signal; connect the multichannel difference through protective circuit and change single-ended driver; because the external clock analog signal of 2048kHz form has only two kinds of level; and voltage conforms multichannel difference is changeed the input voltage requirement of single-ended driver; so the multichannel difference is changeed the high level that single-ended driver Third Road differential received anode receives the 2048kHz external clock; Third Road differential received negative terminal receives the low level of 2048kHz external clock, changes single-ended driver through the multichannel difference and changes into the 2048kHz digital dock.
The embodiment of the invention adopts digital integrated chip technology to finish that E12 and T12 are compatible to be received, shortened E12 and T12 switching time, has overcome the drawback that the efficient that the manual operation wire jumper brings is low, easily make mistakes.Limited by the relay switch number of times, improved reliability of products.
Consult Fig. 6, be the flow chart of an embodiment of the compatible sending method of a kind of E12 of the present invention and T12.
Step S201, judgement need the tranmitting data register signal mode;
Judge it is the interface shape of E12 or T12 according to the input interface of need tranmitting data register signal;
When the input interface of need tranmitting data register signal is the E12 interface shape, judge that needing the tranmitting data register signal is the E12 clock signal;
When the input interface of need tranmitting data register signal is the T12 interface shape, judge that needing the tranmitting data register signal is the T12 clock signal.
Step S202, open corresponding Enable Pin according to pattern clock signal;
When the clock signal was the E12 clock signal, the control three-state driver opened the E12 Enable Pin and cuts out the T12 Enable Pin;
When the clock signal was the T12 clock signal, the control three-state driver opened the T12 Enable Pin and cuts out the E12 Enable Pin.
Step S203, tranmitting data register signal.
When the E12 Enable Pin was opened, three-state driver sent the E12 clock signal by the output amplitude regulating circuit;
When the T12 Enable Pin was opened, three-state driver sent the T12 clock signal by block isolating circuit.
Be E12 or the interface shape of T12 according to current input interface, two E12 Enable Pins of control three-state driver and T12 Enable Pin.When input interface was E12, software was opened the E12 Enable Pin, closed the T12 Enable Pin, after 2048kbit/s encoded clock process output amplitude regulating circuit and the protective circuit, was sent to the outside at this moment.When input interface was T12, software was opened the T12 Enable Pin, closed the E12 Enable Pin, after 2048kHz form clock process block isolating circuit and the protective circuit, was sent to the outside at this moment.This method can be turn-offed the clock output of E12 and two kinds of interface shapes of T12 respectively.
The embodiment of the invention adopts digital integrated chip technology to finish that E12 and T12 are compatible to be sent, shortened E12 and T12 switching time, has overcome the drawback that the efficient that the manual operation wire jumper brings is low, easily make mistakes.Limited by the relay switch number of times, improved reliability of products.
Consult Fig. 7, be the structural representation of an embodiment of the compatible receiving system of a kind of E12 of the present invention and T12.
The device that the embodiment of the invention proposes comprises:
Full-wave rectification polarity transformation circuits 32 is used for when the clock signal is the E12 clock signal, and three kinds of level conversion of E12 clock signal are become high level and two kinds of analog signals of low level;
The multichannel difference is changeed single-ended driver 33, and being used for high level and low transition is the PCM signal;
Further, the multichannel difference is changeed single-ended driver 33 also for when the clock signal is the T12 clock signal, and the T12 clock signal is converted to the dagital clock signal that frequency is 2MHz.
Further, full-wave rectification polarity transformation circuits 32 is concrete to be used for when the clock signal is the E12 clock signal, is high level with 1 level and-1 level conversion of E12 clock signal, is low level with 0 level conversion of E12 clock signal.
Further, multichannel difference commentaries on classics single-ended driver 33 comprises:
First via differential received anode 331 is used for receiving high level;
First via differential received negative terminal 332 is used for receiving low level;
The second tunnel differential received anode 333 is used for receiving low level;
The second tunnel differential received negative terminal 334 is used for receiving high level;
The 2M differential signal INPUT+ of input and INPUT-are at pcb board upper bifurcation cabling; one road 2M analog differential clock line is through impedance matching; after the protective circuit, by the three kind level analog signals of full-wave rectification polarity transformation circuits 32 with 2048kbit/s coding: " 1 ", " 0 ", " 1 " convert the analog signal of high level and two kinds of level of low level to.The multichannel difference is changeed the analog signal of the first via differential received anode 331 reception high level of single-ended driver 33, first via differential received negative terminal 332 receives low-level analog signals, the level"1" of 2048kbit/s coding converts high level to through full-wave rectification polarity transformation circuits 32, be sent to first via differential received anode 331, change single-ended driver 33 by the multichannel difference and change into digital level PCM (+).The second tunnel differential received anode 333 that the multichannel difference is changeed single-ended driver 33 receives low level analog signal, the second tunnel differential received negative terminal 334 receives the analog signal of high level, " 1 " level of 2048kbit/s coding converts high level to through full-wave rectification polarity transformation circuits 32, be sent to the second tunnel differential received negative terminal 334, change single-ended driver 33 through the multichannel difference and change into digital level PCM (-), the function of full-wave rectification polarity transformation circuits 32 can be by being with centre tapped transformer and diode to realize.
Consult Fig. 8, be the structural representation of an embodiment of the compatible dispensing device of a kind of E12 of the present invention and T12.
The device that the embodiment of the invention proposes comprises judge module 41, control module 42, three-state driver 43, output amplitude regulating circuit 44 and block isolating circuit 45;
Three-state driver 43 is used for when the E12 Enable Pin is opened, and sends the E12 clock signal by output amplitude regulating circuit 44; When the T12 Enable Pin is opened, send the T12 clock signal by block isolating circuit 45.
Further, judge module 41 specifically is used for:
Judge it is the interface shape of E12 or T12 according to the input interface of need tranmitting data register signal; When the input interface of need tranmitting data register signal is the E12 interface shape, judge that needing the tranmitting data register signal is the E12 clock signal; When the input interface of need tranmitting data register signal is the T12 interface shape, judge that needing the tranmitting data register signal is the T12 clock signal.
Be E12 or the interface shape of T12 according to current input interface, two E12 Enable Pins of control module 42 control three-state drivers 43 and T12 Enable Pin.When input interface was E12, software was opened the E12 Enable Pin, closed the T12 Enable Pin, after 2048kbit/s encoded clock process output amplitude regulating circuit 44 and the protective circuit, was sent to the outside at this moment.When input interface was T12, software was opened the T12 Enable Pin, closed the E12 Enable Pin, after 2048kHz form clock process block isolating circuit 45 and the protective circuit, was sent to the outside at this moment.
Output amplitude regulating circuit 44 is regulated the voltage amplitude of 2048kbit/s coding tranmitting data register, realizes 2048kbit/s external clock waveform shaping function.
Block isolating circuit 45 is removed the DC biased level of 2048kHz signal (T12).
The above only is the preferred embodiments of the present invention; be not so limit claim of the present invention; every equivalent structure or equivalent flow process conversion that utilizes specification of the present invention and accompanying drawing content to do; or directly or indirectly be used in other relevant technical fields, all in like manner be included in the scope of patent protection of the present invention.
Claims (10)
1. the compatible method of reseptance of an E12 and T12 is characterized in that, comprising:
Receiver module receive clock signal;
Judge the pattern of clock signal;
When described clock signal is the E12 clock signal, by the full-wave rectification polarity transformation circuits three kinds of level conversion of described E12 clock signal are become high level and two kinds of analog signals of low level;
It is the PCM signal with described high level and low transition that the multichannel difference is changeed single-ended driver;
The PCM signal circuit recovers the dagital clock signal that frequency is 2MHz from described PCM signal
When described clock signal was the T12 clock signal, described multichannel difference was changeed single-ended driver described T12 clock signal is converted to the dagital clock signal that frequency is 2MHz.
2. method according to claim 1 is characterized in that, and is described when the clock signal is the E12 clock signal, becomes high level and two kinds of analog signals of low level to be specially three kinds of level conversion of E12 clock signal by the full-wave rectification polarity transformation circuits:
When described clock signal was the E12 clock signal, described full-wave rectification polarity transformation circuits was high level with 1 level of described E12 clock signal and-1 level conversion, was low level with 0 level conversion of described E12 clock signal.
3. method according to claim 1 and 2 is characterized in that, described multichannel difference is changeed single-ended driver described high level and low transition are comprised for the PCM signal:
The first via differential received anode that described multichannel difference is changeed single-ended driver receives described high level, and first via differential received negative terminal receives low level;
The second tunnel differential received anode that described multichannel difference is changeed single-ended driver receives described low level, and the second tunnel differential received negative terminal receives described high level;
Described multichannel difference is changeed single-ended driver described high level is converted to digital level PCM+, is digital level PCM-with described low transition.
4. the compatible sending method of an E12 and T12 is characterized in that, comprising:
Judging needs the tranmitting data register signal mode;
When described clock signal was the clock signal of E12 interface shape, the control three-state driver opened the E12 Enable Pin and cuts out the T12 Enable Pin; Described three-state driver sends the clock signal of described E12 interface shape by the output amplitude regulating circuit;
When described clock signal is the clock signal of T12 interface shape, controls described three-state driver and open the T12 Enable Pin and close the E12 Enable Pin; Described three-state driver sends the clock signal of described T12 interface shape by block isolating circuit.
5. method according to claim 4 is characterized in that, described judgement needs the step of tranmitting data register signal mode to be specially:
Judge it is the interface shape of E12 or T12 according to the input interface of need tranmitting data register signal;
When the input interface of described need tranmitting data register signal is the E12 interface shape, judge that described need the tranmitting data register signal be the E12 clock signal;
When the input interface of described need tranmitting data register signal is the T12 interface shape, judge that described need the tranmitting data register signal be the T12 clock signal.
6. the compatible receiving system of an E12 and T12 is characterized in that, comprising:
Receiver module is used for the receive clock signal, and judges the pattern of clock signal;
The full-wave rectification polarity transformation circuits is used for when described clock signal is the E12 clock signal, and three kinds of level conversion of described E12 clock signal are become high level and two kinds of analog signals of low level;
The multichannel difference is changeed single-ended driver, and being used for described high level and low transition is the PCM signal;
The PCM signal circuit, being used for recovering frequency from described PCM signal is the 2MHz dagital clock signal;
Described multichannel difference is changeed single-ended driver and also is used for when described clock signal is the T12 clock signal, and it is the 2MHz dagital clock signal that described T12 clock signal is converted to frequency.
7. device according to claim 6, it is characterized in that, described full-wave rectification polarity transformation circuits specifically is used for when described clock signal is the E12 clock signal, being high level with 1 level of described E12 clock signal and-1 level conversion, is low level with 0 level conversion of described E12 clock signal.
8. according to claim 6 or 7 described devices, it is characterized in that described multichannel difference is changeed single-ended driver and comprised:
First via differential received anode is used for receiving described high level;
First via differential received negative terminal is used for receiving low level;
The second tunnel differential received anode is used for receiving described low level;
The second tunnel differential received negative terminal is used for receiving described high level;
Modular converter is used for described high level is converted to digital level PCM+, is digital level PCM-with described low transition.
9. the compatible dispensing device of an E12 and T12 is characterized in that, comprises judge module, control module, three-state driver, output amplitude regulating circuit and block isolating circuit;
Described judge module, being used for judgement needs the tranmitting data register signal mode;
Described control module is used for when described clock signal is the E12 clock signal, and the control three-state driver opens the E12 Enable Pin and cuts out the T12 Enable Pin; When described clock signal was the T12 clock signal, the control three-state driver opened the T12 Enable Pin and cuts out the E12 Enable Pin;
Described three-state driver is used for sending described E12 clock signal by the output amplitude regulating circuit when the E12 Enable Pin is opened; When the T12 Enable Pin is opened, send described T12 clock signal by block isolating circuit.
10. device according to claim 9 is characterized in that, described judge module specifically is used for:
Judge it is the interface shape of E12 or T12 according to the input interface of need tranmitting data register signal; When the input interface of described need tranmitting data register signal is the E12 interface shape, judge that described need the tranmitting data register signal be the E12 clock signal; When the input interface of described need tranmitting data register signal is the T12 interface shape, judge that described need the tranmitting data register signal be the T12 clock signal.
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| JPS6458125A (en) * | 1987-08-28 | 1989-03-06 | Matsushita Electric Ind Co Ltd | Digital analog converter |
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