CN101894910A - Nitride-oxide-silicon bipolar resistive random access memory based on non-stoichiometry ratio and preparation method thereof - Google Patents
Nitride-oxide-silicon bipolar resistive random access memory based on non-stoichiometry ratio and preparation method thereof Download PDFInfo
- Publication number
- CN101894910A CN101894910A CN 201010223393 CN201010223393A CN101894910A CN 101894910 A CN101894910 A CN 101894910A CN 201010223393 CN201010223393 CN 201010223393 CN 201010223393 A CN201010223393 A CN 201010223393A CN 101894910 A CN101894910 A CN 101894910A
- Authority
- CN
- China
- Prior art keywords
- sio
- silicon
- film
- resistive random
- prepare
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Abstract
The invention provides a bipolar resistive random access memory of a nitride-oxide-silicon (SiOxNy) resistive random material containing rich silicon based on non-stoichiometry ratio and a preparation method thereof, belonging to the technical field of super-large-scale integration. The resistive random access memory comprises a top electrode, a resistive random material layer, a bottom electrode and a substrate, wherein the resistive random material layer is the nitrogen oxide of silicon (SiOxNy), and x and y in the SiOxNy meet the conditions of (2x+3y)<4, x>=0, and y>=0; the bottom electrode is metal or a conducting material such as Cu, W, Pt and the like; and the top electrode is metal or a conducting material such as Ti, TiN, Al, AlCu and the like generating chemical reaction with the nitrogen oxide of silicon. In the invention, by controlling the components of the nitrogen oxide of silicon, the silicon content is relatively larger, and more defects, vacancies, such as nitrogen vacancy, oxygen vacancy and the like are introduced, thereby obtaining a stable bipolar device.
Description
Technical field
The invention belongs to the very large scale integration technology field, be specifically related to a kind of non-volatile type resistance-variable storing device, realize the purpose of data 0 and 1 storage by the change of resistance.
Background technology
Along with the integrated circuit technique node constantly advances, will face the technological challenge of can't geometric ratio dwindling based on the FLASH technology of traditional floating gate structure.Advantages such as the resistance-variable storing device (RRAM) based on MIM (Metal-Insulator-Metal) structure is simple in structure owing to it, be easy to prepare, size is little, integrated level is high, erasable speed is fast and low in energy consumption, have the potentiality that replace legacy memory, thereby enjoy the concern of academia and industrial quarters.Rely on the quantity of electric charge to come stored information 0 and 1 different with the FLASH of traditional floating gate structure, resistance-variable storing device utilizes it to cause at different electricity to occur high resistant under the condition respectively and low-resistance is come stored information " 0 " and " 1 ".
Resistance-variable storing device is divided into one pole resistance-variable storing device and bipolar resistive random memory.For the one pole resistance-variable storing device, when it was in high-impedance state, the direct voltage that is applied to its top electrode scanned cut-in voltage V from 0V
OnThe time, resistance can be undergone mutation, and is converted to low resistance state from original high-impedance state.But because tested resistance-variable storing device has been applied current limliting, so this memory resistance is in a numerical value, it is simultaneously not breakdown again to make that it just is in low resistance state.At this moment, resistance-variable storing device is in low resistance state, closes voltage V when the direct voltage that is applied to top electrode scans from 0V
OffThe time, the resistance of resistance-variable storing device can be undergone mutation again, gets back to high-impedance state from low resistance state.For the bipolar resistive random memory, when it was in high-impedance state, the direct voltage that is applied to its top electrode scanned cut-in voltage V from 0V
OnThe time, resistance can be undergone mutation, and is converted to low resistance state from original high-impedance state.But because tested resistance-variable storing device has been applied current limliting,, make that just to be in low resistance state simultaneously not breakdown again so this memory resistance is in a numerical value.When scanning from the 0V negative sense, the direct current scanning voltage that is applied to top electrode closes voltage V
OffThe time, resistance is undergone mutation, and gets back to high-impedance state again from low resistance state.One pole resistance-variable storing device and bipolar resistive random memory different mainly are to close voltage V
OffWith cut-in voltage V
OnThe polarity difference, one pole resistance-variable storing device cut-in voltage and close voltage and be all forward or be all negative sense, and bipolar resistive random memory cut-in voltage and to close polarity of voltage opposite.
At present, the research of the resistive material layer of resistance-variable storing device mainly concentrates on NiO, TiO
2, Al
2O
3, Ta
2O
5Deng transition metal oxide.This type of material substantially can with the CMOS process compatible, can show resistive characteristic preferably, still, relatively common process often needs to increase some processing steps.
Summary of the invention
The invention provides a kind of based on dosage non-chemically than the nitrogen-oxygen-silicon (SiO that promptly is rich in silicon
xN
y) the bipolar resistive random memory and preparation method thereof of resistive material.
Technical scheme of the present invention is as follows:
A kind of bipolar resistive random memory comprises top electrode, and resistive material layer, hearth electrode and substrate, resistive material layer are the nitrogen oxide (SiO of silicon
xN
y), described SiO
xN
yX, y satisfy condition: 0＜2x+3y＜4, x 〉=0, y 〉=0, described hearth electrode can be metal or other electric conducting material that the nitrogen oxide of Cu, W, Pt or other and silicon does not react under＜300 ℃ temperature, described top electrode can be the metal or the electric conducting material of the nitrogen oxide generation chemical reaction of Ti, TiN, Al, AlCu or other and silicon.
Described Si
xO
yN
zThickness be no more than 50nm.
A kind of preparation method of bipolar resistive random memory, it comprises the steps:
1) at the substrate preparation hearth electrode;
2) adopt the PECVD method, by adjusting N
2O and SiH
4Gas flow prepares SiO
xN
yFilm is as the resistive material layer; Perhaps other film plating process prepares SiO as ALD, PVD, MOCVD etc.
xN
yFilm; Perhaps prepare the Si film, mix O and N element, prepare SiO by ion injection or other doping method
xN
yFilm; Perhaps prepare Si
3N
4, mix Si by ion injection or other doping method and prepare SiN
yY＜4/3; Perhaps prepare Si
3N
4, mix O by ion injection or other doping method and prepare SiO
xN
yFilm; Perhaps prepare SiO
2, mix Si by ion injection or other doping method and prepare SiO
xFilm, x＜2; Perhaps prepare SiO
2, mix N by ion injection or other doping method and prepare SiO
xN
yFilm.
3) on above-mentioned resistive material layer, prepare top electrode.
Wherein, in step 1) or the step 3), electrode is the film build method preparation of adopting in PVD method or other IC technology.
Compare with prior art, positive technique effect of the present invention is:
The present invention has selected the material preparation RRAM of CMOS process compatible for use, and preparation process has mainly adopted film deposition equipment, no high-temperature technology and CMOS backend process compatibility.Composition by control silicon nitrogen oxide makes its silicone content more relatively, introduces more defects, the room, such as nitrogen room, oxygen room etc., change thereby film can be easy to take place resistance state under electric field action, and adopt active electrode can obtain stable bipolar device.
Description of drawings
Fig. 1 is the cross section structure schematic diagram of embodiment of the invention resistance-variable storing device, wherein:
The 1-silicon substrate; The 2-hearth electrode; The 3-separator; 4-resistive material layer; 5-hearth electrode fairlead; The 6-top electrode;
Fig. 2 is the resistive performance plot of embodiment of the invention resistance-variable storing device, wherein:
The 1-high-impedance state is to low resistance state transition process, i.e. opening process; The 2-low resistance state promptly closes closed procedure to the high-impedance state transition process.
Embodiment
The present invention is further described by specific embodiment below in conjunction with accompanying drawing.
The cross section structure schematic diagram of resistance-variable storing device of the present invention is set forth the preparation process of this example resistance-variable storing device below in conjunction with the cross section structure schematic diagram as shown in Figure 1,
1) at first on silicon substrate 1, adopts the film build method in physical vapor deposition (PVD) method or other IC technology to prepare one deck W metal, and use standard photolithography techniques, make hearth electrode graphical, form hearth electrode 2 by burn into etching or stripping technology.
2) utilize PECVD or ALD or PVD or MOCVD to prepare separator;
3) utilize PECVD to prepare resistive material layer SiO
xN
y, x=0.4 wherein, y=1.
3) by photoetching, etching definition hearth electrode fairlead;
4) the same with hearth electrode, adopt the film build method in PVD method or other IC technology to prepare top electrode TiN preparation technology and CMOS backend process compatibility, in preparation process, do not adopt any high-temperature process.
The resistance-variable storing device W/SiO that present embodiment makes
xN
yThe resistive characteristic test result of/TiN as shown in Figure 2.
As shown in Figure 2, along with the change (hearth electrode ground connection) of the voltage that is applied to top electrode, the resistance of present embodiment resistance-variable storing device is changed between high resistant and low-resistance, has realized the purpose of storage " 0 " and " 1 ".In addition as shown in Figure 2, about the about 1V of the cut-in voltage of present embodiment resistance-variable storing device, close about voltage pact-0.8V.
More than nitrogen oxide resistance-variable storing device of silicon provided by the present invention and preparation method thereof has been described by specific embodiment, those skilled in the art is to be understood that, in the scope that does not break away from essence of the present invention, can make certain conversion, modification and improvement to the present invention; Be not limited to disclosed content among the embodiment.
Claims (10)
1. a bipolar resistive random memory comprises top electrode, the resistive material layer, and hearth electrode and substrate is characterized in that the resistive material layer is the nitrogen oxide SiO of silicon
xN
y, described SiO
xN
yX, y satisfy condition: 2x+3y＜4, x 〉=0, y 〉=0, described hearth electrode is Cu, W, Pt, perhaps the nitrogen oxide of other and silicon is under less than 300 ℃ temperature, the metal that does not react or other electric conducting material, described top electrode are Ti, TiN, Al, AlCu, perhaps the metal or the electric conducting material of the nitrogen oxide generation chemical reaction of other and silicon.
2. resistance-variable storing device as claimed in claim 1 is characterized in that described SiO
xN
yThickness be no more than 50nm.
3. the preparation method of a bipolar resistive random memory, it comprises the steps:
1) at the substrate preparation hearth electrode, described hearth electrode is Cu, W, Pt, perhaps the nitrogen oxide of other and silicon under less than 300 ℃ temperature, the metal that does not react or other electric conducting material;
2) prepare SiO
xN
yFilm, described SiO
xN
yX, y satisfy condition: 0＜2x+3y＜4, x 〉=0, y 〉=0;
3) prepare top electrode on above-mentioned resistive material layer, described top electrode is Ti, TiN, Al, AlCu, perhaps the metal or the electric conducting material of the nitrogen oxide generation chemical reaction of other and silicon.
4. method as claimed in claim 5 is characterized in that adopting the PECVD method, by adjusting N
2O and SiH
4Parameter prepares SiO
xN
yFilm.
5. method as claimed in claim 5 is characterized in that adopting methods such as ALD, PVD, MOCVD to prepare SiO
xN
yFilm.
6. method as claimed in claim 5 is characterized in that at first preparing the Si film, mixes O and N element by ion injection or other doping method, prepares SiO
xN
yFilm.
7. method as claimed in claim 5 is characterized in that at first preparing Si
3N
4, mix Si by ion injection or other doping method, prepare SiN
yFilm, y＜4/3.
8. method as claimed in claim 5 is characterized in that at first preparing Si
3N
4, mix O by ion injection or other doping method and prepare SiO
xN
yFilm.
9. method as claimed in claim 5 is characterized in that at first preparing SiO
2, mix Si by ion injection or other doping method, prepare SiO
xFilm, x＜2.
10. method as claimed in claim 5 is characterized in that at first preparing SiO
2, mix N by ion injection or other doping method, prepare SiO
xN
yFilm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010102233934A CN101894910B (en) | 2010-07-12 | 2010-07-12 | Nitride-oxide-silicon bipolar resistance change memory based on non-stoichiometry ratio and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010102233934A CN101894910B (en) | 2010-07-12 | 2010-07-12 | Nitride-oxide-silicon bipolar resistance change memory based on non-stoichiometry ratio and preparation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101894910A true CN101894910A (en) | 2010-11-24 |
| CN101894910B CN101894910B (en) | 2012-02-22 |
Family
ID=43104046
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010102233934A Active CN101894910B (en) | 2010-07-12 | 2010-07-12 | Nitride-oxide-silicon bipolar resistance change memory based on non-stoichiometry ratio and preparation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101894910B (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102169957A (en) * | 2011-03-12 | 2011-08-31 | 中山大学 | Bipolar resistive random access memory and preparation method thereof |
| CN102208418A (en) * | 2011-04-08 | 2011-10-05 | 中山大学 | Chip and preparation method thereof |
| CN102623638A (en) * | 2012-04-19 | 2012-08-01 | 北京大学 | Resistance random access memory and preparation method thereof |
| JP2017143245A (en) * | 2015-12-08 | 2017-08-17 | クロスバー， インコーポレイテッドＣｒｏｓｓｂａｒ， Ｉｎｃ． | Regulating interface layer formation for two-terminal memory |
| CN113644193A (en) * | 2021-06-29 | 2021-11-12 | 北京大学 | Preparation method and device of resistive random access memory device, electronic equipment and storage medium |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101577308A (en) * | 2009-06-09 | 2009-11-11 | 中国科学院微电子研究所 | Variable-resistance memory doped with ZrO2 and preparation method thereof |
| US20090283737A1 (en) * | 2008-05-19 | 2009-11-19 | Masahiro Kiyotoshi | Nonvolatile storage device and method for manufacturing same |
-
2010
- 2010-07-12 CN CN2010102233934A patent/CN101894910B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090283737A1 (en) * | 2008-05-19 | 2009-11-19 | Masahiro Kiyotoshi | Nonvolatile storage device and method for manufacturing same |
| CN101577308A (en) * | 2009-06-09 | 2009-11-11 | 中国科学院微电子研究所 | Variable-resistance memory doped with ZrO2 and preparation method thereof |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102169957A (en) * | 2011-03-12 | 2011-08-31 | 中山大学 | Bipolar resistive random access memory and preparation method thereof |
| CN102208418A (en) * | 2011-04-08 | 2011-10-05 | 中山大学 | Chip and preparation method thereof |
| CN102623638A (en) * | 2012-04-19 | 2012-08-01 | 北京大学 | Resistance random access memory and preparation method thereof |
| CN102623638B (en) * | 2012-04-19 | 2014-07-02 | 北京大学 | Resistance random access memory and preparation method thereof |
| JP2017143245A (en) * | 2015-12-08 | 2017-08-17 | クロスバー， インコーポレイテッドＣｒｏｓｓｂａｒ， Ｉｎｃ． | Regulating interface layer formation for two-terminal memory |
| JP7084688B2 (en) | 2015-12-08 | 2022-06-15 | クロスバー， インコーポレイテッド | 2-Adjustment of interface layer formation for terminal memory |
| CN113644193A (en) * | 2021-06-29 | 2021-11-12 | 北京大学 | Preparation method and device of resistive random access memory device, electronic equipment and storage medium |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101894910B (en) | 2012-02-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101894910B (en) | Nitride-oxide-silicon bipolar resistance change memory based on non-stoichiometry ratio and preparation method thereof | |
| Laurenti et al. | Zinc oxide thin films for memristive devices: a review | |
| CN101106171B (en) | Non-volatile memory device including variable resistance material | |
| CN102017146B (en) | Non-volatile resistive-switching memories | |
| Wang et al. | Improving the electrical performance of resistive switching memory using doping technology | |
| KR20120006502A (en) | Resistive-switching memory elements having improved switching characteristics | |
| Padovani et al. | Understanding the role of the Ti metal electrode on the forming of HfO2-based RRAMs | |
| CN102683583A (en) | Unipolar resistive random access memory and manufacturing method thereof | |
| CN101853922B (en) | Low-voltage resistive random access memory and preparation method thereof | |
| CN103367639B (en) | A kind of Zinc oxide nanowire low-power consumption resistance-variable storing device and preparation method thereof | |
| CN101621114A (en) | Oxide multilayered gradient film and RRAM component structured thereby | |
| CN101577308A (en) | Variable-resistance memory doped with ZrO2 and preparation method thereof | |
| Zou et al. | Uniform bipolar resistive switching properties with self-compliance effect of Pt/TiO2/p-Si devices | |
| CN105552220A (en) | Silicon oxide thin film based low power consumption resistive random access memory and preparation method therefor | |
| Fang et al. | Current conduction model for oxide-based resistive random access memory verified by low-frequency noise analysis | |
| CN101420012A (en) | Non-volatile resistor transition type memory embedded into nano-crystalline granule | |
| CN102280577A (en) | Single-pole resistance-change device, single-pole resistance-change random access memory unit and preparation method for single-pole resistance-change device | |
| CN102148328B (en) | Oxide resistor storage device and preparation method thereof | |
| CN102593352A (en) | Method for preparing resistive random access memory | |
| CN101872837B (en) | Resistive layer, resistive storage having same and process for preparing same | |
| CN107437584A (en) | Hetero-junctions resistance-variable storing device and preparation method thereof | |
| CN102130297B (en) | Resistive random access memory based on P/N type oxide laminated structure and preparation method thereof | |
| Lu et al. | Resistive switching characteristics of interfacial device based on Bi2Ti2O7 film | |
| CN101826597B (en) | Organic resistive random access memory and preparation method thereof | |
| Bao | Transition metal oxide thin films for nonvolatile resistive random access memory applications |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING Free format text: FORMER OWNER: BEIJING UNIV. Effective date: 20130607 Owner name: BEIJING UNIV. Effective date: 20130607 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: 100871 HAIDIAN, BEIJING TO: 100176 DAXING, BEIJING |
|
| TR01 | Transfer of patent right |
Effective date of registration: 20130607 Address after: 100176 No. 18, Wenchang Avenue, Beijing economic and Technological Development Zone Patentee after: Semiconductor Manufacturing International (Beijing) Corporation Patentee after: Peking University Address before: 100871 Beijing the Summer Palace Road, Haidian District, No. 5 Patentee before: Peking University |