CN101894519A - Data conversion device, data conversion method and data conversion system - Google Patents
Data conversion device, data conversion method and data conversion system Download PDFInfo
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- CN101894519A CN101894519A CN 201010228492 CN201010228492A CN101894519A CN 101894519 A CN101894519 A CN 101894519A CN 201010228492 CN201010228492 CN 201010228492 CN 201010228492 A CN201010228492 A CN 201010228492A CN 101894519 A CN101894519 A CN 101894519A
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Abstract
The invention provides a data conversion device, a data conversion method and a data conversion system. The data conversion device comprises an LVDS data packet receiving module, an LVDS data packet transmitting module, a timing control data transmission branch circuit and a pixel data transmission branch circuit, wherein the timing control data transmission branch circuit transmits timing control data decomposed by the LVDS data packet receiving module to the LVDS data packet transmitting module, and the pixel data transmission branch circuit transmits pixel data decomposed by the LVDS data packet receiving module to the LVDS data packet transmitting module. By using the LVDS data to detect EDID information corresponding to a display device, the data conversion device and method greatly save host resources and improve transmission efficiency.
Description
Technical field
The present invention relates to a kind of DTU (Data Transfer unit), data transfer device and data conversion system, relate in particular to a kind of flat-panel monitor DTU (Data Transfer unit), data transfer device and data conversion system.
Background technology
Expanded display recognition data (extended display identification data, EDID) be the standard data that VESA (video electronics standard association) proposes about the affirmation and the ability identification of display device, be stored in the EEROM storer special-purpose in the display device, it comprises parameters such as can receiving capable field frequency scope, production firm, date of manufacture, product ID, product type, typical display mode etc., to make things convenient for main frame and display device operate as normal on request.For flat-panel monitor, these relevant informations comprise the fabricator of display device, the data-interface that can support and resolution etc.
In the prior art, main frame needs the EDID of reading displayed device in advance to obtain the required information of display device.According to the receptible video data form of the corresponding output display device of the EDID that is read, just can make the display device operate as normal then to show required content.The method that present the most frequently used main frame reads EDID is by twin wire universal serial bus (inter-integrated circuit, IIC) interface, the EEROM storer of visit display device; According to the EDID of institute's reading displayed device, correspondence carries out video data to transfer to display device after decompress(ion), conversion, the distribution simultaneously.When running into main frame and be connected to the display device of a plurality of different resolutions, the output data of main frame does not match with corresponding display device, does not cause picture quality good or do not have a defective of image thus at all.
In the prior art, having provides software to be used to solve compatibility issue between display device and the main frame, yet this process need expends more host resource and brings long time delay.
Summary of the invention
Expend host resource during at prior art main frame and display device data transmission and often reach the serious problem of time delay, the invention provides the DTU (Data Transfer unit) of a kind of effective saving host resource and raising data transmission efficiency.
The invention provides also a kind of data conversion system that adopts this DTU (Data Transfer unit) simultaneously.
A kind of DTU (Data Transfer unit), comprise a LVDS packet decomposing module, a sequential control data transmission branch road, pixel data transmission branch road and a LVDS packet generation module, this LVDS packet decomposes the sequential control data and the processes pixel data of a LVDS packet, these sequential control data transfer to this LVDS packet generation module via this sequential control data transmission branch road, and these processes pixel data transfer to this LVDS packet generation module via this pixel data transmission branch road.
Further improvement as above-mentioned DTU (Data Transfer unit), this DTU (Data Transfer unit) also comprises a LVDS packet receiver module, this LVDS packet receiver module is electrically connected at this LVDS packet decomposing module, and this LVDS packet receiver module transmission LVDS packet is to this LVDS packet decomposing module.
As the further improvement of above-mentioned DTU (Data Transfer unit), this sequential control data transmission branch road comprises a time sequence detecting circuit, and this time sequence detecting circuit is electrically connected at this LVDS packet decomposing module.
As the further improvement of above-mentioned DTU (Data Transfer unit), this sequential control data transmission branch road also comprises a sequential reconfigurable circuit, and this sequential reconfigurable circuit one end is electrically connected at this time sequence detecting circuit, and its other end is electrically connected at this LVDS packet generation module.
Further improvement as above-mentioned DTU (Data Transfer unit), this pixel data transmission branch road also comprises a pixel data processing module, this pixel data processing module one end is electrically connected at this LVDS packet decomposing module, and its other end is electrically connected at this LVDS packet generation module.
Further improvement as above-mentioned DTU (Data Transfer unit), this DTU (Data Transfer unit) also comprises a LVDS packet sending module, this LVDS packet generation module receives these sequential control data and processes pixel data, and generates new LVDS data packet transmission to this LVDS packet sending module.
A kind of data conversion system, it comprises a main frame, a display device, and above-mentioned DTU (Data Transfer unit).
A kind of data transfer device, it comprises the steps: to provide a LVDS packet; One LVDS packet decomposing module is provided, this LVDS packet decomposing module receives this LVDS packet, corresponding sequential control data to the sequential control data transmission branch road that decomposes in the back transmission LVDS packet, and processes pixel data to the pixel data transmission branch road in the transmission LVDS packet; One LVDS packet generation module is provided, this sequential control data transmission branch road transmission time sequence control data is to this LVDS packet generation module, this pixel data transmission branch road transmits processes pixel data to this LVDS packet generation module, and generates new LVDS packet.
Further improvement as above-mentioned data transfer device, this sequential control data transmission branch road comprises a time sequence detecting circuit and the sequential reconfigurable circuit that serial connection is provided with, this time sequence detecting circuit one end is electrically connected at this LVDS packet decomposing module, and this sequential reconfigurable circuit one end is electrically connected at this LVDS packet generation module.
Further improvement as above-mentioned data transfer device, this pixel data transmission branch road also comprises a pixel data processing module, this pixel data processing module one end is electrically connected at this LVDS packet decomposing module, and its other end is electrically connected at this LVDS packet generation module.
As the further improvement of above-mentioned data transfer device, also comprise the step that a LVDS packet receiver module is provided, this LVDS packet receiver module receives the LVDS data and transfers to this LVDS packet decomposing module.
As the further improvement of above-mentioned data transfer device, comprise also a LVDS packet sending module is provided that this LVDS packet sending module receives the LVDS data that this LVDS packet generation module is generated, and is sent to exterior display device.
Compared to prior art, DTU (Data Transfer unit) of the present invention and data conversion system, in the LVDS data transmission procedure, the sequential control data transmission branch road that the sequential control data detection circuit is formed is set, select the EDID information of display device correspondence, save the resource of main frame greatly, improve transfer efficiency simultaneously.
Description of drawings
Fig. 1 is the block diagram of data conversion system one better embodiment of the present invention.
Fig. 2 is the block diagram of the DTU (Data Transfer unit) of data conversion system shown in Figure 1.
Fig. 3 is the DATA DISTRIBUTION synoptic diagram in the LVDS packet.
Fig. 4 is the workflow synoptic diagram of DTU (Data Transfer unit) shown in Figure 1.
Embodiment
The present invention is described in detail below in conjunction with accompanying drawing.
For the data that can correct output display device can receive, and save time and resource, the present invention has adopted the method for detection main frame output data to obtain the method for display device parameter.This method does not need software to participate in, and has realized self-adaptation at the sequential control of different display device.
Seeing also Fig. 1, is the block diagram of a kind of data conversion system one better embodiment of the present invention.This data conversion system comprises a main frame 30, a DTU (Data Transfer unit) 20 and a display device 40.
This main frame 30 is that an audio/video sends source device, and as digital TV in high resolution set-top box, host computer etc., it is in order to transmit display device 40 needed video datas.This main frame 30 comprises a LVDS (low voltage differential signal, Low Voltage Differential Signal) interface 31.This LVDS interface 31 is in order to the transmission Low Voltage Differential Signal, as the LVDS packet.The corresponding electric connection of the input end of this LVDS interface 31 and this data converter device 20 (indicating).Wherein this LVDS interface 31 is panel display apparatus a kind of digital interface commonly used, can be used for connecting the display device of various display resolutions such as VGA, SVGA, UVGA.By electrically connecting with this LVDS interface 31, this DTU (Data Transfer unit) 20 receives from the video data of main frame 30 outputs and to it and changes, and the video data after will changing is then exported to display device 40.
This display device 40 is audio/video terminal presentation facilities, as desk top liquid crystal display device, LCD TV etc.This display device 40 comprises the EEROM storer 41 of a special use.The EDID of this display device 40 is stored in the EEROM storer 41 of display device 40.This EDID shows that adorning 40 puts the normal data information that is transferred to main frame 30 by DDC, in order to confirm the parameter of this display device 40.
Seeing also Fig. 2 again, is the block diagram of data converter device 20 shown in Figure 1.This DTU (Data Transfer unit) 20 comprises a LVDS packet receiver module 21, a LVDS packet decomposing module 22, a pixel data processing module 23, a time sequence detecting circuit 24, a sequential reconfigurable circuit 25, a LVDS packet generation module 26 and a LVDS packet sending module 27.
In this DTU (Data Transfer unit) 20, this LVDS packet receiver module 21 is as the LVDS interface 31 corresponding electric connections of input end with this main frame 30 of this DTU (Data Transfer unit) 20.This LVDS packet receiver module 21 is received from the video data that this main frame 30 comes via these LVDS interface 31 transmission.
This LVDS packet decomposing module 22 and these LVDS packet receiver module 21 corresponding electric connections.This LVDS packet decomposing module 22 is in order to decomposing the LVDS packet that receives, and isolates pixel data and sequential control data from the LVDS packet.DATA DISTRIBUTION in this LVDS packet as shown in Figure 3, wherein R17～R10 is the red component in the pixel, G17～G10 is the green component in the pixel, B17～B10 is the blue component in the pixel, DE is the data useful signals, and HS is the transversal scanning control signal, and VS is the longitudinal scanning control signal.
This time sequence detecting circuit 24 is connected in series with this sequential reconfigurable circuit 25 the sequential control data transmission branch road that constitutes this DTU (Data Transfer unit) 20 is set.This sequential control data transmission branch road one end connects this LVDS packet decomposing module 22, and the other end connects this LVDS packet generation module 26.These pixel data processing module 23 1 ends connect this LVDS packet decomposing module 22, and the other end connects this LVDS packet generation module 26, constitute the pixel data transmission branch road of this DTU (Data Transfer unit) 20.That is to say this sequential control data transmission branch road and this pixel data transmission branch road and connect and be arranged between this LVDS packet decomposing module 22 and this LVDS packet generation module 26, this sequential control data transmission branch road transmission effectively shows line number and columns, the forward position of transversal scanning and edge, back, the flyback time of transversal scanning, the forward position of longitudinal scanning and edge, back, timing control signals such as the flyback time of longitudinal scanning are to this LVDS packet generation module 26.These pixel data transmission branch road transmitting and displaying device 40 pixel display data are to this LVDS packet generation module 26.
This LVDS packet sending module 27 and these LVDS packet generation module 26 corresponding electric connections, it is received from the new LVDS packet that forms behind sequential control data after the reconstruct that this LVDS packet generation module 26 receives and the pixel data, to send to display device 40.
Seeing also Fig. 4 again, is the workflow synoptic diagram of the DTU (Data Transfer unit) 20 of data conversion system 1 shown in Figure 1.
When this data conversion system work, this main frame 30 reads the EDID information of this display device 40, and transmit the LVDS packet to this DTU (Data Transfer unit) 20, this DTU (Data Transfer unit) 20 transfers to this display device 40 after the LVDS packet that receives is changed, and realizes that picture shows.
Particularly, the workflow of this DTU (Data Transfer unit) is as follows:
Step 3, this LVDS packet receiver module 21 transmits these LVDS data to this LVDS packet decomposing module 22, and will transfer to this sequential control data transmission branch road and this pixel data transmission branch road after its corresponding decomposition.
Wherein this LVDS packet decomposing module 22 is with after the sequential control data separating, the time sequence detecting circuit 24 of this sequential transmission data branch road obtains these display device 40 needed corresponding parameters by detecting, it comprises the effective demonstration line number and the columns of screen, the forward position of transversal scanning and edge, back, the flyback time of transversal scanning, the forward position of longitudinal scanning and edge, back, timing control signals such as the flyback time of longitudinal scanning.Transfer to this LVDS packet generation module 26 after the pixel data processing that 23 pairs of the pixel data processing modules of this pixel data transmission branch road are separated simultaneously.
Because the pixel data processing time is long, this method needs a lot of memory capacity to store the sequential control data.So need this sequential reconfigurable circuit 25 to come the time of compensation pixel data processing, this method can be saved memory capacity greatly, reduce cost.The main effect of this sequential reconfigurable circuit 25 is exactly to detect the time sequence parameter that obtains after the sequential control data by this time sequence detecting circuit 24 to regenerate the sequential control data, and these data comprise the DE of current display device 40 needs, VS and HS etc.
Step 4, this sequential control data transmission branch road transmission time sequence control data are to this LVDS packet generation module 26, and these pixel data transmission branch road transmission processes pixel data are to this LVDS packet generation module 26.
Because the processing of pixel data needs the regular hour, so receive the sequential control data and this pixel data transmission pixel data that branch road transmitted of corresponding sequential control data transmission branch road transmission when this LVDS packet generation module 26 after, need after pixel data disposes, be reassembled into new LVDS packet with the sequential control data again.Certainly, can adopt the method for storage timing control signal, after the corresponding time of delay, the sequential control data be read, reconfigure with pixel data then.
When generating new LVDS packet, pixel data and sequential control data need be alignd at last, otherwise the skew of image can take place.
Finish the conversion of these LVDS data thus and transfer to this display device 40, make the LVDS data of this main frame 30 transmission couplings, realize normally showing to this display device 40.
Simultaneously, because the delay of DTU (Data Transfer unit) 20 data processing, the electric sequence that display device 40 is received and the sequential of data transmission are destroyed, so need compensate last electric control signal.
Compared to prior art, sequential control data transmission branch road is provided with time sequence detecting circuit 24 among the present invention, the parameter information of the 24 pairs of needs of time sequence detecting circuit by this sequential control data transmission branch road detects, and through the new timing control signal of these sequential reconfigurable circuit 25 acquisitions, by LVDS packet generation module 26 from newly-generated new LVDS data, reduce the unnecessary information in this LVDS packet, save the efficient of this main frame 30 and this display device 40 transmission data greatly, the resource of having saved main frame 30 simultaneously.
Only be preferred case study on implementation of the present invention below, be not limited to the present invention, for a person skilled in the art, the present invention can have various changes and variation.Within the spirit and principles in the present invention all, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (12)
1. DTU (Data Transfer unit), comprise a LVDS packet decomposing module and a LVDS packet generation module, it is characterized in that: this DTU (Data Transfer unit) also comprises a sequential control data transmission branch road and pixel data transmission branch road, this LVDS packet decomposes the sequential control data and the processes pixel data of a LVDS packet, these sequential control data transfer to this LVDS packet generation module via this sequential control data transmission branch road, and these processes pixel data transfer to this LVDS packet generation module via this pixel data transmission branch road.
2. DTU (Data Transfer unit) according to claim 1, it is characterized in that: this DTU (Data Transfer unit) also comprises a LVDS packet receiver module, this LVDS packet receiver module is electrically connected at this LVDS packet decomposing module, and this LVDS packet receiver module transmission LVDS packet is to this LVDS packet decomposing module.
3. DTU (Data Transfer unit) according to claim 1 is characterized in that: this sequential control data transmission branch road comprises a time sequence detecting circuit, and this time sequence detecting circuit is electrically connected at this LVDS packet decomposing module.
4. DTU (Data Transfer unit) according to claim 3, it is characterized in that: this sequential control data transmission branch road also comprises a sequential reconfigurable circuit, this sequential reconfigurable circuit one end is electrically connected at this time sequence detecting circuit, and its other end is electrically connected at this LVDS packet generation module.
5. DTU (Data Transfer unit) according to claim 1, it is characterized in that: this pixel data transmission branch road also comprises a pixel data processing module, this pixel data processing module one end is electrically connected at this LVDS packet decomposing module, and its other end is electrically connected at this LVDS packet generation module.
6. DTU (Data Transfer unit) according to claim 1, it is characterized in that: this DTU (Data Transfer unit) also comprises a LVDS packet sending module, this LVDS packet generation module receives these sequential control data and processes pixel data, and generates new LVDS data packet transmission to this LVDS packet sending module.
7. data conversion system, it comprises a main frame and a display device, it is characterized in that: this data conversion system also comprises as each described DTU (Data Transfer unit) of claim 1 to 6.
8. data transfer device, it comprises the steps:
One LVDS packet is provided;
One LVDS packet decomposing module is provided, this LVDS packet decomposing module receives this LVDS packet, corresponding sequential control data to the sequential control data transmission branch road that decomposes in the back transmission LVDS packet, and processes pixel data to the pixel data transmission branch road in the transmission LVDS packet;
One LVDS packet generation module is provided, this sequential control data transmission branch road transmission time sequence control data is to this LVDS packet generation module, this pixel data transmission branch road transmits processes pixel data to this LVDS packet generation module, and generates new LVDS packet.
9. data transfer device according to claim 8, it is characterized in that: this sequential control data transmission branch road comprises a time sequence detecting circuit and the sequential reconfigurable circuit that serial connection is provided with, this time sequence detecting circuit one end is electrically connected at this LVDS packet decomposing module, and this sequential reconfigurable circuit one end is electrically connected at this LVDS packet generation module.
10. data transfer device according to claim 8, it is characterized in that: this pixel data transmission branch road also comprises a pixel data processing module, this pixel data processing module one end is electrically connected at this LVDS packet decomposing module, and its other end is electrically connected at this LVDS packet generation module.
11. data transfer device according to claim 8 is characterized in that: also comprise the step that a LVDS packet receiver module is provided, this LVDS packet receiver module receives the LVDS data and transfers to this LVDS packet decomposing module.
12. data transfer device according to claim 8, it is characterized in that: also comprise a LVDS packet sending module is provided, this LVDS packet sending module receives the new LVDS data that this LVDS packet generation module is generated, and is sent to exterior display device.
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| CN107301841A (en) * | 2017-08-18 | 2017-10-27 | 深圳市华星光电半导体显示技术有限公司 | A kind of OLED display panel and its driving method |
| CN108510950A (en) * | 2018-03-27 | 2018-09-07 | 武汉华星光电技术有限公司 | A kind of simplified sequence controller TCON signal processing methods and device |
| US10504439B2 (en) | 2017-08-18 | 2019-12-10 | Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | OLED display panel and driving method using differential data for voltage compensation |
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Effective date of registration: 20180720 Address after: 518000 Room 201, building A, No. 1, Qian Wan Road, Qianhai Shenzhen Hong Kong cooperation zone, Shenzhen, Guangdong (Shenzhen Qianhai business secretary Co., Ltd.) Patentee after: Shenzhen super Technology Co., Ltd. Address before: 518053 East Guangdong H-1 East 101, overseas Chinese town, Nanshan District, Shenzhen. Patentee before: Shenzhen SuperD Photoelectronic Co., Ltd. |