CN101888173A - Power factor correction circuit - Google Patents
Power factor correction circuit Download PDFInfo
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- CN101888173A CN101888173A CN2010102269279A CN201010226927A CN101888173A CN 101888173 A CN101888173 A CN 101888173A CN 2010102269279 A CN2010102269279 A CN 2010102269279A CN 201010226927 A CN201010226927 A CN 201010226927A CN 101888173 A CN101888173 A CN 101888173A
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- circuit
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- factor correction
- power factor
- power converter
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P80/00—Climate change mitigation technologies for sector-wide applications
- Y02P80/10—Efficient use of energy, e.g. using compressed air or pressurized fluid as energy carrier
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Abstract
The invention relates to a power factor correction circuit which is coupled with one output end of a power converter through an analog and digital conversion circuit and converts one output signal of the power converter to one digital signal, a feedback circuit is coupled with the analog and digital conversion circuit and generates one timing signal according to the digital signal, and a counting circuit coupled with the feedback circuit and one input end of the power converter and generates one switching signal according to one triggering signal and the timing signal for switching a switch of the power converter. Therefore, the power factor correction circuit can be can be digitalized through one analog and digital conversion circuit, one feedback circuit and one counting circuit so that the stability of a system is increased, and the power factor correction circuit can also be effectively digitalized so that the complexity of the circuit is reduced.
Description
Technical field
The invention relates to a kind of power factor correction circuit, it refers to a kind of power factor correction circuit with critical conduction mode especially.
Background technology
Along with the progress and the expanding economy of science and technology, human demand to switching power converter grows with each passing day.In recent years, because power electronic technology is significantly progressive, the direction that most electronic equipment tends to compactization day by day develops, its inner power converter also needs towards compact trend design, therefore, have that volume is little, in light weight, the switch type power converter of efficient advantages of higher just replaces conventional linear formula transducer gradually, become the main flow of power converter.Switch type converter has further promoted converter efficiency and quality except short and small advantage such as frivolous.
See also Fig. 1, be the circuit diagram of the power factor correction circuit of prior art.As shown in the figure, the rectification circuit 10 ' of power converter 1 ' is a bridge rectifier, input AC signal in order to rectified power transducer 1 ' is unidirectional electric current, being about to the rectification of input AC signal is dc signal, one switch 20 ' of power converter 1 ' is a current switch, be used for adjusting the electric current of the input of power converter 1 ', make the average current of its input be proportional to input voltage, reach the purpose that improves power factor.And the function of the transformer 12 ' of power converter 1 ' has two, and first function is to be used as inductance to use, and when allowing switch 20 ' not conducting, continues to have electric current to flow into load.Second function is to be used as the current sense device, is used to provide a zero current detector 25 ' (Zero Current Detector, current signal ZCD).Inductive current I
LWaveform and the relation between the waveform of switch signal as shown in Figure 2, after power converter 1 ' stable operation, the switch signal is opened the time (open time) can fixing (symbol t as described in Figure 2 usually
On).As shown in Figure 2, when input voltage was big, the spacing that switch 20 ' was opened between the time was big more, and peak current is also big more, and therefore, average current is also big more, to reach the effect of power factor correction.
See also Fig. 3, be the oscillogram of the power factor correction circuit of Fig. 1.As shown in the figure, an error amplifier 30 ' of power factor correction circuit can be exported the error of power converter 1 ' and make its stable (getting its low frequency part), is the Err (t) among Fig. 3.On the other hand, when switch 20 ' ends (promptly the output signal of the output Q of a flip-flop 40 ' is a low level), inductive current I
LCan slowly reduce, as inductive current I
LWhen being zero, the output signal of zero current detector 25 ' is a high levle, makes that the output signal of output Q of flip-flop 40 ' is a high levle, and makes switch 20 ' conducting.So inductive current I
LCan become big once again.On the other hand, because current source 11 begins electric capacity 35 ' is charged, and make the sawtooth waveforms signal S (t) that positive input terminal received of comparator 36 ' also can begin linear the change greatly.When this signal was identical with Err (t), the output signal of comparator 36 ' was a high levle, and the output signal of flip-flop 40 ' is reset to low level, so cutoff switch 20 '.The circulation that so goes round and begins again is to finish the correction of power factor.
Because above-mentioned power factor correction circuit is analog power factor correction circuit, and analog power factor correction circuit and can't digitlization, and the error amplifier that analog power factor correction circuit comprised, triangular wave generator all use the practice of simulation, this practice can produce bigger error along with the drift of processing procedure, and the problem of stability is arranged.
Therefore, how to propose a kind of novel power factor correction circuit at the problems referred to above, its digitlization power factor correction circuit can reduce circuit complexity and the stability that increases system, makes and can solve the above problems.
Summary of the invention
One of purpose of the present invention is to provide a kind of power factor correction circuit, but its effective digital power factor correction circuit, to reduce the complexity of circuit.
One of purpose of the present invention is to provide a kind of power factor correction circuit, and it is by an analog-to-digital conversion circuit, a feedback circuit and a counting circuit, reaching the digitlization power factor correction circuit, and then increases the stability of system.
To achieve the above object, the present invention is a kind of power factor correction circuit, and it couples a power converter, and in order to adjust a power factor of this power converter, this power factor correction circuit comprises:
One analog-to-digital conversion circuit couples an output of this power converter, and an output signal of changing this power converter is a digital signal;
One feedback circuit couples this analog-to-digital conversion circuit, and according to this digital signal, produces a timing signal; And
One counting circuit couples an input of this feedback circuit and this power converter, and according to a trigger signals and this timing signal, switches signal and produce one, in order to switch a switch of this power converter.
Among the present invention, wherein this counting circuit receives this trigger signals and picks up counting, and produces this switching signal according to this timing signal, and this timing signal determines a dozen ETAD expected time of arrival and departure of this switch.
Among the present invention, wherein this feedback circuit comprises:
One arithmetic element couples this analog-to-digital conversion circuit, and according to this digital signal and a reference signal, and produce this timing signal.
Among the present invention, wherein this feedback circuit more comprises:
One filter couples this arithmetic element, and filters this output signal of this power converter, and this output signal after the transmission filtration is to this counting circuit.
Among the present invention, it more comprises:
One circuit for detecting couples this input and this counting circuit of this power converter, and detects an inductive current of this power converter, and produces this trigger signals, and this trigger signals is sent to this counting circuit.
Among the present invention, when wherein this circuit for detecting is detected this inductive current of this power converter and is zero, produce this trigger signals, and this trigger signals is sent to this counting circuit.
Among the present invention, wherein this circuit for detecting is a zero current circuit for detecting.
Among the present invention, it more comprises:
One drive circuit couples between this counting circuit and this switch, in order to amplify this switching signal, drives signal and produce one, to switch this switch.
Among the present invention, wherein this power converter comprises:
One bleeder circuit couples an output of this power converter, in order to this output signal of dividing potential drop, and this output signal after the dividing potential drop is sent to this analog-to-digital conversion circuit.
Among the present invention, it is applied to the power factor correction circuit of a critical conduction mode.
The beneficial effect that the present invention has: the present invention can be by an analog-to-digital conversion circuit, a feedback circuit and a counting circuit by the present invention, to reach the digitlization power factor correction circuit, and then the stability of increase system, but and the effective digital power factor correction circuit, to reduce the complexity of circuit.
Description of drawings
Fig. 1 is the circuit diagram of the power factor correction circuit of prior art;
Fig. 2 is the inductive current of power converter of Fig. 1 and the oscillogram of switch relation;
Fig. 3 is the oscillogram of the power factor correction circuit of Fig. 1; And
Fig. 4 is the circuit diagram of a preferred embodiment of the present invention.
[figure number is to as directed]
Prior art:
1 ' power converter, 10 ' rectification circuit
12 ' transformer, 20 ' switch
25 ' zero current detector, 30 ' error amplifier
35 ' electric capacity, 36 ' comparator
40 ' flip-flop
The present invention:
1 power factor correction circuit, 10 analog-to-digital conversion circuits
12 feedback circuits, 120 arithmetic elements
122 filters, 14 counting circuits
16 circuit for detecting, 20 switches
22 bleeder circuits
Embodiment
Further understand and understanding for making architectural feature of the present invention and the effect reached had, cooperate detailed explanation, be described as follows in order to preferred embodiment and accompanying drawing:
See also Fig. 4, be the circuit diagram of a preferred embodiment of the present invention.As shown in the figure, power factor correction circuit 1 of the present invention couples a power converter 2, in order to adjust a power factor of power converter 2, power factor correction circuit 1 comprise an analog-to-digital conversion circuit 10 (Analog Digital Converter, ADC), a feedback circuit 12 and a counting circuit 14.Analog-to-digital conversion circuit 10 couples an output of power converter 2, and analog-to-digital conversion circuit 10 is in order to an output signal V of received power transducer 2
O, and conversion output signal V
OBe a digital signal, feedback circuit 12 couples analog-to-digital conversion circuit 10, and receives the digital signal of analog-to-digital conversion circuit 10 outputs, and produces a timing signal t
On, counting circuit 14 couples an input of feedback circuit 12 and power converter 2, and according to a trigger signals and timing signal t
On, switch signal and produce one, with a switch 20 of switchover power converter 2.
Moreover counting circuit 14 comprises three inputs, is respectively a frequency end CLK, holds a start and a timing end count at the beginning.When the starting end start of counting circuit 14 receives trigger signals, a frenquency signal that is received according to frequency end CLK and counting then, picking up counting, reach the timing signal t that the timing end count of counting circuit 14 is received when the time that counting circuit 14 is counted
OnIndicated time, i.e. timing signal t
OnA dozen ETAD expected time of arrival and departure (on-time) of determine switch 20 make counting circuit 14 according to timing signal t
OnAnd control switch 20 is opened the permanent of time.So, the present invention is by analog-to-digital conversion circuit 10, feedback circuit 12 and counting circuit 14, reaching the digitlization power factor correction circuit, and then increases the stability of system, but and the effective digital power factor correction circuit, to reduce the complexity of circuit.Wherein, switch 20 can be the switch module of a field-effect transistor (MOS FET) or any other voltage type.
Connect describedly, feedback circuit 12 of the present invention comprises an arithmetic element 120.Arithmetic element 120 couples an output of analog-to-digital conversion circuit 10, to receive the digital signal that analog-to-digital conversion circuit 10 is exported, simultaneously, arithmetic element 120 more receives a reference signal Vref, with foundation digital signal and reference signal Vref, and produce timing signal t
OnIn this embodiment, the arithmetic element 120 of present embodiment is a subtracter, and it subtracts each other digital signal and reference signal Vref, and produces an error signal, and this error signal is timing signal t
OnIn addition, feedback circuit 12 more comprises a filter 122.Filter 122 couples arithmetic element 120, and the timing signal t of filtration operation unit 120 outputs
On, and the timing signal t after the transmission filtration
OnTiming end count to counting circuit 14.Wherein, filter 122 is a low pass filter (Low Pass Filter), the error amplifier of its functional similarity in analog power factor corrector.
Please consult Fig. 4 again, be the circuit diagram of a preferred embodiment of the present invention.As shown in the figure, power factor correction circuit 1 of the present invention more comprises a circuit for detecting 16.Circuit for detecting 16 couples the input and the counting circuit 14 of power converter 2, and an inductive current I of detecting power converter 2
L, and produce trigger signals, and trigger signals is sent to counting circuit 14, make counting circuit 14 beginnings carry out timing, i.e. the inductive current I of circuit for detecting 16 detecting power converters 2 according to frenquency signal CLK
LWhen being zero, then produce trigger signals.In this embodiment, circuit for detecting 16 be a zero current circuit for detecting (Zero Current Detector, ZCD).
In addition, power factor correction circuit of the present invention more comprises one drive circuit 18.Drive circuit 18 couples between counting circuit 14 and the switch 20, switches signal in order to amplify, and drives signal and produce one, with diverter switch 20, be the control end En that drive circuit 18 couples counting circuit 14,, drive signal to produce to receive and to amplify the switching signal that counting circuit 14 is exported.
Connect describedly, the output of the power converter 2 of present embodiment couples a bleeder circuit 22.Bleeder circuit 22 is in order to dividing potential drop output signal V
O, and with the output signal V after the dividing potential drop
OBe sent to analog-to-digital conversion circuit 10, i.e. bleeder circuit 22 dividing potential drop output signal V
OAnd produce a dividing potential drop signal Vr, and dividing potential drop signal Vr is sent to analog-to-digital conversion circuit 10, Vr is a digital signal with conversion dividing potential drop signal.
From the above, filter 122 meetings calculate the time of opening according to the margin of error of the error signal of arithmetic element 120 outputs, and generation timing signal, and this is opened time announcement counting circuit 14, and the switching signal of the output of counting circuit 14 is a low level also not beginning counting, so the switch state of 20 this moment for ending; The inductive current I that detects when circuit for detecting 16
LWhen being zero, then transmit trigger signals to counting circuit 14, make counting circuit 14 begin to count, at this moment, the switching signal that counting circuit 14 is transmitted is a high levle, and makes switch 20 be the state of conducting, therefore, and as inductive current I
LIncrease (as Fig. 2, shown in Figure 3), and the count value of counting circuit 14 is when being same as the timing signal, 14 of counting circuits stop counting, and make zero, and the switching signal of counting circuit 14 outputs is then changed into low level, switch 20 is changed into once more ended.Above-mentioned flow process repeats to reach the purpose of power factor correction.In addition, power factor correction circuit of the present invention can be applicable to the power factor correction circuit of a critical conduction mode, but does not limit to the power factor correction circuit that is applied to critical conduction mode, also can be applicable to the power factor correction circuit of other pattern.
In sum, power factor correction circuit of the present invention couples an output of power converter by an analog-to-digital conversion circuit, and an output signal of changing this output output is a digital signal, one feedback circuit couples analog-to-digital conversion circuit, and produce a timing signal according to digital signal, one counting circuit couples an input of feedback circuit and power converter, and according to a trigger signals and timing signal, switch signal and produce one, in order to a switch of switchover power converter.So, the present invention can be by an analog-to-digital conversion circuit, a feedback circuit and a counting circuit, reaching the digitlization power factor correction circuit, and then increases the stability of system, but and the effective digital power factor correction circuit, to reduce the complexity of circuit.
In sum, it only is a preferred embodiment of the present invention, be not to be used for limiting scope of the invention process, all equalizations of doing according to the described shape of claim scope of the present invention, structure, feature and spirit change and modify, and all should be included in the claim scope of the present invention.
Claims (10)
1. a power factor correction circuit is characterized in that, it couples a power converter, and in order to adjust a power factor of this power converter, this power factor correction circuit comprises:
One analog-to-digital conversion circuit couples an output of this power converter, and an output signal of changing this power converter is a digital signal;
One feedback circuit couples this analog-to-digital conversion circuit, and according to this digital signal, produces a timing signal; And
One counting circuit couples an input of this feedback circuit and this power converter, and according to a trigger signals and this timing signal, switches signal and produce one, in order to switch a switch of this power converter.
2. power factor correction circuit as claimed in claim 1 is characterized in that, wherein this counting circuit receives this trigger signals and picks up counting, and produces this switching signal according to this timing signal, and this timing signal determines a dozen ETAD expected time of arrival and departure of this switch.
3. power factor correction circuit as claimed in claim 1 is characterized in that, wherein this feedback circuit comprises: an arithmetic element, couple this analog-to-digital conversion circuit, and according to this digital signal and a reference signal, and produce this timing signal.
4. power factor correction circuit as claimed in claim 3 is characterized in that, wherein this feedback circuit more comprises:
One filter couples this arithmetic element, and filters this output signal of this power converter, and this output signal after the transmission filtration is to this counting circuit.
5. power factor correction circuit as claimed in claim 1 is characterized in that it more comprises:
One circuit for detecting couples this input and this counting circuit of this power converter, and detects an inductive current of this power converter, and produces this trigger signals, and this trigger signals is sent to this counting circuit.
6. power factor correction circuit as claimed in claim 5 is characterized in that, when wherein this circuit for detecting is detected this inductive current of this power converter and is zero, produces this trigger signals, and this trigger signals is sent to this counting circuit.
7. power factor correction circuit as claimed in claim 5 is characterized in that, wherein this circuit for detecting is a zero current circuit for detecting.
8. power factor correction circuit as claimed in claim 1 is characterized in that it more comprises:
One drive circuit couples between this counting circuit and this switch, in order to amplify this switching signal, drives signal and produce one, to switch this switch.
9. power factor correction circuit as claimed in claim 1 is characterized in that, wherein this power converter comprises:
One bleeder circuit couples an output of this power converter, in order to this output signal of dividing potential drop, and this output signal after the dividing potential drop is sent to this analog-to-digital conversion circuit.
10. power factor correction circuit as claimed in claim 1 is characterized in that it is applied to the power factor correction circuit of a critical conduction mode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010102269279A CN101888173A (en) | 2010-07-09 | 2010-07-09 | Power factor correction circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010102269279A CN101888173A (en) | 2010-07-09 | 2010-07-09 | Power factor correction circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN101888173A true CN101888173A (en) | 2010-11-17 |
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ID=43073936
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010102269279A Pending CN101888173A (en) | 2010-07-09 | 2010-07-09 | Power factor correction circuit |
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1605228A (en) * | 2001-12-20 | 2005-04-06 | 赤多尼科阿特可两合股份有限公司 | Electronic ballast and operating method for a gas discharge lamp |
| CN1783715A (en) * | 2004-06-02 | 2006-06-07 | 美国快捷半导体有限公司 | Modified sinusoidal pulse width modulation method for full digital power factor correction |
| US20080310201A1 (en) * | 2007-06-15 | 2008-12-18 | The Regents Of The University Of Colorado | Digital Power Factor Correction |
| CN101383513A (en) * | 2008-10-23 | 2009-03-11 | 上海儒竞电子科技有限公司 | Single-phase power factor correcting single cycle controller |
| CN101404446A (en) * | 2008-11-11 | 2009-04-08 | 珠海格力电器股份有限公司 | Monocycle power factor emendation method |
| CN101546963A (en) * | 2009-04-22 | 2009-09-30 | 南京航空航天大学 | Digital monocyclic control method of PFC converter |
-
2010
- 2010-07-09 CN CN2010102269279A patent/CN101888173A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1605228A (en) * | 2001-12-20 | 2005-04-06 | 赤多尼科阿特可两合股份有限公司 | Electronic ballast and operating method for a gas discharge lamp |
| CN1783715A (en) * | 2004-06-02 | 2006-06-07 | 美国快捷半导体有限公司 | Modified sinusoidal pulse width modulation method for full digital power factor correction |
| US20080310201A1 (en) * | 2007-06-15 | 2008-12-18 | The Regents Of The University Of Colorado | Digital Power Factor Correction |
| CN101383513A (en) * | 2008-10-23 | 2009-03-11 | 上海儒竞电子科技有限公司 | Single-phase power factor correcting single cycle controller |
| CN101404446A (en) * | 2008-11-11 | 2009-04-08 | 珠海格力电器股份有限公司 | Monocycle power factor emendation method |
| CN101546963A (en) * | 2009-04-22 | 2009-09-30 | 南京航空航天大学 | Digital monocyclic control method of PFC converter |
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Application publication date: 20101117 |